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* Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds2011-09-1218-18/+72
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of git://git.linaro.org/people/arnd/arm-soc: ARM: CSR: add missing sentinels to of_device_id tables ARM: cns3xxx: Fix newly introduced warnings in the PCIe code ARM: cns3xxx: Fix compile error caused by hardware.h removed ARM: davinci: fix cache flush build error ARM: davinci: correct MDSTAT_STATE_MASK ARM: davinci: da850 EVM: read mac address from SPI flash OMAP: omap_device: fix !CONFIG_SUSPEND case in _noirq handlers OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[] OMAP3: clock: indicate that gpt12_fck and wdt1_fck are in the WKUP clockdomain OMAP4: clock: fix compile warning OMAP4: clock: re-enable previous clockdomain enable/disable sequence OMAP: clockdomain: Wait for powerdomain to be ON when using clockdomain force wakeup OMAP: powerdomains: Make all powerdomain target states as ON at init
| * Merge branch 'for_3.1/pm-fixes-2' of ↵Arnd Bergmann2011-09-121-0/+3
| |\ | | | | | | | | | git://gitorious.org/khilman/linux-omap-pm into fixes
| | * OMAP: omap_device: fix !CONFIG_SUSPEND case in _noirq handlersKevin Hilman2011-09-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The suspend/resume _noirq handlers were #ifdef'd out in the !CONFIG_SUSPEND case, but were still assigned to the dev_pm_ops struct. Fix by defining them to NULL in the !CONFIG_SUSPEND case. Reported-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | Merge branch 'sirf/fixes' into fixesArnd Bergmann2011-09-124-0/+4
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| | * | ARM: CSR: add missing sentinels to of_device_id tablesJamie Iles2011-09-114-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The of_device_id tables used for matching should be terminated with empty sentinel values. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Barry Song <baohua.song@csr.com>
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| *-. \ \ Merge branches 'cns3xxx/fixes', 'omap/fixes' and 'davinci/fixes' into fixesArnd Bergmann2011-09-109-14/+64
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| | | * | | ARM: davinci: fix cache flush build errorLinus Walleij2011-09-071-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TNET variant of DaVinci compiles some code that it shares with other DaVinci variants, however it has a V6 CPU rather than an ARM926T, thus the hardcoded call to arm926_flush_kern_cache_all() in sleep.S will obviously fail, and we need to build with the v6_flush_kern_cache_all() call instead. This was triggered by manually altering the DaVinci config to build the TNET version. Cc: Dave Martin <dave.martin@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Cc: stable@kernel.org
| | | * | | ARM: davinci: correct MDSTAT_STATE_MASKSergei Shtylyov2011-09-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix the #define MDSTAT_STATE_MASK at last. Using the wrong value seems to have been harmless though... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | | * | | ARM: davinci: da850 EVM: read mac address from SPI flashRajashekhara, Sudhakar2011-09-071-0/+28
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DA850/OMAP-L138 EMAC driver uses random mac address instead of a fixed one because the mac address is not stuffed into EMAC platform data. This patch provides a function which reads the mac address stored in SPI flash (registered as MTD device) and populates the EMAC platform data. The function which reads the mac address is registered as a callback which gets called upon addition of MTD device. NOTE: In case the MAC address stored in SPI flash is erased, follow the instructions at [1] to restore it. [1] http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#Restoring_MAC_address_on_SPI_Flash Modifications in v2: Guarded registering the mtd_notifier only when MTD is enabled. Earlier this was handled using mtd_has_partitions() call, but this has been removed in Linux v3.0. Modifications in v3: a. Guarded da850_evm_m25p80_notify_add() function and da850evm_spi_notifier structure with CONFIG_MTD macros. b. Renamed da850_evm_register_mtd_user() function to da850_evm_setup_mac_addr() and removed the struct mtd_notifier argument to this function. c. Passed the da850evm_spi_notifier structure to register_mtd_user() function. Modifications in v4: Moved the da850_evm_setup_mac_addr() function within the first CONFIG_MTD ifdef construct. Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Cc: stable@kernel.org
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| | *-----. \ \ Merge branches 'non_hwmod_compliant_fix_3.1rc', 'omap3_clock_fixes_3.1rc', ↵Paul Walmsley2011-09-0511-13/+30
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'omap4_clock_fixes_3.1rc', 'missing_2430_musb_adds_terminator_fix_3.1rc' and 'pwrdm_clkdm_fixes_3.1rc' into prcm-fixes-a-3.1rc
| | | | | | * | | OMAP: clockdomain: Wait for powerdomain to be ON when using clockdomain ↵Santosh Shilimkar2011-08-202-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | force wakeup While using clockdomain force wakeup method, not waiting for powerdomain to be effectively ON may end up locking the clockdomain FSM until a next wakeup event occurs. One such issue was seen on OMAP4430, where L4_PER was periodically getting stuck in in-transition state when transitioning from from OSWR to ON. This issue was reported and investigated by Patrick Titiano <p-titiano@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Reported-by: Patrick Titiano <p-titiano@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: updated to apply; added transition wait on clkdm_deny_idle(); remove two superfluous pwrdm_wait_transition() calls] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | | | | * | | OMAP: powerdomains: Make all powerdomain target states as ON at initRajendra Nayak2011-08-201-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Program all powerdomain target state as ON; this is to prevent domains from hitting low power states (if bootloader has target states set to something other than ON) and potentially even losing context while PM is not fully initialized, which can cause the system to crash. The PM late init code can then program the desired target state for all the power domains. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [paul@pwsan.com: dropped comment typo hunk; fixed comment indent and moved to kerneldoc; moved code to pwrdm_init(); changed pwrdm_init() argument name to prevent clash; cleaned up patch description] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | | | * | | | OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[]Paul Walmsley2011-09-051-0/+1
| | | | | | |_|/ | | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a missing array terminator to omap2430_usbhsotg_addrs[]. Without this terminator, the omap_hwmod resource building code runs off the end of the array, resulting in at least this error -- if not worse behavior: [ 0.578002] musb-omap2430: failed to claim resource 4 [ 0.583465] omap_device: musb-omap2430: build failed (-16) [ 0.589294] Could not build omap_device for musb-omap2430 usb_otg_hs This should have been part of commit 78183f3fdf76f422431a81852468be01b36db325 ("omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays") but was evidently missed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | | * | | | OMAP4: clock: fix compile warningPaul Walmsley2011-08-211-0/+2
| | | | | |/ / | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following compile warning: arch/arm/mach-omap2/clock44xx_data.c: In function 'omap4xxx_clk_init': arch/arm/mach-omap2/clock44xx_data.c:3371:6: warning: 'cpu_clkflg' may be used uninitialized in this function The approach taken here is intended to work if omap4xxx_clk_init() is converted into an initcall. Thanks to Bjarne Steinsbo <bsteinsbo@gmail.com> for proposing another approach. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Bjarne Steinsbo <bsteinsbo@gmail.com>
| | | * / | | OMAP3: clock: indicate that gpt12_fck and wdt1_fck are in the WKUP clockdomainPaul Walmsley2011-08-231-0/+2
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The oscillator that supplies GPT12_FCLK and WDT1_FCLK exists in the WKUP powerdomain[1]. This resolves at least one boot-time warning: omap_hwmod: gpt12_fck: missing clockdomain for gpt12_fck. 1. _OMAP34xx Multimedia High Security (HS) Device Silicon Revision 3.1.x Security Addendum Version K (SWPU119K)_ Figure 3-29. August 2010.
| | * / / / OMAP4: clock: re-enable previous clockdomain enable/disable sequencePaul Walmsley2011-08-201-1/+7
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit 665d001338b494d6d62810aa99b4c0fa1a0884b9 ("OMAP2+: hwmod: Follow the recommended PRCM module enable sequence"), device drivers for OMAP IP blocks that do not use runtime PM can cause oopses or kernel instability[1][2]. This is because those non-runtime PM drivers do not use the hwmod code, which implements the correct IP block enable and disable sequence. Several options for dealing with this problem have been proposed: 1. Add a new field to the OMAP struct clk to mark clocks that are currently used by non-runtime PM drivers. Modify the clock code to use the old clockdomain sequence for these marked clocks. As drivers are converted to use runtime PM, remove the annotation from the clocks. 2. Similar to #1, but associate the flag with the struct omap_clk instead. 3. Add IDLEST wait support to the OMAP4 clock code, similar to the way it is implemented for OMAP2/3, and enable it in each struct clk currently used by non-runtime PM drivers. As drivers are converted to use runtime PM, remove the annotation from the clocks. 4. Do nothing; leave the problem to those responsible for the unconverted drivers. 5. Re-enable clock-based clockdomain control in the OMAP4 clock code. This would revert back to the behavior of Linux 3.0, simply with a slightly longer module enable/disable latency. Unfortunately, no approach seemed particularly good. Options 1 through 3 seemed unwise due to the following reasons: A. The OMAP struct clks are intended primarily to describe hardware clock nodes, and the intention is that no driver-specific data should be stored there (applies to #1) B. The resulting patch would have been quite large for the -rc series (applies to #1, #2, #3) C. The patch would have been a new, yet temporary hack; and similar fixes have drawn negative comments in the recent past (see for example [3]) Option 4 is undesirable because commit 665d001338b494d6d62810aa99b4c0fa1a0884b9 ("OMAP2+: hwmod: Follow the recommended PRCM module enable sequence") has resulted in a less stable kernel; and kernel stability is more important than OMAP4 power management. Option 5 is the approach taken in this patch. This seemed to be the least intrusive approach for 3.1-rc. The approach in this patch was originally proposed by Ohad Ben-Cohen <ohad@wizery.com>. I'm simply writing the commit message and passing it along. ... Thanks to Luciano Coelho <coelho@ti.com> for reporting the problem. Thanks to Ohad Ben-Cohen <ohad@wizery.com> for tracking the problem down, generating a temporary workaround, and proposing a patch to deal with the problem. Thanks to Rajendra Nayak <rnayak@ti.com> for proposing another patch to deal with the problem. Thanks to Felipe Balbi <balbi@ti.com> for comments. 1. Coelho, Luciano <coelho@ti.com>. _Re: Oops on ehci_hcd when booting 3.0.0-rc2 on panda_. Tue, 09 Aug 2011 14:26:08 +0300. Posted to the <linux-omap@vger.kernel.org> mailing list. Available from (among others) http://www.spinics.net/linux/lists/linux-omap/msg55213.html 2. Munegowda, Keshava <keshava_mgowda@ti.com>. _Re: Oops on ehci_hcd when booting 3.0.0-rc2 on panda_. Thu, 11 Aug 2011 13:51:05 +0530. Posted to the <linux-omap@vger.kernel.org> mailing list. Available from (among others) http://www.spinics.net/linux/lists/linux-omap/msg55371.html 3. King, Russell <linux@arm.linux.org.uk>. _Re: [PATCH 5/8] OMAP4: PM: TEMP: Prevent l3init from idling/force sleep_. Thu, 23 Jun 2011 16:22:49 +0100. Posted to the <linux-omap@vger.kernel.org> mailing list. Available from (among others) http://www.mail-archive.com/linux-omap@vger.kernel.org/msg51392.html Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Luciano Coelho <coelho@ti.com> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * | | | ARM: cns3xxx: Fix newly introduced warnings in the PCIe codeAnton Vorontsov2011-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit d5341942d784134f2997b3ff82cd63cf71d1f932 ("PCI: Make the struct pci_dev * argument of pci_fixup_irqs const") did not change argument of pdev_to_cnspci(), and thus introduced the following warnings: CHECK arch/arm/mach-cns3xxx/pcie.c pcie.c:177:60: warning: incorrect type in argument 1 (different modifiers) pcie.c:177:60: expected struct pci_dev *dev pcie.c:177:60: got struct pci_dev const *dev CC arch/arm/mach-cns3xxx/pcie.o pcie.c: In function 'cns3xxx_pcie_map_irq': pcie.c:177: warning: passing argument 1 of 'pdev_to_cnspci' discards qualifiers from pointer target type pcie.c:52: note: expected 'struct pci_dev *' but argument is of type 'const struct pci_dev *' This patch fixes the issue. Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
| * | | | ARM: cns3xxx: Fix compile error caused by hardware.h removedTommy Lin2011-09-093-3/+0Star
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c9d95fbe59e426eed7f16e7cac812e46ac4772d0 "ARM: convert PCI defines to variables" deleted cns3xxx' hardware.h, but didn't remove references for it, so do it now. This patch removes lines that refer to hardware.h. Signed-off-by: Tommy Lin <tommy.lin.1101@gmail.com> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
* | | | ARM: 7088/1: entry: fix wrong parameter name used in do_thumb_abortJanusz Krzysztofik2011-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit be020f8618ca, "ARM: entry: abort-macro: specify registers to be used for macros", while replacing register numbers with macro parameter names, mismatched the name used for r1. For me, this resulted in user space built for EABI with -march=armv4t -mtune=arm920t -mthumb-interwork -mthumb broken on my OMAP1510 based Amstrad Delta (old ABI and no thumb still worked for me though). Fix this by using correct parameter name fsr instead of mismatched psr, used by callers for another purpose. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 7080/1: l2x0: make sure I&D are not locked down on initLinus Walleij2011-09-072-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fighting unfixed U-Boots and other beasts that may the cache in a locked-down state when starting the kernel, we make sure to disable all cache lock-down when initializing the l2x0 so we are in a known state. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Adrian Bunk <adrian.bunk@movial.com> Cc: Rob Herring <robherring2@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Jan Rinze <janrinze@gmail.com> Tested-by: Robert Marklund <robert.marklund@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 7081/1: mach-integrator: fix the clocksourceLinus Walleij2011-09-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was intrigued by the fact that the clock stood still on the Integrator, but it wasn't strange at all, because the timer was set up all wrong and probably has been for a while. With this patch the clock starts ticking again: make the timer periodic (reload), |= on the divisor bit and load the timer before starting it. Cc: stable@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | ARM: 7067/1: mm: keep significant bits in pfn_validMark Rutland2011-09-041-1/+1
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When ARCH_HAS_HOLES_MEMORYMODEL is selected, pfn_valid calls memblock_is_memory to test validity of a pfn: > memblock_is_memory(pfn << PAGE_SHIFT); On LPAE systems this cuts off the top bits, as the shift occurs before the value is promoted to a phys_addr_t. This patch replaces the shift with a call to __pfn_to_phys (which casts pfn to phys_addr_t before shifting), preventing the loss of significant bits. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-08-3021-50/+111
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: pm: avoid writing the auxillary control register for ARMv7 ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness ARM: pm: arm920/926: fix number of registers saved ARM: pm: CPU specific code should not overwrite r1 (v:p offset) ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMU ARM: 7065/1: kexec: ensure new kernel is entered in ARM state ARM: 7003/1: vexpress: Add clock definition for the SP805. ARM: 7051/1: cpuimx* boards: fix mach-types errors ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDER ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation. ARM: 6967/1: ep93xx: ts72xx: fix board model detection ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boards ARM: cache: detect VIPT aliasing I-cache on ARMv6 ARM: twd: register clockevents device before enabling PPI ARM: realview: ensure visibility of writes during reset ARM: perf: make name of arm_pmu_type consistent ARM: perf: fix prototype of release_pmu ARM: fix perf build with uclibc toolchains
| * | | ARM: pm: avoid writing the auxillary control register for ARMv7Russell King2011-08-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For ARMv7 kernels running in the non-secure world, writing to the auxillary control register causes an abort, so we must avoid directly writing the auxillary control register. If the ACR has already been reinitialized by SoC code, don't try to restore it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: pm: some ARMv7 requires a dsb in resume to ensure correctnessRussell King2011-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a dsb after the isb to ensure that the previous writes to the CP15 registers take effect before we enable the MMU. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: pm: arm920/926: fix number of registers savedRussell King2011-08-282-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM920 and ARM926 save four registers, not three. Fix the size of the suspend region required. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: pm: CPU specific code should not overwrite r1 (v:p offset)Russell King2011-08-282-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r1 stores the v:p offset from the CPU invariant resume code, and is expected to be preserved by the CPU specific code. Overwriting it is not a good idea. We've managed to get away with it on sa1100 platforms because most happen to have PHYS_OFFSET == PAGE_OFFSET, but that may not be the case depending on kernel configuration. So fix this latent bug. This fixes xsc3 as well which was saving and restoring this register independently. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMUWill Deacon2011-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu_v7_reset disables the MMU and then branches to the provided address. On Thumb-2 kernels, we should take care to clear the Thumb Exception enable bit in the System Control Register, otherwise this may wreak havok in the code to which we are branching (for example, an ARM kernel image via kexec). Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7065/1: kexec: ensure new kernel is entered in ARM stateWill Deacon2011-08-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 540b5738 ("ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state") mandates that the kernel should be entered in ARM state. If a Thumb-2 kernel kexecs a new kernel image, we need to ensure that we change state when branching to the new code. This patch replaces a mov pc, lr with a bx lr on Thumb-2 kernels so that we transition to ARM state if need be. Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7003/1: vexpress: Add clock definition for the SP805.Nick Bowler2011-08-241-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems that an entry for the SP805 watchdog in the table of clocks was missing. This results in the sp805_wdt driver rejecting the device with the following errors: sp805-wdt mb:wdt: Clock not found sp805-wdt mb:wdt: Probe Failed!!! sp805-wdt: probe of mb:wdt failed with error -2 While not obviously stated in the hardware docs, the onboard SP810's "REFCLK" is connected to a 32.768KHz crystal, and this drives the watchdog. Add a struct clk and corresponding lookup entry for it. Signed-off-by: Nick Bowler <nbowler@elliptictech.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7051/1: cpuimx* boards: fix mach-types errorsEric Bénard2011-08-224-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I made some changes to the entry in the ARM Machine Registry after submission which was the wrong thing to do. This patch should help to fix this error. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDERAxel Lin2011-08-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 8560a6cfc9818edde1fd8677961714b264ffa03d "arm: Footbridge: Use common i8253 clockevent", ARCH_NETWINDER needs to select CLKEVT_I8253. This patch fixes below build error with "make netwinder_defconfig". LD .tmp_vmlinux1 arch/arm/mach-footbridge/built-in.o: In function `isa_timer_init': isa-rtc.c:(.init.text+0x12c8): undefined reference to `clockevent_i8253_init' isa-rtc.c:(.init.text+0x12d0): undefined reference to `i8253_clockevent' arch/arm/mach-footbridge/built-in.o:(.data+0x198): undefined reference to `i8253_clockevent' make: *** [.tmp_vmlinux1] Error 1 Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss ↵Catalin Marinas2011-08-152-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enabled This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible cache data corruption with hit-under-miss enabled). It sets the undocumented bit 31 in the auxiliary control register and the FI bit in the control register, thus disabling hit-under-miss without putting the processor into full low interrupt latency mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.Srinivas Kandagatla2011-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes L2 Cache size calculations for L2C-210, L2C-310 and PL310, by changing the L2X0_AUX_CTRL_WAY_SIZE_MASK from 2 bits to 3 bits. The Auxiliary Control Register for L2C-210, L2C-310 and PL310 has 3bits [19:17] for Way size, however the existing code only uses 2 bits to get this value. This results in incorrect cachesize calculations. It also results in performing operations on the whole cache when we erroneously decide that the range is big enough (due to l2x0_size being too small) and also prints incorrect cachesize. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: stable@kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6967/1: ep93xx: ts72xx: fix board model detectionPetr Štetiar2011-08-151-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the obvious error in board detection logic, because according to the TS's manual, the model is stored in the least three significant bits. For example the byte read on my ts-7300 is 0x23 and the detection then fails. Cc: Ryan Mallon <ryan@bluewatersys.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boardsPetr Štetiar2011-08-151-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Cc: Ryan Mallon <ryan@bluewatersys.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch '3.1-fixes-for-rmk' of git://linux-arm.org/linux-2.6-wd into fixesRussell King2011-08-135-27/+29
| |\ \ \ | | |/ / | |/| |
| | * | ARM: cache: detect VIPT aliasing I-cache on ARMv6Will Deacon2011-08-121-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current cache detection code does not check for an aliasing I-cache if the D-cache is found to be VIPT aliasing. This patch fixes the problem by always checking for an aliasing I-cache on v6 and later. Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * | ARM: twd: register clockevents device before enabling PPIWill Deacon2011-08-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The smp_twd clockevents driver currently enables the local timer PPI before the clockevents device is registered. This can lead to a kernel panic if a spurious timer interrupt is generated before registration has completed since the kernel will treat it as an IPI timer. This patch moves the clockevents device registration before the IRQ unmasking so that we can always handle timer interrupts once they can occur. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * | ARM: realview: ensure visibility of writes during resetWill Deacon2011-08-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The various reset routines in mach-realview rely on an FPGA to power-cycle the board after writing some magic runes to memory-mapped registers. This patch adds a dsb() following the writes, so that they become visible before we mdelay(1000) in the arch_reset code. Without this patch, the timeout would expire sporadically, causing the reset to fail. Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * | ARM: perf: make name of arm_pmu_type consistentMark Rutland2011-08-122-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed {release,reserve}_pmu to take an enum arm_pmu_type as a parameter, but inconsistently named the parameter `type' or `device'. It would be nice if these were consistent. This patch makes use of enum arm_pmu_type consistent, always using `type'. Related printks are updated, explicitly mentioning `type' also. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * | ARM: perf: fix prototype of release_pmuMark Rutland2011-08-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed the prototype of release_pmu, but missed the stub for when CONFIG_CPU_HAS_PMU is not selected by the platform. This patch changes the prototype of the stub, preventing possible build failures when CONFIG_CPU_HAS_PMU is not selected. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
* | | | Merge branch 'fixes' of ↵Linus Torvalds2011-08-3018-14/+45
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: ARM: mach-footbridge: add missing header file <video/vga.h> ARM: mach-orion5x: add missing header file <linux/vga.h> arm: fix compile failure in orion5x/dns323-setup.c at91: at91sam9261.c: fix typo in t2_clk alias for atmel_tcb.0 ARM: S5P: fix bug in spdif_clk_get_rate ARM: EXYNOS4: Add restart hook for proper reboot ARM: EXYNOS4: Increase reset delay for USB HOST PHY ARM: S5P: add required chained_irq_enter/exit to gpio-int code ARM: EXYNOS4: add required chained_irq_enter/exit to eint code ARM: SAMSUNG: Add chained enrty/exit call to timer interrupt handler ARM: S3C64XX: Fix build break in PM debug ARM: S5PV210: Fix build warning ARM: EXYNOS4: Fix the IRQ definitions for MIPI CSIS device ARM: EXYNOS4: remove duplicated inclusion ARM: EXYNOS4: Fix wrong devname to support clkdev ARM: EXYNOS4: Use the correct regulator names on universal_c210 ARM: SAMSUNG: Fix Section mismatch in samsung_bl_set() ARM: S5P64X0: Replace irq_gc_ack() with irq_gc_ack_set_bit()
| * \ \ \ Merge branch 'at91/fixes' of ↵Arnd Bergmann2011-08-261-1/+1
| |\ \ \ \ | | | | | | | | | | | | | | | | | | git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into fixes
| | * | | | at91: at91sam9261.c: fix typo in t2_clk alias for atmel_tcb.0Jean-Christophe PLAGNIOL-VILLARD2011-08-241-1/+1
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was a typo in clockdev declaration for at91sam9261 SoC. Fix the kernel hanging when switching clocksource to TC (tcb_clksrc). Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Remy Bohmer <linux@bohmer.net> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | Merge branch 'fixes' of git://git.jdl.com/software/linux-3.0 into fixesArnd Bergmann2011-08-263-1/+3
| |\ \ \ \
| | * | | | ARM: mach-footbridge: add missing header file <video/vga.h>Bryan Wu2011-08-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes following building error: -- arch/arm/mach-footbridge/dc21285.c: In function 'dc21285_preinit': arch/arm/mach-footbridge/dc21285.c:299:2: error: 'vga_base' undeclared (first use in this function) arch/arm/mach-footbridge/dc21285.c:299:2: note: each undeclared identifier is reported only once for each function it appears in make[1]: *** [arch/arm/mach-footbridge/dc21285.o] Error 1 -- Signed-off-by: Bryan Wu <bryan.wu@canonical.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
| | * | | | ARM: mach-orion5x: add missing header file <linux/vga.h>Bryan Wu2011-08-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixed following building error: -- arch/arm/mach-orion5x/pci.c: In function 'orion5x_pci_sys_setup': arch/arm/mach-orion5x/pci.c:563:2: error: 'vga_base' undeclared (first use in this function) arch/arm/mach-orion5x/pci.c:563:2: note: each undeclared identifier is reported only once for each function it appears in make[1]: *** [arch/arm/mach-orion5x/pci.o] Error 1 make[1]: *** Waiting for unfinished jobs.... -- Signed-off-by: Bryan Wu <bryan.wu@canonical.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
| | * | | | arm: fix compile failure in orion5x/dns323-setup.cPaul Gortmaker2011-08-251-1/+1
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upstream commit d5341942d784134f2997b3ff82cd63cf71d1f932 "PCI: Make the struct pci_dev * argument of pci_fixup_irqs const." leaked an extra "const" into an actual call site (vs a proto/decl) which causes this: arch/arm/mach-orion5x/dns323-setup.c: In function 'dns323_pci_map_irq': arch/arm/mach-orion5x/dns323-setup.c:80: error: expected expression before 'const' arch/arm/mach-orion5x/dns323-setup.c:80: error: too few arguments to function 'orion5x_pci_map_irq' make[3]: *** [arch/arm/mach-orion5x/dns323-setup.o] Error 1 Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Nicolas Pitre <nico@fluxnic.net> Acked-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | ARM: S5P: fix bug in spdif_clk_get_rateNaveen Krishna Chatradhi2011-08-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Should be passing the parent clk object when calling for parent rate. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>