openslx/kernel-qcow2-linux.git - In-kernel qcow2 (Kernel part)

	Commit message (Collapse)	Author	Age	Files	Lines
*	Blackfin: show the whole accumulator in the pseudo DBG insn	Robin Getz	2010-05-22	1	-6/+19
\| \| \| \| \| \| \| \|	Rather than print just part of the accumulator register, show the whole 40 bits. This matches the simulator behavior better. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
*	Blackfin: support all possible registers in the pseudo instructions	Robin Getz	2010-05-22	1	-6/+61
\| \| \| \| \| \| \|	Rather than decoding just the common R/P registers, handle all of them. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
*	Blackfin: add support for the DBG (debug output) pseudo insn	Robin Getz	2010-05-22	1	-18/+68
\| \| \| \| \| \| \| \|	Another pseudo insn used by Blackfin simulators. Also factor some now common register lookup code out of the DBGA handlers. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
*	Blackfin: add support for the DBGA (debug assert) pseudo insn	Robin Getz	2010-05-22	1	-0/+73
	A few pseudo debug insns exist to make testing of simulators easier. Since these don't actually exist in the hardware, we have to have the exception handler take care of emulating these. This allows sim test cases to be executed unmodified under Linux and thus simplify debugging greatly. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>