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* MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platformsShinya Kuribayashi2011-07-252-0/+4
| | | | | | | | | | | | | | | | | | | | | Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64 is selected. This will optimize fls() and __fls() to use CLZ insn, and eventually ffs() and __ffs() as well. Malta and MIPSSim are development platforms, and need to take care of various processor configurations, release rivisions and so on, even across different MIPS ISAs. For such platforms we have to be careful, for instance, with turning on cpu_has_mips{32,64}r[12] features. As for CLZ, all MIPS32/64 processors support it, regardless of release revisions. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> To: David VomLehn <dvomlehn@cisco.com> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1453/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PowerTV: Provide cpu-feature-overrides.hDavid VomLehn2011-07-251-0/+59
| | | | | | | | | | | | | | This will optimize fls() and __fls() to use CLZ throughout the kernel, and any other optimizations that depend on constant cpu_has_* values will also be used. Signed-off-by: David VomLehn <dvomlehn@cisco.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> To: David VomLehn <dvomlehn@cisco.com> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1452/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove pointless return statement from empty void functions.Ralf Baechle2011-07-256-6/+0Star
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Sergei Shtylyov <sshtylyov@mvista.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2391/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move FIXADDR_TOP into spaces.hKevin Cernekee2011-07-255-9/+56
| | | | | | | | | | | | | | | Memory maps and addressing quirks are normally defined in <spaces.h>. There are already three targets that need to override FIXADDR_TOP, and others exist. This will be a cleaner approach than adding lots of ifdefs in fixmap.h . Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1573/ Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: topdown mmap supportJian Peng2011-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | This patch introduced topdown mmap support in user process address space allocation policy. Recently, we ran some large applications that use mmap heavily and lead to OOM due to inflexible mmap allocation policy on MIPS32. Since most other major archs supported it for years, it is reasonable to follow the trend and reduce the pain of porting applications. Due to cache aliasing concern, arch_get_unmapped_area_topdown() and other helper functions are implemented in arch/mips/kernel/syscall.c. Signed-off-by: Jian Peng <jipeng2005@gmail.com> Cc: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2389/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definitionJonas Gorski2011-07-211-1/+0Star
| | | | | | | | Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/2461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ARC: Fix build of firmware library on uniprocessor.Ralf Baechle2011-07-211-0/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Fix crash in SMP kernel on non-CMP systems.Ralf Baechle2011-07-211-3/+38
| | | | | | | | | | | | | | | | Since 6be63bbbdab66b9185dc6f67c8b1bacb6f37f946 (lmo) rsp. af3a1f6f4813907e143f87030cde67a9971db533 (kernel.org) the Malta code does no longer probe for presence of GCMP if CMP is not configured. This means that the variable gcmp_present well be left at its default value of -1 which normally is meant to indicate that GCMP has not yet been mmapped. This non-zero value is now interpreted as GCMP being present resulting in a write attempt to a GCMP register resulting in a crash. Reported and a build fix on top of my fix by Rob Landley <rob@landley.net>. Reported-by: Rob Landley <rob@landley.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2413/
* MIPS: Wire up sendmmsg and renumber setns syscall.Ralf Baechle2011-07-211-9/+12
| | | | | | | | | | Renumbering was necessary because I had already wired up setns(2) in the linux-mips.org tree in commit c3fce54644cabbb90700cc3acc040718a377f609 [MIPS: Wire up new sendmmsg syscall.] but the same syscall numbers were used by 7b21fddd087678a70ad64afc0f632e0f1071b092 [ns: Wire up the setns system call] resulting in a conflict. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMTC: Fix build.Ralf Baechle2011-07-211-0/+1
| | | | | | | | | | Commit ee6114202e48dc282c6d04741e9c5d7171eb8bb8 (lmo) rsp. 1685f3b158a244d4f6e205e67c84483fffcb2d9f (kernel.org) ["MIPS: SMTC: Move declaration of smtc_init_secondary to <asm/smtc.h>."] didn't quite do that - it rather lost the declaration of smtc_init_secondary resulting in a build error. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: GT64120: Remove useless inclusion of clocksource.h.Ralf Baechle2011-07-211-2/+0Star
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'setns'Linus Torvalds2011-05-281-6/+9
|\ | | | | | | | | | | | | | | * setns: ns: Wire up the setns system call Done as a merge to make it easier to fix up conflicts in arm due to addition of sendmmsg system call
| * ns: Wire up the setns system callEric W. Biederman2011-05-281-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 32bit and 64bit on x86 are tested and working. The rest I have looked at closely and I can't find any problems. setns is an easy system call to wire up. It just takes two ints so I don't expect any weird architecture porting problems. While doing this I have noticed that we have some architectures that are very slow to get new system calls. cris seems to be the slowest where the last system calls wired up were preadv and pwritev. avr32 is weird in that recvmmsg was wired up but never declared in unistd.h. frv is behind with perf_event_open being the last syscall wired up. On h8300 the last system call wired up was epoll_wait. On m32r the last system call wired up was fallocate. mn10300 has recvmmsg as the last system call wired up. The rest seem to at least have syncfs wired up which was new in the 2.6.39. v2: Most of the architecture support added by Daniel Lezcano <dlezcano@fr.ibm.com> v3: ported to v2.6.36-rc4 by: Eric W. Biederman <ebiederm@xmission.com> v4: Moved wiring up of the system call to another patch v5: ported to v2.6.39-rc6 v6: rebased onto parisc-next and net-next to avoid syscall conflicts. v7: ported to Linus's latest post 2.6.39 tree. >  arch/blackfin/include/asm/unistd.h     |    3 ++- >  arch/blackfin/mach-common/entry.S      |    1 + Acked-by: Mike Frysinger <vapier@gentoo.org> Oh - ia64 wiring looks good. Acked-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-05-281-3/+0Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits) ARM: 6945/1: Add unwinding support for division functions ARM: kill pmd_off() ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks ARM: 6943/1: mm: use TTBR1 instead of reserved context ID ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7 ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area ARM: add sendmmsg syscall ARM: 6863/1: allow hotplug on msm ARM: 6832/1: mmci: support for ST-Ericsson db8500v2 ARM: 6830/1: mach-ux500: force PrimeCell revisions ARM: 6829/1: amba: make hardcoded periphid override hardware ARM: 6828/1: mach-ux500: delete SSP PrimeCell ID ARM: 6827/1: mach-netx: delete hardcoded periphid ARM: 6940/1: fiq: Briefly document driver responsibilities for suspend/resume ARM: 6938/1: fiq: Refactor {get,set}_fiq_regs() for Thumb-2 ARM: 6914/1: sparsemem: fix highmem detection when using SPARSEMEM ARM: 6913/1: sparsemem: allow pfn_valid to be overridden when using SPARSEMEM at91: drop at572d940hf support at91rm9200: introduce at91rm9200_set_type to specficy cpu package at91: drop boot_params and PLAT_PHYS_OFFSET ...
| * \ Merge branch 'devicetree/arm-next' of git://git.secretlab.ca/git/linux-2.6 ↵Russell King2011-05-251-3/+0Star
| |\ \ | | |/ | |/| | | | into devel-stable
| | * dt/flattree: explicitly pass command line pointer to early_init_dt_scan_chosenGrant Likely2011-05-111-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch drops the reference to a global 'cmd_line' variable from early_init_dt_scan_chosen, and instead passes the pointer to the command line string via the *data argument. Each architecture does something slightly different with the initial command line, so it makes sense for the architecture to be able to specify the variable name. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2011-05-271-2/+0Star
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6: PM: Fix PM QOS's user mode interface to work with ASCII input PM / Hibernate: Update kerneldoc comments in hibernate.c PM / Hibernate: Remove arch_prepare_suspend() PM / Hibernate: Update some comments in core hibernate code
| * | PM / Hibernate: Remove arch_prepare_suspend()Rafael J. Wysocki2011-05-241-2/+0Star
| | | | | | | | | | | | | | | | | | | | | All architectures supporting hibernation define arch_prepare_suspend() as an empty function, so remove it. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2011-05-236-6/+6
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits) b43: fix comment typo reqest -> request Haavard Skinnemoen has left Atmel cris: typo in mach-fs Makefile Kconfig: fix copy/paste-ism for dell-wmi-aio driver doc: timers-howto: fix a typo ("unsgined") perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c md, raid5: Fix spelling error in comment ('Ofcourse' --> 'Of course'). treewide: fix a few typos in comments regulator: change debug statement be consistent with the style of the rest Revert "arm: mach-u300/gpio: Fix mem_region resource size miscalculations" audit: acquire creds selectively to reduce atomic op overhead rtlwifi: don't touch with treewide double semicolon removal treewide: cleanup continuations and remove logging message whitespace ath9k_hw: don't touch with treewide double semicolon removal include/linux/leds-regulator.h: fix syntax in example code tty: fix typo in descripton of tty_termios_encode_baud_rate xtensa: remove obsolete BKL kernel option from defconfig m68k: fix comment typo 'occcured' arch:Kconfig.locks Remove unused config option. treewide: remove extra semicolons ...
| * | Merge branch 'master' into for-nextJiri Kosina2011-04-2640-261/+698
| |\| | | | | | | | | | | | | Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
| * | update David Miller's old email addressJustin P. Mattock2011-04-066-6/+6
| | | | | | | | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | Merge branch 'timers-clocksource-for-linus' of ↵Linus Torvalds2011-05-202-6/+5Star
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: clocksource: convert mips to generic i8253 clocksource clocksource: convert x86 to generic i8253 clocksource clocksource: convert footbridge to generic i8253 clocksource clocksource: add common i8253 PIT clocksource blackfin: convert to clocksource_register_hz mips: convert to clocksource_register_hz/khz sparc: convert to clocksource_register_hz/khz alpha: convert to clocksource_register_hz microblaze: convert to clocksource_register_hz/khz ia64: convert to clocksource_register_hz/khz x86: Convert remaining x86 clocksources to clocksource_register_hz/khz Make clocksource name const
| * \ \ Merge branch 'consolidate-clksrc-i8253' of ↵Thomas Gleixner2011-05-1446-290/+729
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource Conflicts: arch/ia64/kernel/cyclone.c arch/mips/kernel/i8253.c arch/x86/kernel/i8253.c Reason: Resolve conflicts so further cleanups do not conflict further Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| | * | | clocksource: convert mips to generic i8253 clocksourceRussell King2011-05-141-0/+5
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert MIPS i8253 clocksource code to use generic i8253 clocksource. Acked-by: John Stultz <john.stultz@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | mips: convert to clocksource_register_hz/khzJohn Stultz2011-02-211-6/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the mips clocksources to use clocksource_register_hz/khz CC: Ralf Baechle <ralf@linux-mips.org> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <johnstul@us.ibm.com>
* | | | Merge branch 'perf-core-for-linus' of ↵Linus Torvalds2011-05-201-10/+12
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (107 commits) perf stat: Add more cache-miss percentage printouts perf stat: Add -d -d and -d -d -d options to show more CPU events ftrace/kbuild: Add recordmcount files to force full build ftrace: Add self-tests for multiple function trace users ftrace: Modify ftrace_set_filter/notrace to take ops ftrace: Allow dynamically allocated function tracers ftrace: Implement separate user function filtering ftrace: Free hash with call_rcu_sched() ftrace: Have global_ops store the functions that are to be traced ftrace: Add ops parameter to ftrace_startup/shutdown functions ftrace: Add enabled_functions file ftrace: Use counters to enable functions to trace ftrace: Separate hash allocation and assignment ftrace: Create a global_ops to hold the filter and notrace hashes ftrace: Use hash instead for FTRACE_FL_FILTER ftrace: Replace FTRACE_FL_NOTRACE flag with a hash of ignored functions perf bench, x86: Add alternatives-asm.h wrapper x86, 64-bit: Fix copy_[to/from]_user() checks for the userspace address limit x86, mem: memset_64.S: Optimize memset by enhanced REP MOVSB/STOSB x86, mem: memmove_64.S: Optimize memmove by enhanced REP MOVSB/STOSB ...
| * \ \ \ Merge branch 'tip/perf/core' of ↵Ingo Molnar2011-04-271-10/+12
| |\ \ \ \ | | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-trace into perf/core Conflicts: include/linux/perf_event.h Merge reason: pick up the latest jump-label enhancements, they are cooked ready. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | jump label: Introduce static_branch() interfaceJason Baron2011-04-041-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce: static __always_inline bool static_branch(struct jump_label_key *key); instead of the old JUMP_LABEL(key, label) macro. In this way, jump labels become really easy to use: Define: struct jump_label_key jump_key; Can be used as: if (static_branch(&jump_key)) do unlikely code enable/disale via: jump_label_inc(&jump_key); jump_label_dec(&jump_key); that's it! For the jump labels disabled case, the static_branch() becomes an atomic_read(), and jump_label_inc()/dec() are simply atomic_inc(), atomic_dec() operations. We show testing results for this change below. Thanks to H. Peter Anvin for suggesting the 'static_branch()' construct. Since we now require a 'struct jump_label_key *key', we can store a pointer into the jump table addresses. In this way, we can enable/disable jump labels, in basically constant time. This change allows us to completely remove the previous hashtable scheme. Thanks to Peter Zijlstra for this re-write. Testing: I ran a series of 'tbench 20' runs 5 times (with reboots) for 3 configurations, where tracepoints were disabled. jump label configured in avg: 815.6 jump label *not* configured in (using atomic reads) avg: 800.1 jump label *not* configured in (regular reads) avg: 803.4 Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <20110316212947.GA8792@redhat.com> Signed-off-by: Jason Baron <jbaron@redhat.com> Suggested-by: H. Peter Anvin <hpa@linux.intel.com> Tested-by: David Daney <ddaney@caviumnetworks.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
* | | | | Octeon: Fix interrupt irq settings for performance counters.Chandrakala Chavva2011-05-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Octeon uses different interrupt irq for timer and performance counters. Set CvmCtl[IPPCI] to correct irq value very early. Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: Chandrakala Chavva <cchavva@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/2085/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: BCM47xx: Fix MAC address parsing.Hauke Mehrtens2011-05-191-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices like the Netgear WGT634u are using minuses between the blocks of the MAC address and other devices are using colons to separate them. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2366/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Alchemy: Clean up GPIO registers and accessorsManuel Lauss2011-05-192-47/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove au_readl/au_writel, remove the predefined GPIO1/2 KSEG1 register addresses and fix the fallout in all boards and drivers. This also fixes a bug in the mtx-1_wdt driver which was introduced by commit 6ea8115bb6f359df4f45152f2b40e1d4d1891392 ("Convert mtx1 wdt to be a platform device and use generic GPIO API") before this patch mtx-1_wdt only modified GPIO215, the patch then used the gpio resource information as bit index into the GPIO2 register but the conversion to the GPIO API didn't realize that. With this patch the drivers original behaviour is restored and GPIO15 is left alone. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: Florian Fainelli <florian@openwrt.org> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-watchdog@vger.kernel.org Cc: Wim Van Sebroeck <wim@iguana.be> Patchwork: https://patchwork.linux-mips.org/patch/2381/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | | | MIPS: Alchemy: Cleanup DMA addressesManuel Lauss2011-05-192-60/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the databooks, the Au1000 DMA engine must be programmed with the physical FIFO addresses. This patch does that; furthermore this opened the possibility to get rid of a lot of now unnecessary address defines. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2348/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | | | MIPS: Alchemy: Rewrite ethernet platform setupManuel Lauss2011-05-191-41/+22Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite ethernet setup to use runtime cpu detection, and also clean up the ethernet base address mess as far as possible. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2353/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | | | MIPS: Alchemy: Rewrite UART setup and constants.Manuel Lauss2011-05-191-14/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect CPU type at runtime and setup uarts accordingly; also clean up the uart base address mess in the process as far as possible. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | | | MIPS: Alchemy: Convert dbdma.c to syscore_opsManuel Lauss2011-05-192-10/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the PM sysdev to syscore_ops and clean up the ddma addresses a bit. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2351/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Alchemy: irq code and constant cleanupManuel Lauss2011-05-191-116/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | replace au_readl/au_writel with __raw_readl/__raw_writel, and clean up IC-related stuff from the headers. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Alchemy: update inlinable GPIO APIManuel Lauss2011-05-191-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a build failure with gpio_keys and CONFIG_GPIOLIB=n (mtx1): CC drivers/input/keyboard/gpio_keys.o gpio_keys.c: In function 'gpio_keys_report_event': gpio_keys.c:325:2: error: implicit declaration of function 'gpio_get_value_cansleep' gpio_keys.c: In function 'gpio_keys_setup_key': gpio_keys.c:390:3: error: implicit declaration of function 'gpio_set_debounce' Also add stubs for the other new functions. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2346/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Split do_syscall_trace into two functions.Ralf Baechle2011-05-191-1/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Use single define for pending work on syscall exitRalf Baechle2011-05-191-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Lantiq: Add ethernet driverJohn Crispin2011-05-192-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the driver for the ETOP Packet Processing Engine (PPE32) found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit ethernet work. Support for all 8 dma channels, gbit and the embedded switch found on the ar9/vr9 still needs to be implemented. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2357/ Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Lantiq: Add DMA supportJohn Crispin2011-05-192-1/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the DMA engine found inside the XWAY family of SoCs. The engine has 5 ports and 20 channels. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2355/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Lantiq: Add PCI controller support.John Crispin2011-05-191-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work. The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Lantiq: add SoC specific code for XWAY familyJohn Crispin2011-05-193-0/+224
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Lantiq XWAY family of Mips24KEc SoCs. * Danube (PSB50702) * Twinpass (PSB4000) * AR9 (PSB50802) * Amazon SE (PSB5061) The Amazon SE is a lightweight SoC and has no PCI as well as a different clock. We split the code out into seperate files to handle this. The GPIO pins on the SoCs are multi function and there are several bits we can use to configure the pins. To be as compatible as possible to GPIOLIB we add a function int lq_gpio_request(unsigned int pin, unsigned int alt0, unsigned int alt1, unsigned int dir, const char *name); which lets you configure the 2 "alternate function" bits. This way drivers like PCI can make use of GPIOLIB without a cubersome wrapper. The PLL code inside arch/mips/lantiq/xway/clk-xway.c is voodoo to me. It was taken from a 2.4.20 source tree and was never really changed by me since then. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2249/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Lantiq: Add initial support for Lantiq SoCsJohn Crispin2011-05-192-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Mips based SoCs made by Lantiq. This series will add support for the XWAY family. The series allows booting a minimal system using a initramfs or NOR. Missing drivers and support for Amazon and GPON family will be provided in a later series. [Ralf: Remove some cargo cult programming and fixed formatting.] Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2252/ Patchwork: https://patchwork.linux-mips.org/patch/2371/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: XLR, XLS: Add PCI support.Jayachandran C2011-05-191-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds pci/pci-xlr.c to support for XLR PCI/PCI-X interface and XLS PCIe interface. Update irq.c to ack PCI interrupts, use irq handler data to do the PCI/PCIe bus ack. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2337/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Platform files for XLR/XLS processor supportJayachandran C2011-05-197-0/+719
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * include/asm/netlogic added with files common for all Netlogic processors (common with XLP which will be added later) * include/asm/netlogic/xlr for XLR/XLS chip specific files * netlogic/xlr for XLR/XLS platform files Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2334/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Netlogic: Cache, TLB support and feature overrides for XLRJayachandran C2011-05-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU_XLR case added to mm/tlbex.c CPU_XLR case added to mm/c-r4k.c for PINDEX attribute Feature overrides for XLR cpu. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2333/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Netlogic: mach-netlogic include filesJayachandran C2011-05-193-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add war.h and irq.h with XLR/XLS definitions. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2331/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Netlogic XLR/XLS processor IDs.Jayachandran C2011-05-191-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Netlogic Microsystems company ID and processor IDs for XLR and XLS processors for CPU probe. Add CPU_XLR to cpu_type_enum. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2367/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | MIPS: Kludge IP27 build for 2.6.39.Ralf Baechle2011-05-181-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-12 05:54:45 +0200