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* | | MIPS: Add defs & probing of [X]ContextConfigJames Hogan2016-05-133-0/+11
* | | MIPS: Add defs & probing of BadInstr[P] registersJames Hogan2016-05-133-0/+13
* | | MIPS: Add defs & probing of extended CP0_EBaseJames Hogan2016-05-133-0/+8
* | | MIPS: Define & use CP0_EBase bit definitionsJames Hogan2016-05-131-1/+9
* | | MIPS: Allow RIXI to be used on non-R2 or R6 coresFlorian Fainelli2016-05-131-4/+4
* | | MIPS: mm: Fix MIPS32 36b physical addressing (alchemy, netlogic)Paul Burton2016-05-133-14/+99
* | | MIPS: mm: Unify pte_page definitionPaul Burton2016-05-131-3/+3
* | | MIPS: mm: Standardise on _PAGE_NO_READ, drop _PAGE_READPaul Burton2016-05-132-31/+11Star
* | | MIPS: Use enums to make asm/pgtable-bits.h readablePaul Burton2016-05-131-108/+81Star
* | | MIPS: Remove redundant asm/pgtable-bits.h inclusionsPaul Burton2016-05-131-2/+0Star
* | | MIPS: Separate XPA CPU feature into LPA and MVHJames Hogan2016-05-132-2/+9
* | | MIPS: inst: Declare fsel_op for sel.fmt instructionPaul Burton2016-05-131-0/+1
* | | MIPS: Support extended ASIDsPaul Burton2016-05-131-0/+14
* | | MIPS: Retrieve ASID masks using function accepting struct cpuinfo_mipsPaul Burton2016-05-132-23/+28
* | | MIPS: KVM: Abstract guest ASID maskPaul Burton2016-05-131-2/+3
* | | MIPS: Add & use CP0_EntryHi ASID definitionsJames Hogan2016-05-131-0/+2
* | | MIPS: Change my email addressJohn Crispin2016-05-1313-13/+13
* | | MIPS: Implement __arch_bitrev* using bitswap for MIPSr6Paul Burton2016-05-131-0/+30
* | | MIPS: make PCI_DMA_BUS_IS_PHYS=1 constantSergey Ryazanov2016-05-131-6/+4Star
* | | MIPS64: Support of at least 48 bits of SEGBITSLeonid Yegoshin2016-05-132-8/+16
* | | MIPS64: signal: Fix o32 sigaction syscallLeonid Yegoshin2016-05-131-3/+9
* | | MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENTHuacai Chen2016-05-134-8/+26
* | | MIPS: Loongson-3: Fast TLB refill handlerHuacai Chen2016-05-135-1/+22
* | | MIPS: Loongson: Invalidate special TLBs when neededHuacai Chen2016-05-131-0/+9
* | | MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen2016-05-137-18/+23
* | | MIPS: BCM1480: bcm1480_regs.h: strip redundant commentsAntonio Ospite2016-05-131-2/+2
* | | MIPS: Add and use watch register field definitionsJames Hogan2016-05-131-0/+18
* | | MIPS: Add and use CAUSEF_WP definitionJames Hogan2016-05-131-0/+2
* | | MIPS: ELF: Restructure personality macrosMaciej W. Rozycki2016-05-131-7/+7
* | | MIPS: Fix uapi include in exported asm/siginfo.hJames Hogan2016-05-131-3/+1Star
* | | MIPS: BMIPS: Add BCM6358 supportÁlvaro Fernández Rojas2016-05-131-0/+33
* | | MIPS: BMIPS: Add cpu-feature-overrides.hFlorian Fainelli2016-05-131-0/+14
* | | MIPS: Loongson1B: Some updates/fixes for LS1BKelvin Cheung2016-05-139-66/+129
* | | MIPS: Introduce plat_get_fdt a platform API to retrieve the FDTMatt Redfearn2016-05-131-0/+18
* | | MIPS: seccomp: Support compat with both O32 and N32Matt Redfearn2016-05-131-21/+26
* | | MIPS: Use generic clkdev.h headerStephen Boyd2016-05-132-27/+1Star
* | | MIPS: Sync icache & dcache in set_pte_atPaul Burton2016-05-132-11/+21
* | | MIPS: Flush dcache for flush_kernel_dcache_pagePaul Burton2016-05-131-0/+1
* | | MIPS: Detect DSP v3 supportZubair Lutfullah Kakakhel2016-05-132-0/+5
* | | MIPS: cpu: Convert MIPS_CPU_* defs to (1ull << x)James Hogan2016-05-131-41/+48
* | | MIPS: cpu: Alter MIPS_CPU_* definitions to fill gapJames Hogan2016-05-131-8/+8
* | | MIPS: BMIPS: Add early CPU initialization codeFlorian Fainelli2016-05-131-0/+1
* | | MIPS: Make flush_threadRalf Baechle2016-05-131-0/+4
* | | MIPS: Support R_MIPS_PC{21,26} rela-style relocsPaul Burton2016-05-131-0/+5
* | | MIPS: Add M6250 cases to CPU switch statementsPaul Burton2016-05-131-0/+4
* | | MIPS: Add M6250 PRID & cpu_type_enum valuesPaul Burton2016-05-131-1/+2
* | | MIPS: Add P6600 cases to CPU switch statementsPaul Burton2016-05-131-0/+1
* | | MIPS: Add P6600 PRID & cpu_type_enum valuesPaul Burton2016-05-131-1/+2
* | | MIPS: <asm/cpu.h>: Reformat to 80 columns.Ralf Baechle2016-05-131-2/+2
* | | MIPS: smp-cps: Support MIPSr6 Virtual ProcessorsPaul Burton2016-05-131-2/+2
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