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* MIPS: Add Loongson-3B supportHuacai Chen2014-07-301-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson-3B is a 8-cores processor. In general it looks like there are two Loongson-3A integrated in one chip: 8 cores are separated into two groups (two NUMA node), each node has its own local memory. Of course there are some differences between one Loongson-3B and two Loongson-3A. E.g., the base addresses of IPI registers of each node are not the same; Loongson-3A use ChipConfig register to enable/disable clock, but Loongson-3B use FreqControl register instead. There are two revision of Loongson-3B, the first revision is called as Loongson-3B1000, whose frequency is 1GHz and has a PRid 0x6306, the second revision is called as Loongson-3B1500, whose frequency is 1.5GHz and has a PRid 0x6307. Both revisions has a bug that clock cannot be disabled at runtime, but this will be fixed in future. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7188/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add NUMA support for Loongson-3Huacai Chen2014-07-302-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Multiple Loongson-3A chips can be interconnected with HT0-bus. This is a CC-NUMA system that every chip (node) has its own local memory and cache coherency is maintained by hardware. The 64-bit physical memory address format is as follows: 0x-0000-YZZZ-ZZZZ-ZZZZ The high 16 bits should be 0, which means the real physical address supported by Loongson-3 is 48-bit. The "Y" bits is the base address of each node, which can be also considered as the node-id. The "Z" bits is the address offset within a node, which means every node has a 44 bits address space. Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally, because many other MIPS CPUs have also extended their address spaces. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7187/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Modify ChipConfig register definitionHuacai Chen2014-07-302-4/+15
| | | | | | | | | | | | | | | This patch is prepared for Multi-chip interconnection. Since each chip has a ChipConfig register, LOONGSON_CHIPCFG should be an array. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: cs5536: mfgpt: use raw locksSebastian Andrzej Siewior2014-05-281-6/+5Star
| | | | | | | | | | | | | | | | | The lock is taken in the raw irq path and therefore a rawlock should be used instead of a normal spinlock. While here I drop the export symbol on that variable since there are no other users. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Hua Yan <yanh@lemote.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Hongliang Tao <taohl@lemote.com> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6936/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 3: Add Loongson-3 SMP supportHuacai Chen2014-03-312-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IPI registers of Loongson-3 include IPI_SET, IPI_CLEAR, IPI_STATUS, IPI_EN and IPI_MAILBOX_BUF. Each bit of IPI_STATUS indicate a type of IPI and IPI_EN indicate whether the IPI is enabled. The sender write 1 to IPI_SET bits generate IPIs in IPI_STATUS, and receiver write 1 to bits of IPI_CLEAR to clear IPIs. IPI_MAILBOX_BUF are used to deliver more information about IPIs. Why we change code in arch/mips/loongson/common/setup.c? If without this change, when SMP configured, system cannot boot since it hang at printk() in cgroup_init_early(). The root cause is: console_trylock() \-->down_trylock(&console_sem) \-->raw_spin_unlock_irqrestore(&sem->lock, flags) \-->_raw_spin_unlock_irqrestore()(SMP/UP have different versions) \-->__raw_spin_unlock_irqrestore() (following is the SMP case) \-->do_raw_spin_unlock() \-->arch_spin_unlock() \-->nudge_writes() \-->mb() \-->wbflush() \-->__wbflush() In previous code __wbflush() is initialized in plat_mem_setup(), but cgroup_init_early() is called before plat_mem_setup(). Therefore, In this patch we make changes to avoid boot failure. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6638 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add swiotlb to support All-Memory DMAHuacai Chen2014-03-312-0/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson doesn't support DMA address above 4GB traditionally. If memory is more than 4GB, CONFIG_SWIOTLB and ZONE_DMA32 should be selected. In this way, DMA pages are allocated below 4GB preferably. However, if low memory is not enough, high pages are allocated and swiotlb is used for bouncing. Moreover, we provide a platform-specific dma_map_ops::set_dma_mask() to set a device's dma_mask and coherent_dma_mask. We use these masks to distinguishes an allocated page can be used for DMA directly, or need swiotlb to bounce. Recently, we found that 32-bit DMA isn't a hardware bug, but a hardware configuration issue. So, latest firmware has enable the DMA support as high as 40-bit. To support all-memory DMA for all devices (besides the Loongson platform limit, there are still some devices have their own DMA32 limit), and also to be compatible with old firmware, we keep use swiotlb. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6636 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 3: Add serial port supportHuacai Chen2014-03-312-12/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson family machines has three types of serial port: PCI UART, LPC UART and CPU internal UART. Loongson-2E and parts of Loongson-2F based machines use PCI UART; most Loongson-2F based machines use LPC UART; Loongson-2G/3A has both LPC and CPU UART but usually use CPU UART. Port address of UARTs: CPU UART: REG_BASE + OFFSET; LPC UART: LIO1_BASE + OFFSET; PCI UART: PCIIO_BASE + OFFSET. Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART are called "CPU provided serial port". Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6635 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add UEFI-like firmware interface (LEFI) supportHuacai Chen2014-03-315-18/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new UEFI-like firmware interface (LEFI, i.e. Loongson Unified Firmware Interface) has 3 advantages: 1, Firmware export a physical memory map which is similar to X86's E820 map, so prom_init_memory() will be more elegant that #ifdef clauses can be removed. 2, Firmware export a pci irq routing table, we no longer need pci irq routing fixup in kernel's code. 3, Firmware has a built-in vga bios, and its address is exported, the linux kernel no longer need an embedded blob. With the LEFI interface, Loongson-3A/2G and all their successors can use a unified kernel. All Loongson-based machines support this new interface except 2E/2F series. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6632 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 3: Add Lemote-3A machtypes definitionHuacai Chen2014-03-311-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add four Loongson-3 based machine types: MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops; MACH_LEMOTE_A1101 is mini-itx; MACH_LEMOTE_A1205 is all-in-one machine. The most significant differrent between A1004/A1201 and A1101/A1205 is the laptops have EC but others don't. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6631 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Hide the pci code behind CONFIG_PCIMarkos Chandras2013-09-031-1/+2
| | | | | | | | | | | | | | | | | | The pci.c code depends on symbols which are only visible if CONFIG_PCI is selected. Also fixes the following problem on loongson allnoconfig: arch/mips/built-in.o: In function `pcibios_init': pci.c:(.init.text+0x528): undefined reference to `register_pci_controller' arch/mips/built-in.o:(.data+0xc): undefined reference to `loongson_pci_ops' Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5584/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fix random early boot hangAaro Koskinen2013-06-211-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Loongson boards (e.g. Lemote FuLoong mini-PC) use ISA/southbridge device (CS5536 general purpose timer) for the timer interrupt. It starts running early and is already enabled during the PCI configuration, during which there is a small window in pci_read_base() when the register access is temporarily disabled. If the timer interrupts at this point, the system will hang. Fix this by adding a fixup that keeps the register access always enabled. The hang the patch fixes usually looks like this: [ 0.844000] pci 0000:00:0e.0: [1022:2090] type 00 class 0x060100 [ 0.848000] pci 0000:00:0e.0: reg 10: [io 0xb410-0xb417] [ 0.852000] pci 0000:00:0e.0: reg 14: [io 0xb000-0xb0ff] [ 0.856000] pci 0000:00:0e.0: reg 18: [io 0xb380-0xb3bf] [ 28.140000] BUG: soft lockup - CPU#0 stuck for 23s! [swapper:1] [ 28.140000] Modules linked in: [ 28.140000] irq event stamp: 37965 [ 28.140000] hardirqs last enabled at (37964): [<ffffffff80204c0c>] restore_partial+0x6c/0x13c [ 28.140000] hardirqs last disabled at (37965): [<ffffffff80204f8c>] handle_int+0x144/0x15c [ 28.140000] softirqs last enabled at (24316): [<ffffffff802381f4>] __do_softirq+0x1cc/0x258 [ 28.140000] softirqs last disabled at (24327): [<ffffffff80238420>] do_softirq+0xc8/0xd0 [ 28.140000] Cpu 0 [ 28.140000] $ 0 : 0000000000000000 00000000140044e1 980000009f090000 0000000000000001 [ 28.140000] $ 4 : 980000009f090000 0000000000000000 0000000000000100 03b7fff87fbde011 [ 28.140000] $ 8 : ffffffff812b1928 000000000001e000 043ffff87fbde011 fffffff87fbde011 [ 28.140000] $12 : 000000000000000e ffffffff807a0000 0000000000000698 0000000000000000 [ 28.140000] $16 : 0000000000000002 ffffffff81055e20 ffffffff80786810 0000000000000000 [ 28.140000] $20 : 000000000000000a ffffffff807bc244 ffffffff807e6350 ffffffff80770000 [ 28.140000] $24 : 0000000000000d80 00000000fffedbe0 [ 28.140000] $28 : 980000009f07c000 980000009f07fa10 ffffffff81050000 ffffffff802380f8 [ 28.140000] Hi : 0000000000d0fc00 [ 28.140000] Lo : 0000000000f82b40 [ 28.140000] epc : ffffffff8023810c __do_softirq+0xe4/0x258 [ 28.140000] Not tainted [ 28.140000] ra : ffffffff802380f8 __do_softirq+0xd0/0x258 [ 28.140000] Status: 140044e3 KX SX UX KERNEL EXL IE [ 28.140000] Cause : 10008400 [ 28.140000] PrId : 00006303 (ICT Loongson-2) Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4958/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle2013-05-221-0/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: loongson: use GPIO driver on CONFIG_GPIOLIBAlexandre Courbot2013-03-201-1/+1
| | | | | | | | | The GPIO driver uses gpiolib, thus it should be compiled when CONFIG_GPIOLIB is defined and not only CONFIG_GENERIC_GPIO. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-0123-91/+91
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: irq: Remove IRQF_DISABLEDYong Zhang2011-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. [ralf@linux-mips.org: Fixed up conflicts in arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and arch/mips/kernel/perf_event.c.] Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> To: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: fix implicit smp.h usage in various files.Paul Gortmaker2011-11-011-0/+1
| | | | | | | | | | | | | We need to call out inclusion of smp.h, or with the module.h cleanup we'll get things like: arch/mips/loongson/common/platform.c:21: error: implicit declaration of function 'smp_processor_id' arch/mips/vr41xx/common/giu.c:84: error: implicit declaration of function 'smp_processor_id' arch/mips/vr41xx/common/rtc.c:85: error: implicit declaration of function 'smp_processor_id' Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* Merge branch 'timers-clocksource-for-linus' of ↵Linus Torvalds2011-05-201-4/+1Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: clocksource: convert mips to generic i8253 clocksource clocksource: convert x86 to generic i8253 clocksource clocksource: convert footbridge to generic i8253 clocksource clocksource: add common i8253 PIT clocksource blackfin: convert to clocksource_register_hz mips: convert to clocksource_register_hz/khz sparc: convert to clocksource_register_hz/khz alpha: convert to clocksource_register_hz microblaze: convert to clocksource_register_hz/khz ia64: convert to clocksource_register_hz/khz x86: Convert remaining x86 clocksources to clocksource_register_hz/khz Make clocksource name const
| * Merge branch 'consolidate-clksrc-i8253' of ↵Thomas Gleixner2011-05-143-16/+11Star
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource Conflicts: arch/ia64/kernel/cyclone.c arch/mips/kernel/i8253.c arch/x86/kernel/i8253.c Reason: Resolve conflicts so further cleanups do not conflict further Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | mips: convert to clocksource_register_hz/khzJohn Stultz2011-02-211-4/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | This converts the mips clocksources to use clocksource_register_hz/khz CC: Ralf Baechle <ralf@linux-mips.org> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <johnstul@us.ibm.com>
* | | MIPS: Loongson: Fix GCC 2.6.0 build error.Ralf Baechle2011-05-101-2/+3
| |/ |/| | | | | | | | | | | | | | | | | | | | | CC arch/mips/loongson/common/env.o arch/mips/loongson/common/env.c: In function 'prom_init_env': arch/mips/loongson/common/env.c:50:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] arch/mips/loongson/common/env.c:51:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] arch/mips/loongson/common/env.c:52:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] arch/mips/loongson/common/env.c:53:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Convert the irq functions to the new namesThomas Gleixner2011-03-291-1/+2
| | | | | | | | | | | | Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | MIPS: Loongson: Convert to new irq_chip functionsThomas Gleixner2011-03-251-9/+7Star
| | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2196/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Loongson: Fix potentially wrong string handlingStefan Weil2011-03-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This error was reported by cppcheck: arch/mips/loongson/common/machtype.c:56: error: Dangerous usage of 'str' (strncpy doesn't always 0-terminate it) If strncpy copied MACHTYPE_LEN bytes, the destination string str was not terminated. The patch adds one more byte to str and makes sure that this byte is always 0. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Arnaud Patard <apatard@mandriva.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2053/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Loongson: Remove ad-hoc cmdline defaultRobert Millan2011-03-141-5/+0Star
|/ | | | | | | | | | | | | | | Loongson builds have an ad-hoc cmdline default of "console=ttyS0,115200 root=/dev/hda1". These settings come from a vendor; I remember builds from Lemote branch requiring a "console=tty" override in order to get a working console. At least on Yeeloong, they're particularly useless: there's no external serial port, and the IDE drive is now recognised as /dev/sda. Signed-off-by: Robert Millan <rmh@gnu.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1759/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'master' into for-nextJiri Kosina2010-12-221-2/+2
|\ | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
| * MIPS: Loongson: Add return value check for strict_strtoul()Wu Zhangjin2010-12-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | cc1: warnings being treated as errors arch/mips/loongson/common/env.c: In function 'prom_init_env': arch/mips/loongson/common/env.c:49: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result arch/mips/loongson/common/env.c:50: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result arch/mips/loongson/common/env.c:51: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result arch/mips/loongson/common/env.c:52: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1762/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | suspend: constify platform_suspend_opsLionel Debroux2010-11-161-1/+1
|/ | | | | | | | | | | | | | While at it, fix two checkpatch errors. Several non-const struct instances constified by this patch were added after the introduction of platform_suspend_ops in checkpatch.pl's list of "should be const" structs (79404849e90a41ea2109bd0e2f7c7164b0c4ce73). Patch against mainline. Inspired by hunks of the grsecurity patch, updated for newer kernels. Signed-off-by: Lionel Debroux <lionel_debroux@yahoo.fr> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* MIPS: Loongson: Remove set_irq_trigger_mode()Wu Zhangjin2010-08-051-3/+0Star
| | | | | | | | | | | | | set_irq_trigger_mode() is not needed on all platforms so remove it and move the related source code to mach_init_irq(). This will allow gdium to share the common irq.c without adding an empty set_irq_trigger_mode(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: irq.c: Misc cleanupsShinya Kuribayashi2010-08-051-7/+4Star
| | | | | | | | | | | | | * Remove unnecessary 'if (int_status & (1 <<10))' statement * s/if (foo != 0)/if (foo)/ * Remove unused 'inst_status &= ~(1 << i);' line Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> To: wuzhangjin@gmail.com CC: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1433/ Acked-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Migrate makefile to new Platform fileWu Zhangjin2010-08-051-2/+0Star
| | | | | | | | | | | Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> To: linux-mips <linux-mips@linux-mips.org> Cc: Alexander Clouter <alex@digriz.org.uk> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org>, Patchwork: https://patchwork.linux-mips.org/patch/1313/ Patchwork: https://patchwork.linux-mips.org/patch/1326/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Define rtc device on MC146818-equipped systemsArnaud Patard2010-07-052-0/+44
| | | | | | | | | | | | This patch declare the rtc device present on systems with clock compatible with the mc146818 and handled by rtc-cmos. Introduce a new Kconfig entry because there are some systems without rtc_cmos compatible clock. Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Cc: aba@not.so.argh.org Patchwork: http://patchwork.linux-mips.org/patch/1320/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: CS5536: Fix ISA supportWu Zhangjin2010-07-051-2/+2
| | | | | | | | | | | The function _wrmsr() called by divil_lbar_disable()/enable() should be called with the offset as the argument. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Zhang Le <r0bertz@gentoo.org> Patchwork: http://patchwork.linux-mips.org/patch/1252/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add a missing break statement in CS5536 IDE codeWu Zhangjin2010-07-051-0/+1
| | | | | | | | | Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Zhang Le <r0bertz@gentoo.org> Cc: Hu Hongbing <huhb@lemote.com> Patchwork: http://patchwork.linux-mips.org/patch/1251/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USBWu Zhangjin2010-07-053-1/+17
| | | | | | | | | | | | | | | | Add several missing RDMSRs for IDE and USB are missing to avoid the agressive modification of the high 32 bits of the MSR. Without this patch some usb devices may fail after printing "reset ehci host ....." when reading the partition information. Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Zhang Le <r0bertz@gentoo.org> Cc: Hu Hongbing <huhb@lemote.com> Patchwork: http://patchwork.linux-mips.org/patch/1250/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Add gpio/gpioilb supportArnaud Patard2010-05-212-0/+140
| | | | | | | Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1163/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Fix of problems introduced by -mfix-loongson2f-jumpWu Zhangjin2010-04-301-1/+19
| | | | | | | | | | | | | | | | | | | | | | The -mfix-loongson2f-jump option provided by latest CVS binutils have fixed the out-of-order issue of Loongson-2F described in chapter 15 of the Loongson2F User Manual [1, 2], but introduced some problems. The option changes all of the jump target to "addr & 0xcfffffff" through the at($1) register, but for the reboot address of Loongson 2F 0xbfc00000 this is wrong. Avoids the problem via telling the assembler to not use the $at register. [1] Loongson2F User Manual (Chinese Version) http://www.loongson.cn/uploadfile/file/200808211 [2] English Version of Chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Reported-and-tested-by: Liu Shiwei <liushiwei@gmail.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1109/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fix phys_mem_access_prot() checkArnaud Patard2010-04-301-1/+1
| | | | | | | | | | The check used to determine if uncached accelerated should be used or not is wrong. The parenthesis are misplaced and making the test fail. Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1161/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fix find_vga_mem_init()Richard LIU2010-04-301-1/+1
| | | | | | | | | This allows to use all display device for instance DISPLAY_OTHER like SM501. Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1160/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fix typo in gdium mach type string.Arnaud Patard2010-04-301-1/+1
| | | | | | | | | It's not "gidum" but "gdium". Signed-off-by: Arnaud Patard <apatard@mandriva.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1159/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fixup screen_info struct initializationsSebastian Andrzej Siewior2010-04-301-9/+6Star
| | | | | | | | | | | | | | | | |arch/mips/sibyte/swarm/setup.c:153: | warning: large integer implicitly truncated to unsigned type The field was changed in d9b26352 aka ("x86, setup: Store the boot cursor state"). This patch changes the values back they way they were before this extra field got introduced. While here, the other two boards are also converted to C99 initializer. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1137/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanup the halt and poweroff actionWu Zhangjin2010-02-271-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the old source code, I have let halt and poweroff do the same action, but in reality, they have different meanings. As the manpage of shutdown shows: -r Reboot after shutdown. -H Halt action is to halt or drop into boot monitor on systems that support it. -P Halt action is to turn off the power. and in the real world, some machines(e.g. NAS) did not provide a power button and the shutdown works as reset, so, we need to provide a mechanism to let the users turn off the power safely without breaking the system, such a mechanism is "halt", which only put the system into a dead loop or a power-save mode and print some information to the screen to tell the users to turn off the power safely. $ shutdown -hH now /* loongson_halt, not turn off the power */ $ shutdown -hP now /* loongson_poweroff, work as poweroff */ Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Tested-by: Liu Shiwei <liushiwei@gmail.com> Cc: Liu Shiwei <liushiwei@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/883/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Change the Email address of Wu ZhangjinWu Zhangjin2010-02-2718-20/+20
| | | | | | | | | | | | Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/829/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fixup mem.c indentationWu Zhangjin2010-02-271-3/+4
| | | | | | | | | | | | Replace whitespace by tabs. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/828/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanup of the environment variablesWu Zhangjin2010-02-271-4/+21
| | | | | | | | | | | | | | | | | Changes: o Move bus_clock into prom_init_env() o Initialize the cpu_clock_freq to the default values for the correspoding processor revisions if no such environment variable passed by BIOS/Bootloader. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/826/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Move prom_argc and prom_argv into prom_init_cmdline()Wu Zhangjin2010-02-271-4/+3Star
| | | | | | | | | | | | | prom_argc and prom_argv are only used by prom_init_cmdline(), move them into the function. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/825/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Convert loongson_halt() to use unreachable()Wu Zhangjin2010-02-271-3/+2Star
| | | | | | | | | | | | Use the new unreachable() macro instead of while(1); Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/823/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Lemote-2F: Get the machine type from PMON_VERWu Zhangjin2010-02-271-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Lemote have used the PMON_VER strings to indicate the loongson-2f machine series: PMON_VER=LM8089 Lemote 8.9'' netbook LM8101 Lemote 10.1'' netbook (The above two netbooks have the same kernel support) LM6XXX Lemote FuLoong(2F) box series LM9XXX Lemote LynLoong PC series Before the machtype is supported by the PMON, we can get the machine type from the PMON_VER for these machines, this will help the users a lot. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/821/ Patchwork: http://patchwork.linux-mips.org/patch/908/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanups of serial port supportWu Zhangjin2009-12-174-23/+35
| | | | | | | | | | | This patchs uses a loongson_uart_base variable instead of the uart_base[] array and adds a new kernel option to avoid to compile uart_base.c all the time, which will save a little bit of memory for us. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org http://patchwork.linux-mips.org/patch/727/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Add CPU frequency scaling supportWu Zhangjin2009-12-173-1/+34
| | | | | | | | | | | | | | | | | | | | Loongson 2F supports CPU clock scaling. When put it into wait mode by setting the frequency as ZERO it will stay in this mode until an external interrupt wakes the CPU again. To enable clock scaling support, an external timer of a known stable rate is required. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/660/ Patchwork: http://patchwork.linux-mips.org/patch/751/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: Add cs5536 MFGPT timer supportWu Zhangjin2009-12-173-0/+225
| | | | | | | | | | | | | | | | | | | | CPUFreq support for Loongson 2F requires an external timer. Because the frequency of the MIPS Timer is related to the CPU frequency which itself is variable another timer of constant frequency is required. Export the mfgpt0 counter disable / enable operations for the coming suspend support to suspend / resume the timer. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/658/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>