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* powerpc: Dynamically allocate pacasMichael Ellerman2010-03-091-9/+16
| | | | | | | | | | | | | | | | | | On 64-bit kernels we currently have a 512 byte struct paca_struct for each cpu (usually just called "the paca"). Currently they are statically allocated, which means a kernel built for a large number of cpus will waste a lot of space if it's booted on a machine with few cpus. We can avoid that by only allocating the number of pacas we need at boot. However this is complicated by the fact that we need to access the paca before we know how many cpus there are in the system. The solution is to dynamically allocate enough space for NR_CPUS pacas, but then later in boot when we know how many cpus we have, we free any unused pacas. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Remove use of a second scratch SPRG in STAB codeBenjamin Herrenschmidt2009-08-201-13/+24
| | | | | | | | | | | | | | | The STAB code used on Power3 and RS/64 uses a second scratch SPRG to save a GPR in order to decide whether to go to do_stab_bolted_* or to handle a normal data access exception. This prevents our scheme of freeing SPRG3 which is user visible for user uses since we cannot use SPRG0 which, on RS/64, seems to be read-only for supervisor mode (like POWER4). This reworks the STAB exception entry to use the PACA as temporary storage instead. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Use names rather than numbers for SPRGs (v2)Benjamin Herrenschmidt2009-08-201-14/+14
| | | | | | | | | | | | | | | | | | | | | | The kernel uses SPRG registers for various purposes, typically in low level assembly code as scratch registers or to hold per-cpu global infos such as the PACA or the current thread_info pointer. We want to be able to easily shuffle the usage of those registers as some implementations have specific constraints realted to some of them, for example, some have userspace readable aliases, etc.. and the current choice isn't always the best. This patch should not change any code generation, and replaces the usage of SPRN_SPRGn everywhere in the kernel with a named replacement and adds documentation next to the definition of the names as to what those are used for on each processor family. The only parts that still use the original numbers are bits of KVM or suspend/resume code that just blindly needs to save/restore all the SPRGs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Use LOAD_REG_IMMEDIATE only for constants on 64-bitPaul Mackerras2008-09-151-13/+10Star
| | | | | | | | | | | | | | | | | | | | | Using LOAD_REG_IMMEDIATE to get the address of kernel symbols generates 5 instructions where LOAD_REG_ADDR can do it in one, and will generate R_PPC64_ADDR16_* relocations in the output when we get to making the kernel as a position-independent executable, which we'd rather not have to handle. This changes various bits of assembly code to use LOAD_REG_ADDR when we need to get the address of a symbol, or to use suitable position-independent code for cases where we can't access the TOC for various reasons, or if we're not running at the address we were linked at. It also cleans up a few minor things; there's no reason to save and restore SRR0/1 around RTAS calls, __mmu_off can get the return address from LR more conveniently than the caller can supply it in R4 (and we already assume elsewhere that EA == RA if the MMU is on in early boot), and enable_64b_mode was using 5 instructions where 2 would do. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make iSeries spin on __secondary_hold_spinloop, like pSeriesTony Breeds2008-04-241-1/+26
| | | | | | | | | | | | | | Currently all iSeries secondary CPUs spin directly on the cpu_start field in their paca. Make them spin on the global __secondary_hold_spinloop until after the pacas have been initialised. As Stephen Rothwell points out, this works at the moment because __secondary_hold_spinloop is being set already, but iSeries isn't looking at it :) Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: Use alternate paca structure for bootingStephen Rothwell2008-04-151-2/+10
| | | | | | | | | | | | The iSeries HV only needs the first two fields of the paca statically initialised, so create an alternate paca that contains only those and switch to our real paca immediately after boot. This is in order to make the 1024 cpu patches easier since they will no longer have to statically initialise the pacas for iSeries. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Exception numbers are not relevant to iSeriesStephen Rothwell2007-08-221-12/+12
| | | | | | | so remove them from the macros. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Split out iSeries specific exception macrosStephen Rothwell2007-08-221-7/+8
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Move the iSeries exception vectorsStephen Rothwell2007-08-221-0/+136
| | | | | | | out of head_64.S and into platforms/iseries/exception.S Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Move iSeries startup code out of head_64.SStephen Rothwell2007-08-221-0/+114
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>