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* [SPARC64]: NUMA device infrastructure.David S. Miller2008-04-241-1/+4
| | | | | | Record and propagate NUMA information for devices. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix of section mismatch warnings.Sam Ravnborg2008-01-221-8/+9
| | | | | | | | | | | | | | | | | | Fix following Section mismatch warning in sparc64: WARNING: arch/sparc64/kernel/built-in.o(.text+0x13dec): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'psycho_scan_bus' and 'psycho_pbm_init') WARNING: arch/sparc64/kernel/built-in.o(.text+0x14b58): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'sabre_scan_bus' and 'sabre_init') WARNING: arch/sparc64/kernel/built-in.o(.text+0x15ea4): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'schizo_scan_bus' and 'schizo_pbm_init') WARNING: arch/sparc64/kernel/built-in.o(.text+0x17780): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'pci_sun4v_scan_bus' and 'pci_sun4v_get_head') WARNING: arch/sparc64/kernel/built-in.o(.text+0x17d5c): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'pci_fire_scan_bus' and 'pci_fire_get_head') WARNING: arch/sparc64/kernel/built-in.o(.text+0x23860): Section mismatch: reference to .devinit.text:vio_dev_release (between 'vio_create_one' and 'vio_add') WARNING: arch/sparc64/kernel/built-in.o(.text+0x23868): Section mismatch: reference to .devinit.text:vio_dev_release (between 'vio_create_one' and 'vio_add') The pci_* were all missing __init annotations. For the vio.c case it was a function with a wrong annotation which was removed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Spelling fixesJoe Perches2007-12-201-1/+1
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill pci_memspace_mask.David S. Miller2007-10-141-3/+0Star
| | | | | | | It is totally unnecessary as the needed information is properly encoded in the resources. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling.David S. Miller2007-07-301-14/+28
| | | | | | | | | | | | | | | | | | | Fully unify all of the DMA ops so that subordinate bus types to the DMA operation providers (such as ebus, isa, of_device) can work transparently. Basically, we just make sure that for every system device we create, the dev->archdata 'iommu' and 'stc' fields are filled in. Then we have two platform variants of the DMA ops, one for SUN4U which actually programs the real hardware, and one for SUN4V which makes hypervisor calls. This also fixes the crashes in parport_pc on sparc64, reported by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64] PCI: Consolidate PCI access code into pci_common.cDavid S. Miller2007-05-091-120/+2Star
| | | | | | | | | | | | | All the sun4u controllers do the same thing to compute the physical I/O address to poke, and we can move the sun4v code into this common location too. This one needs a bit of testing, in particular the Sabre code had some funny stuff that would break up u16 and/or u32 accesses into pieces and I didn't think that was needed any more. If it is we need to find out why and add back code to do it again. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix request_irq() ignored result warnings in PCI controller code.David S. Miller2007-05-091-36/+68
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill asm-sparc64/pbm.hDavid S. Miller2007-05-091-1/+2
| | | | | | Everything it contains can be hidden in pci_impl.h Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Move index info pci_pbm_info.David S. Miller2007-05-091-26/+25Star
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Move pci_ops into pci_pbm_info.David S. Miller2007-05-091-1/+1
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64] PCI: Use root list of pbm's instead of pci_controller_info'sDavid S. Miller2007-05-091-167/+89Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The idea is to move more and more things into the pbm, with the eventual goal of eliminating the pci_controller_info entirely as there really isn't any need for it. This stage of the transformations requires some reworking of the PCI error interrupt handling. It might be tricky to get rid of the pci_controller_info parenting for a few reasons: 1) When we get an uncorrectable or correctable error we want to interrogate the IOMMU and streaming cache of both PBMs for error status. These errors come from the UPA front-end which is shared between the two PBM PCI bus segments. Historically speaking this is why I choose the datastructure hierarchy of pci_controller_info-->pci_pbm_info 2) The probing does a portid/devhandle match to look for the 'other' pbm, but this is entirely an artifact and can be eliminated trivially. What we could do to solve #1 is to have a "buddy" pointer from one pbm to another. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64] PCI: Use common routine to fetch PBM properties.David S. Miller2007-05-091-9/+1Star
| | | | | | | | | | Namely bus-range and ino-bitmap. This allows us also to eliminate pci_controller_info's pci_{first,last}_busno fields as only the pbm ones are used now. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Convert PCI over to generic struct iommu/strbuf.David S. Miller2007-04-271-6/+6
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix PCI rework to adhere to of_get_property() const return.David S. Miller2007-04-261-3/+3
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Add dummy host controller to root of all PCI domains.David S. Miller2007-04-261-0/+6
| | | | | | | We fake up a dummy one in all cases because that is the simplest thing to do and it happens to be necessary for hypervisor systems. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill pbm->pci_first_slot.David S. Miller2007-04-261-1/+0Star
| | | | | | Set but never used. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill pci_controller->base_address_update().David S. Miller2007-04-261-45/+0Star
| | | | | | Implemented but never actually used. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill pci_controller->resource_adjust()David S. Miller2007-04-261-9/+0Star
| | | | | | | All the implementations can be identical and generic, so no need for controller specific methods. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill PBM ranges software state.David S. Miller2007-04-261-5/+0Star
| | | | | | | It is only used in one spot and we can just fetch the OF property right there. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill PBM intmap software state.David S. Miller2007-04-261-8/+0Star
| | | | | | Set but never used. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Consolidate PCI mem/io resource determination.David S. Miller2007-04-261-78/+3Star
| | | | | | It can be done for every PCI configuration using OF properties. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Minor cleanups to schizo pci controller driver.David S. Miller2007-04-261-79/+31Star
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Probe PCI bus using OF device tree.David S. Miller2007-04-261-24/+2Star
| | | | | | | | | Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
* [PATCH] sparc64 pt_regs fixesAl Viro2006-10-081-4/+4
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] irq-flags: SPARC64: Use the new IRQF_ constantsThomas Gleixner2006-07-021-10/+10
| | | | | | | | | | | Use the new IRQF_ constants and remove the SA_INTERRUPT define Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [SPARC64]: of_device layer IRQ resolutionDavid S. Miller2006-06-301-251/+60Star
| | | | | | | | | | | | | | | | | | Do IRQ determination generically by parsing the PROM properties, and using IRQ controller drivers for final resolution. One immediate positive effect is that all of the IRQ frobbing in the EBUS, ISA, and PCI controller layers has been eliminated. We just look up the of_device and use the properly computed value. The PCI controller irq_build() routines are gone and no longer used. Unfortunately sbus_build_irq() has to remain as there is a direct reference to this in the sunzilog driver. That can be killed off once the sparc32 side of this is written and the sunzilog driver is transformed into an "of" bus driver. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Convert sparc64 PCI layer to in-kernel device tree.David S. Miller2006-06-241-1/+1
| | | | | | | | One thing this change pointed out was that we really should pull the "get 'local-mac-address' property" logic into a helper function all the network drivers can call. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Use in-kernel OBP device tree for PCI controller probing.David S. Miller2006-06-241-97/+76Star
| | | | | | It can be pushed even further down, but this is a first step. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Move over to GENERIC_HARDIRQS.David S. Miller2006-06-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This is the long overdue conversion of sparc64 over to the generic IRQ layer. The kernel image is slightly larger, but the BSS is ~60K smaller due to the reduced size of struct ino_bucket. A lot of IRQ implementation details, including ino_bucket, were moved out of asm-sparc64/irq.h and are now private to arch/sparc64/kernel/irq.c, and most of the code in irq.c totally disappeared. One thing that's different at the moment is IRQ distribution, we do it at enable_irq() time. If the cpu mask is ALL then we round-robin using a global rotating cpu counter, else we pick the first cpu in the mask to support single cpu targetting. This is similar to what powerpc's XICS IRQ support code does. This works fine on my UP SB1000, and the SMP build goes fine and runs on that machine, but lots of testing on different setups is needed. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Virtualize IRQ numbers.David S. Miller2006-06-201-45/+41Star
| | | | | | | | | | | | | | | | | | | | | | | | | Inspired by PowerPC XICS interrupt support code. All IRQs are virtualized in order to keep NR_IRQS from needing to be too large. Interrupts on sparc64 are arbitrary 11-bit values, but we don't need to define NR_IRQS to 2048 if we virtualize the IRQs. As PCI and SBUS controller drivers build device IRQs, we divy out virtual IRQ numbers incrementally starting at 1. Zero is a special virtual IRQ used for the timer interrupt. So device drivers all see virtual IRQs, and all the normal interfaces such as request_irq(), enable_irq(), etc. translate that into a real IRQ number in order to configure the IRQ. At this point knowledge of the struct ino_bucket is almost entirely contained within arch/sparc64/kernel/irq.c There are a few small bits in the PCI controller drivers that need to be swept away before we can remove ino_bucket's definition out of asm-sparc64/irq.h and privately into kernel/irq.c Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill ino_bucket->pilDavid S. Miller2006-06-201-102/+2Star
| | | | | | | | | | | And reuse that struct member for virt_irq, which will be used in future changesets for the implementation of mapping between real and virtual IRQ numbers. This nicely kills off a ton of SBUS and PCI controller PIL assignment code which is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix new context version SMP handling.David S. Miller2006-03-201-6/+6
| | | | | | | | | | | | | | | | Don't piggy back the SMP receive signal code to do the context version change handling. Instead allocate another fixed PIL number for this asynchronous cross-call. We can't use smp_call_function() because this thing is invoked with interrupts disabled and a few spinlocks held. Also, fix smp_call_function_mask() to count "cpus" correctly. There is no guarentee that the local cpu is in the mask yet that is exactly what this code was assuming. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: kzalloc() conversionEric Sesterhenn2006-03-201-8/+4Star
| | | | | | | | this patch converts arch/sparc64 to kzalloc usage. Crosscompile tested with allyesconfig. Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Consolidate common PCI IOMMU init code.David S. Miller2005-10-141-54/+3Star
| | | | | | | All the PCI controller drivers were doing the same thing setting up the IOMMU software state, put it all in one spot. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix mask formation in tomatillo_wsync_handler()David S. Miller2005-09-251-1/+1
| | | | | | "1" needs to be "1UL", this is a 64-bit mask we're creating. Signed-off-by: David S. Miller <davem@davemloft.net>
* [PATCH] Make sparc64 use setup-res.cDavid S. Miller2005-09-081-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were three changes necessary in order to allow sparc64 to use setup-res.c: 1) Sparc64 roots the PCI I/O and MEM address space using parent resources contained in the PCI controller structure. I'm actually surprised no other platforms do this, especially ones like Alpha and PPC{,64}. These resources get linked into the iomem/ioport tree when PCI controllers are probed. So the hierarchy looks like this: iomem --| PCI controller 1 MEM space --| device 1 device 2 etc. PCI controller 2 MEM space --| ... ioport --| PCI controller 1 IO space --| ... PCI controller 2 IO space --| ... You get the idea. The drivers/pci/setup-res.c code allocates using plain iomem_space and ioport_space as the root, so that wouldn't work with the above setup. So I added a pcibios_select_root() that is used to handle this. It uses the PCI controller struct's io_space and mem_space on sparc64, and io{port,mem}_resource on every other platform to keep current behavior. 2) quirk_io_region() is buggy. It takes in raw BUS view addresses and tries to use them as a PCI resource. pci_claim_resource() expects the resource to be fully formed when it gets called. The sparc64 implementation would do the translation but that's absolutely wrong, because if the same resource gets released then re-claimed we'll adjust things twice. So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource() conversion before passing it on to pci_claim_resource(). 3) I was mistakedly __init'ing the function methods the PCI controller drivers provide on sparc64 to implement some parts of these routines. This was, of course, easy to fix. So we end up with the following, and that nasty SPARC64 makefile ifdef in drivers/pci/Makefile is finally zapped. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [SPARC64]: Fix IRQ retry interval timer value on sparc64 PCI controllers.David S. Miller2005-07-051-3/+1Star
| | | | | | Use '5' instead of 'infinity'. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Small Schizo PCI controller programming tweaks.David S. Miller2005-07-041-15/+8Star
| | | | | | | | | | | | | Use macro instead of magic value for Tomatillo discard- timeout interrupt enable register bit. Leave OBP programming PTO value unless Tomatillo and version >= 0x2. If no-bus-parking property is present, explicitly clear PCICTRL_PARK bit. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Do proper DMA IRQ syncing on TomatilloDavid S. Miller2005-07-041-0/+51
| | | | | | | | | | | | | | | This was the main impetus behind adding the PCI IRQ shim. In order to properly order DMA writes wrt. interrupts, you have to write to a PCI controller register, then poll for that bit clearing. There is one bit for each interrupt source, and setting this register bit tells Tomatillo to drain all pending DMA from that device. Furthermore, Tomatillo's with revision less than 4 require us to do a block store due to some memory transaction ordering issues it has on JBUS. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix streaming buffer flushing on PCI and SBUS.David S. Miller2005-06-011-1/+1
| | | | | | | | | | | | | Firstly, if the direction is TODEVICE, then dirty data in the streaming cache is impossible so we can elide the flush-flag synchronization in that case. Next, the context allocator is broken. It is highly likely that contexts get used multiple times for different dma mappings, which confuses the strbuf flushing code and makes it run inefficiently. Signed-off-by: David S. Miller <davem@davemloft.net>
* Linux-2.6.12-rc2Linus Torvalds2005-04-171-0/+2187
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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