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* xtensa: remap io area defined in device treeBaruch Siach2014-01-141-0/+37
| | | | | | | | | | | | | | | | | Use the simple-bus node to discover the io area, and remap the cached and bypass io ranges. The parent-bus-address value of the first triplet in the "ranges" property is used. This value is rounded down to the nearest 256MB boundary. The length of the io area is fixed at 256MB; the "ranges" property length value is ignored. Other limitations: (1) only the first simple-bus node is considered, and (2) only the first triplet of the "ranges" property is considered. See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the "ranges" property description. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: support default device tree busesBaruch Siach2014-01-141-1/+1
| | | | | | | This currently includes simple-bus. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: initialize device tree clock sourcesBaruch Siach2014-01-141-0/+1
| | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: Enable irqs after cpu is set onlineKirill Tkhai2014-01-141-1/+2
| | | | | | | | | | | | there is a small possibility that wake_up of softirq thread happens between local_irq_enable() and set_cpu_online(). In this case affinity of the thread changes to fallback affinity (i.e. CPU0). This may be a source of problems. The patch kills that possibility. Signed-off-by: Kirill Tkhai <tkhai@yandex.ru> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: Switch to sched_clock_register()Stephen Boyd2014-01-141-2/+2
| | | | | | | | | | The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: implement CPU hotplugMax Filippov2014-01-145-4/+229
| | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add SMP supportMax Filippov2014-01-148-71/+750
| | | | | | | | | This is largely based on SMP code from the xtensa-2.6.29-smp tree by Piet Delaney, Marc Gauthier, Joe Taylor, Christian Zankel (and possibly other Tensilica folks). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add MX irqchipMax Filippov2014-01-141-0/+8
| | | | | | | | MX is an interrupt distributor used in some SMP-capable xtensa configurations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: clear timer IRQ unconditionally in its handlerMax Filippov2014-01-141-0/+1
| | | | | | | | | | | | | | | PIC irq_ack doesn't clear timer IRQ, because timer interrupt handler usually set up new timer by writing to ccompare register and thus clearing timer IRQ. However timer may not be set up in the IRQ handler, e.g. with tickless idle on SMP, or when CPU is going offline, leaving timer IRQ raised and making do_interrupt attempting to handle it forever. To fix this always write current value of ccompare SR chosen to be linux timer back to that SR on entry to timer interrupt handler. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: clean up do_interrupt/do_IRQMax Filippov2014-01-142-20/+9Star
| | | | | | | | | | | | - set up irq registers and call irq_enter/irq_exit once for each kernel entry due to interrupt; - don't attempt to clear current IRQ in the do_interrupt, IRQ handler will take care of it; - find pending interrupt with highest priority before every ISR invocation. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: move built-in PIC to drivers/irqchipMax Filippov2014-01-141-107/+30Star
| | | | | | | | | Extract xtensa built-in interrupt controller implementation from xtensa/kernel/irq.c and move it to other irqchips, providing way to instantiate it from the device tree. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: move init_mmu declaration to mmu_context.hMax Filippov2014-01-141-6/+1Star
| | | | | | | Secondary CPUs need this declaration to initialize their MMUs. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: call check_s32c1i after trap_initMax Filippov2014-01-141-11/+7Star
| | | | | | | | Otherwise exceptions may occur prior to exception handling mechanism initialization, resulting in silently dead system. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: update clockevent setup for SMPMax Filippov2014-01-141-25/+29
| | | | | | | | Provide per-cpu ccount_timer objects and use them appropriately. Extract per-cpu clockevent setup function. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: mark ccount as continuous clocksourceBaruch Siach2014-01-141-0/+1
| | | | | | | | This allows ccount to be used as highres timer. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* Merge tag 'devicetree-for-3.13' of ↵Linus Torvalds2013-11-121-41/+14Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DeviceTree updates for 3.13. This is a bit larger pull request than usual for this cycle with lots of clean-up. - Cross arch clean-up and consolidation of early DT scanning code. - Clean-up and removal of arch prom.h headers. Makes arch specific prom.h optional on all but Sparc. - Addition of interrupts-extended property for devices connected to multiple interrupt controllers. - Refactoring of DT interrupt parsing code in preparation for deferred probe of interrupts. - ARM cpu and cpu topology bindings documentation. - Various DT vendor binding documentation updates" * tag 'devicetree-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (82 commits) powerpc: add missing explicit OF includes for ppc dt/irq: add empty of_irq_count for !OF_IRQ dt: disable self-tests for !OF_IRQ of: irq: Fix interrupt-map entry matching MIPS: Netlogic: replace early_init_devtree() call of: Add Panasonic Corporation vendor prefix of: Add Chunghwa Picture Tubes Ltd. vendor prefix of: Add AU Optronics Corporation vendor prefix of/irq: Fix potential buffer overflow of/irq: Fix bug in interrupt parsing refactor. of: set dma_mask to point to coherent_dma_mask of: add vendor prefix for PHYTEC Messtechnik GmbH DT: sort vendor-prefixes.txt of: Add vendor prefix for Cadence of: Add empty for_each_available_child_of_node() macro definition arm/versatile: Fix versatile irq specifications. of/irq: create interrupts-extended property microblaze/pci: Drop PowerPC-ism from irq parsing of/irq: Create of_irq_parse_and_map_pci() to consolidate arch code. of/irq: Use irq_of_parse_and_map() ...
| * of: remove early_init_dt_setup_initrd_archRob Herring2013-10-091-11/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All arches do essentially the same thing now for early_init_dt_setup_initrd_arch, so it can now be removed. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Mark Salter <msalter@redhat.com> Cc: Aurelien Jacquiot <a-jacquiot@ti.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jonas Bonn <jonas@southpole.se> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: x86@kernel.org Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Grant Likely <grant.likely@linaro.org>
| * xtensa: use early_init_dt_scanRob Herring2013-10-091-12/+9Star
| | | | | | | | | | | | | | | | | | Convert xtensa to use new early_init_dt_scan function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Cc: Chris Zankel <chris@zankel.net> Cc: linux-xtensa@linux-xtensa.org
| * xtensa: use unflatten_and_copy_device_treeRob Herring2013-10-091-18/+1Star
| | | | | | | | | | | | | | | | | | | | | | Use the common unflatten_and_copy_device_tree to copy the built-in FDT out of init section. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Cc: linux-xtensa@linux-xtensa.org Acked-by: Grant Likely <grant.likely@linaro.org>
* | xtensa: don't use alternate signal stack on threadsBaruch Siach2013-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to create_thread(3): "The new thread does not inherit the creating thread's alternate signal stack". Since commit f9a3879a (Fix sigaltstack corruption among cloned threads), current->sas_ss_size is set to 0 for cloned processes sharing VM with their parent. Don't use the (nonexistent) alternate signal stack in this case. This has been broken since commit 29c4dfd9 ([XTENSA] Remove non-rt signal handling). Fixes the SA_ONSTACK part of the nptl/tst-cancel20 test from uClibc. Cc: <stable@vger.kernel.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* | xtensa: fix fast_syscall_spill_registers_fixupMax Filippov2013-10-151-19/+30
|/ | | | | | | | | | | | | | | | | | fast_syscall_spill_registers_fixup was not correctly updated by the 'keep a3 and excsave1 on entry to exception handlers' patch: it doesn't preserve a3 that it gets on entry, breaking _spill_registers in case of page fault on stack during register spilling, leading to unhandled exception in kernel mode. Preserve a3 by saving it in the original _spill_registers stack frame's a3 during exception handling and restoring it afterwards. Also fix comments and function bounds annotations. Reported-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Chris Zankel <chris@zankel.net>
* Merge tag 'xtensa-next-20130912' of git://github.com/czankel/xtensa-linuxLinus Torvalds2013-09-137-344/+320Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Pull Xtensa updates from Chris Zankel. * tag 'xtensa-next-20130912' of git://github.com/czankel/xtensa-linux: xtensa: Fix broken allmodconfig build xtensa: remove CCOUNT_PER_JIFFY xtensa: fix !CONFIG_XTENSA_CALIBRATE_CCOUNT build failure xtensa: don't use echo -e needlessly xtensa: new fast_alloca handler xtensa: keep a3 and excsave1 on entry to exception handlers xtensa: enable kernel preemption xtensa: check thread flags atomically on return from user exception
| * xtensa: Fix broken allmodconfig buildGuenter Roeck2013-09-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xtansa allmodbuild fails with: arch/xtensa/kernel/xtensa_ksyms.c:129:1: error: '_mcount' undeclared here (not in a function) make[2]: *** [arch/xtensa/kernel/xtensa_ksyms.o] Error 1 make[1]: *** [arch/xtensa/kernel] Error 2 The breakage is due to commit 478ba61af (xtensa: add static function tracer support) which exports _mcount without declaring it. Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: remove CCOUNT_PER_JIFFYBaruch Siach2013-09-062-4/+4
| | | | | | | | | | | | | | | | Use ccount_freq directly to make the code a little more readable. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: fix !CONFIG_XTENSA_CALIBRATE_CCOUNT build failureBaruch Siach2013-09-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Commits 925f5532 (xtensa: ccount based clockevent implementation) and e3f43291 (xtensa: ccount based sched_clock) introduced users of ccount_freq. This variable doesn't exist when CONFIG_XTENSA_CALIBRATE_CCOUNT is disabled. Add ccount_freq definition in this case. Reported-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: new fast_alloca handlerMax Filippov2013-09-061-152/+40Star
| | | | | | | | | | | | | | | | | | Instead of emulating movsp instruction in the kernel use window underflow handler to load missing register window and retry failed movsp. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: keep a3 and excsave1 on entry to exception handlersMax Filippov2013-09-064-142/+237
| | | | | | | | | | | | | | | | | | Based on the SMP patch by Joe Taylor and subsequent fixes. Preserve exception table pointer (normally stored in excsave1 SR) as it cannot be easily restored in SMP environment. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: enable kernel preemptionMax Filippov2013-09-061-28/+17Star
| | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: check thread flags atomically on return from user exceptionMax Filippov2013-09-061-18/+21
| | | | | | | | | | | | | | | | | | | | Check pending signals and rescheduling thread flags with interrupts disabled, and don't enable them if no flags are set. Call trace_hardirqs_on after thread flags handling, so that rescheduling is done and hardirqs tracking flag is updated in the correct task context. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* | of: Specify initrd location using 64-bitSantosh Shilimkar2013-07-241-2/+1Star
|/ | | | | | | | | | | | | | | | | | | | | | | | | On some PAE architectures, the entire range of physical memory could reside outside the 32-bit limit. These systems need the ability to specify the initrd location using 64-bit numbers. This patch globally modifies the early_init_dt_setup_initrd_arch() function to use 64-bit numbers instead of the current unsigned long. There has been quite a bit of debate about whether to use u64 or phys_addr_t. It was concluded to stick to u64 to be consistent with rest of the device tree code. As summarized by Geert, "The address to load the initrd is decided by the bootloader/user and set at that point later in time. The dtb should not be tied to the kernel you are booting" More details on the discussion can be found here: https://lkml.org/lkml/2013/6/20/690 https://lkml.org/lkml/2012/9/13/544 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Grant Likely <grant.likely@linaro.org>
* xtensa: delete __cpuinit usage from all xtensa filesPaul Gortmaker2013-07-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) are flagged as __cpuinit -- so if we remove the __cpuinit from arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. This removes all the arch/xtensa uses of the __cpuinit macros from all C files. Currently xtensa does not have any __CPUINIT used in assembly files. [1] https://lkml.org/lkml/2013/5/20/589 Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: linux-xtensa@linux-xtensa.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* xtensa: add static function tracer supportMax Filippov2013-07-083-0/+55
| | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: Flat DeviceTree copy not future-safeVineet Gupta2013-07-081-1/+1
| | | | | | | | | | | | | | | | flat DT copy code calls bootmem allocator with @align = 0. This is probably OK with legacy allocator which xtensa uses right now, but this will panic right away with memblock allocator Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Marc Gauthier <marc@tensilica.com> Cc: linux-xtensa@linux-xtensa.org Cc: linux-kernel@vger.kernel.org Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: check TLB sanity on return to userspaceMax Filippov2013-07-081-1/+8
| | | | | | | | | - check that user TLB mappings correspond to the current page table; - check that TLB mapping VPN is in the kernel/user address range in accordance with its ASID. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: adjust boot parameters address when ↵Max Filippov2013-07-082-3/+12
| | | | | | | | | | | | | | | | INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is selected The virtual address of boot parameters chain is passed to the kernel via a2 register. Adjust it in case it is remapped during MMUv3 -> MMUv2 mapping change, i.e. when it is in the first 128M. Also fix interpretation of initrd and FDT addresses passed in the boot parameters: these are physical addresses. Cc: stable@vger.kernel.org Reported-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: ccount based sched_clockBaruch Siach2013-07-081-0/+8
| | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: ccount based clockevent implementationBaruch Siach2013-07-081-32/+78
| | | | | | | | Reused some code from a preliminary implementation by Max Fillippov. Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: cleanup ccount frequency trackingBaruch Siach2013-07-082-5/+4Star
| | | | | | | Remove unused nsec_per_ccount, and rename ccount_per_jiffy to ccount_preq. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: fix section mismatch in pcibios_fixup_busMax Filippov2013-06-051-5/+5
| | | | | | | | | | Remove __init annotation from pcibios_fixup_bus as is called from pci_scan_child_bus which is not __init. Also fix a couple of minor build warnings. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: remove unused platform_init_irq()Baruch Siach2013-06-051-1/+0Star
| | | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: tell git to ignore generated filesBaruch Siach2013-06-051-0/+1
| | | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: fix fast_store_prohibited _PAGE_WRITABLE_BIT testMax Filippov2013-05-201-1/+6
| | | | | | | | | Before _PAGE_WRITABLE_BIT test fast_store_prohibited must make sure that PTE is present. Otherwise 'writable' bit is undefined and may be reused in the 'file offset' or 'swap type' PTE fields. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* Merge tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-linuxLinus Torvalds2013-05-099-123/+265
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull xtensa updates from Chris Zankel: "Support for the latest MMU architecture that allows for a larger accessible memory region, and various bug-fixes" * tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-linux: xtensa: Switch to asm-generic/linkage.h xtensa: fix redboot load address xtensa: ISS: fix timer_lock usage in rs_open xtensa: disable IRQs while IRQ handler is running xtensa: enable lockdep support xtensa: fix arch_irqs_disabled_flags implementation xtensa: add irq flags trace support xtensa: provide custom CALLER_ADDR* implementations xtensa: add stacktrace support xtensa: clean up stpill_registers xtensa: don't use a7 in simcalls xtensa: don't attempt to use unconfigured timers xtensa: provide default platform_pcibios_init implementation xtensa: remove KCORE_ELF again xtensa: document MMUv3 setup sequence xtensa: add MMU v3 support xtensa: fix ibreakenable register update xtensa: fix oprofile building as module
| * xtensa: disable IRQs while IRQ handler is runningMax Filippov2013-05-093-55/+28Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IRQ handlers are expected to run with IRQs disabled. See e.g. http://lwn.net/Articles/380931/ for a longer story. This was overlooked in the commit 2d1c645 xtensa: dispatch medium-priority interrupts Revert to old behavior and simplify interrupt entry and exit code. Interrupt handler still honours IRQ priority. do_notify_resume/schedule must be called with interrupts enabled, enable interrupts if we return from user exception. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: add irq flags trace supportMax Filippov2013-05-091-0/+32
| | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: provide custom CALLER_ADDR* implementationsMax Filippov2013-05-091-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Definition of CALLER_ADDR* through __builtin_return_address makes compiler insert calls to __xtensa_libgcc_window_spill, which in turn makes fast_syscall_spill_registers syscall that clobbers registers when called from the kernel mode, leading to invalid opcode exceptions on return to userspace. Provide definition for CALLER_ADDR0 as MAKE_PC_FROM_RA(a0, a1) and in case CONFIG_FRAME_POINTER is enabled extract CALLER_ADDR{1-3} from stack. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: add stacktrace supportMax Filippov2013-05-093-41/+101
| | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: provide default platform_pcibios_init implementationMax Filippov2013-05-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following build error: arch/xtensa/kernel/built-in.o:(.init.literal+0xe8): undefined reference to `platform_pcibios_init' arch/xtensa/kernel/built-in.o: In function `setup_arch': (.init.text+0x20e): undefined reference to `platform_pcibios_init' and allows platform to omit definition of platform_pcibios_init if it's empty. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: add MMU v3 supportMax Filippov2013-05-094-27/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB way 6: Way 6 (512 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0x00000000 0x00000000 0x01 0x03 RWX Bypass 0x20000000 0x20000000 0x01 0x03 RWX Bypass 0x40000000 0x40000000 0x01 0x03 RWX Bypass 0x60000000 0x60000000 0x01 0x03 RWX Bypass 0x80000000 0x80000000 0x01 0x03 RWX Bypass 0xa0000000 0xa0000000 0x01 0x03 RWX Bypass 0xc0000000 0xc0000000 0x01 0x03 RWX Bypass 0xe0000000 0xe0000000 0x01 0x03 RWX Bypass This patch adds remapping code at the reset vector or at the kernel _start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that reconfigures MMUv3 as MMUv2: Way 5 (128 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xd0000000 0x00000000 0x01 0x07 RWX WB 0xd8000000 0x00000000 0x01 0x03 RWX Bypass Way 6 (256 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xe0000000 0xf0000000 0x01 0x07 RWX WB 0xf0000000 0xf0000000 0x01 0x03 RWX Bypass Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * xtensa: fix ibreakenable register updateMax Filippov2013-05-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Only set the register when there is at least one ibreak register, otherwise the build fails: arch/xtensa/kernel/head.S:105: Error: invalid register 'ibreakenable' for 'wsr' instruction arch/xtensa/platforms/iss/setup.c:67: Error: invalid register 'ibreakenable' for 'wsr' instruction Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-21 10:03:49 +0200