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* dmaengine: cleanup unused transaction typesDan Williams2009-09-092-9/+0Star
| | | | | | | No drivers currently implement these operation types, so they can be deleted. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* Merge branch 'md-raid6-accel' into ioat3.2Dan Williams2009-09-094-13/+16
|\ | | | | | | | | Conflicts: include/linux/dmaengine.h
| * async_tx: add support for asynchronous GF multiplicationDan Williams2009-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ Based on an original patch by Yuri Tikhonov ] This adds support for doing asynchronous GF multiplication by adding two additional functions to the async_tx API: async_gen_syndrome() does simultaneous XOR and Galois field multiplication of sources. async_syndrome_val() validates the given source buffers against known P and Q values. When a request is made to run async_pq against more than the hardware maximum number of supported sources we need to reuse the previous generated P and Q values as sources into the next operation. Care must be taken to remove Q from P' and P from Q'. For example to perform a 5 source pq op with hardware that only supports 4 sources at a time the following approach is taken: p, q = PQ(src0, src1, src2, src3, COEF({01}, {02}, {04}, {08})) p', q' = PQ(p, q, q, src4, COEF({00}, {01}, {00}, {10})) p' = p + q + q + src4 = p + src4 q' = {00}*p + {01}*q + {00}*q + {10}*src4 = q + {10}*src4 Note: 4 is the minimum acceptable maxpq otherwise we punt to synchronous-software path. The DMA_PREP_CONTINUE flag indicates to the driver to reuse p and q as sources (in the above manner) and fill the remaining slots up to maxpq with the new sources/coefficients. Note1: Some devices have native support for P+Q continuation and can skip this extra work. Devices with this capability can advertise it with dma_set_maxpq. It is up to each driver how to handle the DMA_PREP_CONTINUE flag. Note2: The api supports disabling the generation of P when generating Q, this is ignored by the synchronous path but is implemented by some dma devices to save unnecessary writes. In this case the continuation algorithm is simplified to only reuse Q as a source. Cc: H. Peter Anvin <hpa@zytor.com> Cc: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> Reviewed-by: Andre Noll <maan@systemlinux.org> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * async_tx: add sum check flagsDan Williams2009-08-302-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Replace the flat zero_sum_result with a collection of flags to contain the P (xor) zero-sum result, and the soon to be utilized Q (raid6 reed solomon syndrome) zero-sum result. Use the SUM_CHECK_ namespace instead of DMA_ since these flags will be used on non-dma-zero-sum enabled platforms. Reviewed-by: Andre Noll <maan@systemlinux.org> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * async_tx: rename zero_sum to valDan Williams2009-04-082-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | 'zero_sum' does not properly describe the operation of generating parity and checking that it validates against an existing buffer. Change the name of the operation to 'val' (for 'validate'). This is in anticipation of the p+q case where it is a requirement to identify the target parity buffers separately from the source buffers, because the target parity buffers will not have corresponding pq coefficients. Reviewed-by: Andre Noll <maan@systemlinux.org> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | cpumask: alloc zeroed cpumask for static cpumask_var_tsYinghai Lu2009-06-096-6/+6
| | | | | | | | | | | | | | | | These are defined as static cpumask_var_t so if MAXSMP is not used, they are cleared already. Avoid surprises when MAXSMP is enabled. Signed-off-by: Yinghai Lu <yinghai.lu@kernel.org> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
* | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2009-06-088-101/+74Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: MIPS: Outline udelay and fix a few issues. MIPS: ioctl.h: Fix headers_check warnings MIPS: Cobalt: PCI bus is always required to obtain the board ID MIPS: Kconfig: Remove "Support for" from Cavium system type MIPS: Sibyte: Honor CONFIG_CMDLINE SSB: BCM47xx: Export ssb_watchdog_timer_set
| * | MIPS: Outline udelay and fix a few issues.Ralf Baechle2009-06-085-92/+66Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Outlining fixes the issue were on certain CPUs such as the R10000 family the delay loop would need an extra cycle if it overlaps a cacheline boundary. The rewrite also fixes build errors with GCC 4.4 which was changed in way incompatible with the kernel's inline assembly. Relying on pure C for computation of the delay value removes the need for explicit. The price we pay is a slight slowdown of the computation - to be fixed on another day. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: ioctl.h: Fix headers_check warningsJaswinder Singh Rajput2009-06-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make ioctl.h compatible with asm-generic/ioctl.h and userspace fix the following 'make headers_check' warning: usr/include/asm-mips/ioctl.h:64: extern's make no sense in userspace Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Cobalt: PCI bus is always required to obtain the board IDYoichi Yuasa2009-06-081-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Kconfig: Remove "Support for" from Cavium system typeYoichi Yuasa2009-06-081-2/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | MIPS: Sibyte: Honor CONFIG_CMDLINERalf Baechle2009-06-081-7/+1Star
| | | | | | | | | | | | | | | | | | Original patch by Imre Kaloz <kaloz@openwrt.org>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-06-089-24/+50
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 5543/1: arm: serial amba: add missing declaration in serial.h [ARM] pxa: fix pxa27x_udc default pullup GPIO [ARM] pxa/imote2: fix UCAM sensor board ADC model number mx[23]: don't put clock lookups in __initdata fix oops when using console=ttymxcN with N > 0 [ARM] ARMv7 errata: only apply fixes when running on applicable CPU [ARM] 5534/1: kmalloc must return a cache line aligned buffer
| * | Merge branch 'fix' of ↵Russell King2009-06-042-2/+5
| |\ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
| | * | [ARM] pxa: fix pxa27x_udc default pullup GPIOPhilipp Zabel2009-06-041-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, pxa27x_udc tries to use GPIO 0 as D+ pullup if not explicitly configured. Default to an invalid GPIO (-1) instead. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | [ARM] pxa/imote2: fix UCAM sensor board ADC model numberJonathan Cameron2009-06-041-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6Russell King2009-06-045-87/+199
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| | * | | mx[23]: don't put clock lookups in __initdataRabin Vincent2009-06-034-4/+4
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the __initdata annotation for the clock lookups, since they will be needed when loading modules which use clk_get(). Tested-by: Agustín Ferrín Pozuelo <gatoguan-os@yahoo.com> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | [ARM] ARMv7 errata: only apply fixes when running on applicable CPURussell King2009-06-021-11/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, whenever an erratum workaround is enabled, it will be applied whether or not the erratum is relevent for the CPU. This patch changes this - we check the variant and revision fields in the main ID register to determine which errata to apply. We also avoid re-applying erratum 460075 if it has already been applied. Applying this fix in non-secure mode results in the kernel failing to boot (or even do anything.) This fixes booting on some ARMv7 based platforms which otherwise silently fail. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 5534/1: kmalloc must return a cache line aligned bufferMartin Fuzzey2009-06-022-7/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define ARCH_KMALLOC_MINALIGN in asm/cache.h At the request of Russell also move ARCH_SLAB_MINALIGN to this file. Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2009-06-061-3/+3
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: x86/pci: fix mmconfig detection with 32bit near 4g PCI: use fixed-up device class when configuring device
| * | | | x86/pci: fix mmconfig detection with 32bit near 4gYinghai Lu2009-06-041-3/+3
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pascal reported and bisected a commit: | x86/PCI: don't call e820_all_mapped with -1 in the mmconfig case which broke one system system. ACPI: Using IOAPIC for interrupt routing PCI: MCFG configuration 0: base f0000000 segment 0 buses 0 - 255 PCI: MCFG area at f0000000 reserved in ACPI motherboard resources PCI: Using MMCONFIG for extended config space it didn't have PCI: updated MCFG configuration 0: base f0000000 segment 0 buses 0 - 63 anymore, and try to use 0xf000000 - 0xffffffff for mmconfig For 32bit, mcfg_res->end could be 32bit only (if 64 resources aren't used) So use end - 1 to pass the value in mcfg->end to avoid overflow. We don't need to worry about the e820 path, they are always 64 bit. Reported-by: Pascal Terjan <pterjan@mandriva.com> Bisected-by: Pascal Terjan <pterjan@mandriva.com> Tested-by: Pascal Terjan <pterjan@mandriva.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: stable@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | | [CPUFREQ] powernow-k8: check space_id of _PCT registers to be FFHDave Jones2009-06-051-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The powernow-k8 driver checks to see that the Performance Control/Status Registers are declared as FFH (functional fixed hardware) by the BIOS. However, this check got broken in the commit: 0e64a0c982c06a6b8f5e2a7f29eb108fdf257b2f [CPUFREQ] checkpatch cleanups for powernow-k8 Fix based on an original patch from Naga Chumbalkar. Signed-off-by: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Cc: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
* | | | lguest: fix 'unhandled trap 13' with CONFIG_CC_STACKPROTECTORRusty Russell2009-06-042-4/+14
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't set up the canary; let's disable stack protector on boot.c so we can get into lguest_init, then set it up. As a side effect, switch_to_new_gdt() sets up %fs for us properly too. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* / / powerpc/pmac: Update PowerMac 32-bit defconfigBenjamin Herrenschmidt2009-06-021-83/+195
|/ / | | | | | | | | | | | | This mostly adds back AppleTouch support and adds CONFIG_HIGHMEM by default. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2009-06-013-4/+5
|\ \ | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc64: Fix section attribute warnings. sparc64: Fix SET_PERSONALITY to not clip bits outside of PER_MASK.
| * | sparc64: Fix section attribute warnings.David S. Miller2009-05-302-2/+2
| | | | | | | | | | | | | | | | | | | | | CSUM copy to/from user assembler was missing allocatable and executable attributes for .fixup Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Fix SET_PERSONALITY to not clip bits outside of PER_MASK.David S. Miller2009-05-081-2/+3
| | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Merge branch 'release' of ↵Linus Torvalds2009-05-301-2/+2
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6: ACPI, i915: build fix (v2) acpi-cpufreq: fix printk typo and indentation ACPI processor: remove spurious newline from warning message drm/i915: acpi/video.c fix section mismatch warning ACPI: video: DMI workaround broken Acer 5315 BIOS enabling display brightness ACPI: video: DMI workaround broken eMachines E510 BIOS enabling display brightness ACPI: sanity check _PSS frequency to prevent cpufreq crash i7300_idle: allow testing on i5000-series hardware w/o re-compile PCI/ACPI: fix wrong ref count handling in acpi_pci_bind() cpuidle: fix AMD C1E suspend hang cpuidle: makes AMD C1E work in acpi_idle
| * | | acpi-cpufreq: fix printk typo and indentationJoe Perches2009-05-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Len Brown <len.brown@intel.com>
* | | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-05-3026-67/+460
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] update mach-types [ARM] Add cmpxchg support for ARMv6+ systems (v5) [ARM] barriers: improve xchg, bitops and atomic SMP barriers Gemini: Fix SRAM/ROM location after memory swap MAINTAINER: Add F: entries for Gemini and FA526 [ARM] disable NX support for OABI-supporting kernels [ARM] add coherent DMA mask for mv643xx_eth [ARM] pxa/palm: fix PalmLD/T5/TX AC97 MFP [ARM] pxa: add parameter to clksrc_read() for pxa168/910 [ARM] pxa: fix the incorrectly defined drive strength macros for pxa{168,910} [ARM] Orion: Remove explicit name for platform device resources [ARM] Kirkwood: Correct MPP for SATA activity/presence LEDs of QNAP TS-119/TS-219. [ARM] pxa/ezx: fix pin configuration for low power mode [ARM] pxa/spitz: provide spitz_ohci_exit() that unregisters USB_HOST GPIO [ARM] pxa: enable GPIO receivers after configuring pins [ARM] pxa: allow gpio_reset drive high during normal work [ARM] pxa: save/restore PGSR on suspend/resume.
| * | | Merge branch 'for-rmk' of git://gitorious.org/linux-gemini/mainlineRussell King2009-05-2930-309/+549
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| | * | | Gemini: Fix SRAM/ROM location after memory swapPaulius Zaleckas2009-05-281-2/+1Star
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
| * | | | [ARM] update mach-typesRussell King2009-05-291-9/+122
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] Add cmpxchg support for ARMv6+ systems (v5)Mathieu Desnoyers2009-05-281-0/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cmpxchg/cmpxchg64 support for ARMv6K and ARMv7 systems (original patch from Catalin Marinas <catalin.marinas@arm.com>) The cmpxchg and cmpxchg64 functions can be implemented using the LDREX*/STREX* instructions. Since operand lengths other than 32bit are required, the full implementations are only available if the ARMv6K extensions are present (for the LDREXB, LDREXH and LDREXD instructions). For ARMv6, only 32-bits cmpxchg is available. Mathieu : Make cmpxchg_local always available with best implementation for all type sizes (1, 2, 4 bytes). Make cmpxchg64_local always available. Use "Ir" constraint for "old" operand, like atomic.h atomic_cmpxchg does. Change since v3 : - Add "memory" clobbers (thanks to Nicolas Pitre) - removed __asmeq(), only needed for old compilers, very unlikely on ARMv6+. Note : ARMv7-M should eventually be ifdefed-out of cmpxchg64. But it's not supported by the Linux kernel currently. Put back arm < v6 cmpxchg support. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] barriers: improve xchg, bitops and atomic SMP barriersRussell King2009-05-285-13/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mathieu Desnoyers pointed out that the ARM barriers were lacking: - cmpxchg, xchg and atomic add return need memory barriers on architectures which can reorder the relative order in which memory read/writes can be seen between CPUs, which seems to include recent ARM architectures. Those barriers are currently missing on ARM. - test_and_xxx_bit were missing SMP barriers. So put these barriers in. Provide separate atomic_add/atomic_sub operations which do not require barriers. Reported-Reviewed-and-Acked-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge branch 'for-rmk' of git://git.marvell.com/orionRussell King2009-05-235-12/+29
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| | * | | | [ARM] add coherent DMA mask for mv643xx_ethNicolas Pitre2009-05-224-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit eb0519b5a1cf, mv643xx_eth is non functional on ARM because the platform device declaration does not include any coherent DMA mask and coherent memory allocations fail. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | * | | | [ARM] Orion: Remove explicit name for platform device resourcesMartin Michlmayr2009-05-213-8/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove explicit names from platform device resources since they will automatically be named after the platform device they're associated with. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Acked-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | * | | | [ARM] Kirkwood: Correct MPP for SATA activity/presence LEDs of QNAP ↵Thomas Reitmayr2009-05-211-4/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TS-119/TS-219. For the QNAP TS-119 and TS-219 the wrong MPPs were used for the SATA activity/presence LEDs. The new settings make these LEDs work as expected. Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | | | | [ARM] disable NX support for OABI-supporting kernelsRussell King2009-05-231-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our signal syscall restart handling for these kernels still uses the userspace stack to build code for restarting the syscall. Unfortunately, fixing this is non-trivial, and so for the time being, we resolve the problem by disabling NX support. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | Merge branch 'fix' of ↵Russell King2009-05-2313-31/+55
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
| | * | | | | [ARM] pxa/palm: fix PalmLD/T5/TX AC97 MFPMarek Vasut2009-05-223-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | [ARM] pxa: add parameter to clksrc_read() for pxa168/910Coly Li2009-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies parameter of clksrc_read() from 'void' to 'struct clocksource *cs', which fixes compile warning for incompatible parameter type. Signed-off-by: Coly Li <coly.li@suse.de> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | [ARM] pxa: fix the incorrectly defined drive strength macros for pxa{168,910}Mingwei Wang2009-05-223-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mingwei Wang <mwwang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | [ARM] pxa/ezx: fix pin configuration for low power modeDaniel Ribeiro2009-05-201-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix LPM configuration on ezx.c Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | [ARM] pxa/spitz: provide spitz_ohci_exit() that unregisters USB_HOST GPIODmitry Eremin-Solenikov2009-05-181-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently spitz_ohci_init() that requests GPIO doesn't have corresponding spitz_ohci_exit() which will gpio_free(). This causes minor problems e.g. during resume when the OHCI device can't be resumed. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | [ARM] pxa: enable GPIO receivers after configuring pinsTimothy Clacy2009-05-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'mach-pxa' platforms currently rely on a bootloader to setup GPIO pins and clear RDH (to enable inputs). A kernel loaded by a 'minimal' bootloader, that doesn't touch any pins, will not function correctly; inputs will remain disabled, even after the pins are configured. The following change fixes the issue and has been verified on Gumstix Verdex XL6P and a custom PXA270 platform. Signed-off-by: Timothy Clacy <tcl@phaseone.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | [ARM] pxa: allow gpio_reset drive high during normal workDaniel Ribeiro2009-05-184-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I want to reuse tosa/spitz gpio_reset code, but my board needs the reset gpio to be driven high during normal operation. Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Acked-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | [ARM] pxa: save/restore PGSR on suspend/resume.Daniel Ribeiro2009-05-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
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