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* x86, vmi: Mark VMI deprecated and schedule it for removalAlok Kataria2009-10-082-2/+11
| | | | | | | | | | | | Add text in feature-removal.txt indicating that VMI will be removed in the 2.6.37 timeframe. Signed-off-by: Alok N Kataria <akataria@vmware.com> Acked-by: Chris Wright <chrisw@sous-sol.org> LKML-Reference: <1254193238.13456.48.camel@ank32.eng.vmware.com> [ removed a bogus Kconfig change, marked (DEPRECATED) in Kconfig ] Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2009-10-084-28/+51
|\ | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, pci: Correct spelling in a comment x86: Simplify bound checks in the MTRR code x86: EDAC: carve out AMD MCE decoding logic initcalls: Add early_initcall() for modules x86: EDAC: MCE: Fix MCE decoding callback logic
| * x86, pci: Correct spelling in a commentMarin Mitov2009-10-031-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Marin Mitov <mitov@issp.bas.bg> Cc: Joerg Roedel <joerg.roedel@amd.com> Cc: Jesse Brandeburg <jesse.brandeburg@intel.com> LKML-Reference: <200910032045.02523.mitov@issp.bas.bg> Signed-off-by: Ingo Molnar <mingo@elte.hu> ======================================================
| * x86: Simplify bound checks in the MTRR codeArjan van de Ven2009-10-021-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current bound checks for copy_from_user in the MTRR driver are not as obvious as they could be, and gcc agrees with that. This patch simplifies the boundary checks to the point that gcc can now prove to itself that the copy_from_user() is never going past its bounds. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <20090926205150.30797709@infradead.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: EDAC: MCE: Fix MCE decoding callback logicIngo Molnar2009-10-022-22/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make decoding of MCEs happen only on AMD hardware by registering a non-default callback only on CPU families which support it. While looking at the interaction of decode_mce() with the other MCE code i also noticed a few other things and made the following cleanups/fixes: - Fixed the mce_decode() weak alias - a weak alias is really not good here, it should be a proper callback. A weak alias will be overriden if a piece of code is built into the kernel - not good, obviously. - The patch initializes the callback on AMD family 10h and 11h. - Added the more correct fallback printk of: No support for human readable MCE decoding on this CPU type. Transcribe the message and run it through 'mcelog --ascii' to decode. On CPUs that dont have a decoder. - Made the surrounding code more readable. Note that the callback allows us to have a default fallback - without having to check the CPU versions during the printout itself. When an EDAC module registers itself, it can install the decode-print function. (there's no unregister needed as this is core code.) version -v2 by Borislav Petkov: - add K8 to the set of supported CPUs - always build in edac_mce_amd since we use an early_initcall now - fix checkpatch warnings Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andi Kleen <andi@firstfloor.org> LKML-Reference: <20091001141432.GA11410@aftab> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | Merge branch 'sparc-perf-events-fixes-for-linus' of ↵Linus Torvalds2009-10-081-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'sparc-perf-events-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: mm, perf_event: Make vmalloc_user() align base kernel virtual address to SHMLBA perf_event: Provide vmalloc() based mmap() backing
| * | perf_event: Provide vmalloc() based mmap() backingPeter Zijlstra2009-10-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some architectures such as Sparc, ARM and MIPS (basically everything with flush_dcache_page()) need to deal with dcache aliases by carefully placing pages in both kernel and user maps. These architectures typically have to use vmalloc_user() for this. However, on other architectures, vmalloc() is not needed and has the downsides of being more restricted and slower than regular allocations. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: David Miller <davem@davemloft.net> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: Paul Mackerras <paulus@samba.org> LKML-Reference: <1254830228.21044.272.camel@laptop> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | Merge branch 'timers-fixes-for-linus' of ↵Linus Torvalds2009-10-082-0/+3
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, timers: Check for pending timers after (device) interrupts NOHZ: update idle state also when NOHZ is inactive
| * | | x86, timers: Check for pending timers after (device) interruptsArjan van de Ven2009-10-082-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that range timers and deferred timers are common, I found a problem with these using the "perf timechart" tool. Frans Pop also reported high scheduler latencies via LatencyTop, when using iwlagn. It turns out that on x86, these two 'opportunistic' timers only get checked when another "real" timer happens. These opportunistic timers have the objective to save power by hitchhiking on other wakeups, as to avoid CPU wakeups by themselves as much as possible. The change in this patch runs this check not only at timer interrupts, but at all (device) interrupts. The effect is that: 1) the deferred timers/range timers get delayed less 2) the range timers cause less wakeups by themselves because the percentage of hitchhiking on existing wakeup events goes up. I've verified the working of the patch using "perf timechart", the original exposed bug is gone with this patch. Frans also reported success - the latencies are now down in the expected ~10 msec range. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Tested-by: Frans Pop <elendil@planet.nl> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mike Galbraith <efault@gmx.de> LKML-Reference: <20091008064041.67219b13@infradead.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | Merge branch 'omap-fixes-for-linus' of ↵Linus Torvalds2009-10-088-123/+193
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: omapfb: Blizzard: constify register address tables omapfb: Blizzard: fix pointer to be const omapfb: Condition mutex acquisition omap: iovmm: Add missing mutex_unlock omap: iovmm: Fix incorrect spelling omap: SRAM: flush the right address after memcpy in omap_sram_push omap: Lock DPLL5 at boot omap: Fix incorrect 730 vs 850 detection OMAP3: PM: introduce a new powerdomain walk helper OMAP3: PM: Enable GPIO module-level wakeups OMAP3: PM: USBHOST: clear wakeup events on both hosts OMAP3: PM: PRCM interrupt: only handle selected PRCM interrupts OMAP3: PM: PRCM interrupt: check MPUGRPSEL register OMAP3: PM: Prevent hang in prcm_interrupt_handler
| * \ \ \ Merge branch 'pm-fixes-32' of ↵Tony Lindgren2009-10-064-95/+137
| |\ \ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-fixes-for-linus
| | * | | | OMAP3: PM: introduce a new powerdomain walk helperArtem Bityutskiy2009-10-053-14/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'pwrdm_for_each()' function walks powerdomains with a spinlock locked, so the the callbacks cannot do anything which may sleep. This patch introduces a 'pwrdm_for_each_nolock()' helper which does the same, but without the spinlock locked. This fixes the following lockdep warning: [ 0.000000] WARNING: at kernel/lockdep.c:2460 lockdep_trace_alloc+0xac/0xec() [ 0.000000] Modules linked in: (unwind_backtrace+0x0/0xdc) from [<c0045464>] (warn_slowpath_common+0x48/0x60) (warn_slowpath_common+0x48/0x60) from [<c0067dd4>] (lockdep_trace_alloc+0xac/0xec) (lockdep_trace_alloc+0xac/0xec) from [<c009da14>] (kmem_cache_alloc+0x1c/0xd0) (kmem_cache_alloc+0x1c/0xd0) from [<c00b21d8>] (d_alloc+0x1c/0x1a4) (d_alloc+0x1c/0x1a4) from [<c00a887c>] (__lookup_hash+0xd8/0x118) (__lookup_hash+0xd8/0x118) from [<c00a9f20>] (lookup_one_len+0x84/0x94) (lookup_one_len+0x84/0x94) from [<c010d12c>] (debugfs_create_file+0x8c/0x20c) (debugfs_create_file+0x8c/0x20c) from [<c010d320>] (debugfs_create_dir+0x1c/0x20) (debugfs_create_dir+0x1c/0x20) from [<c000e8cc>] (pwrdms_setup+0x60/0x90) (pwrdms_setup+0x60/0x90) from [<c002e010>] (pwrdm_for_each+0x30/0x80) (pwrdm_for_each+0x30/0x80) from [<c000e79c>] (pm_dbg_init+0x7c/0x14c) (pm_dbg_init+0x7c/0x14c) from [<c00232b4>] (do_one_initcall+0x5c/0x1b8) (do_one_initcall+0x5c/0x1b8) from [<c00083f8>] (kernel_init+0x90/0x10c) (kernel_init+0x90/0x10c) from [<c00242c4>] (kernel_thread_exit+0x0/0x8) Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | | OMAP3: PM: Enable GPIO module-level wakeupsKevin Hilman2009-10-051-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, only GPIOs in the wakeup domain (GPIOs in bank 0) are enabled as wakups. This patch also enables GPIOs in the PER powerdomain (banks 2-6) to be used as possible wakeup sources. In addition, this patch ensures that all GPIO wakeups can wakeup the MPU using the PM_MPUGRPSEL_<pwrdm> registers. NOTE: this doesn't enable the individual GPIOs as wakeups, this simply enables the per-bank wakeups at the powerdomain level. This problem was discovered by Mike Chan when preventing the CORE powerdomain from going into retention/off. When CORE was allowed to hit retention, GPIO wakeups via IO pad were working fine, but when CORE remained on, GPIO module-level wakeups were not working properly. To test, prevent CORE from going inactive/retention/off, thus preventing the IO chain from being armed: # echo 3 > /debug/pm_debug/core_pwrdm/suspend This ensures that GPIO wakeups happen via module-level wakeups and not via IO pad. Tested on 3430SDP using the touchscreen GPIO (gpio 2, in WKUP) Tested on Zoom2 using the QUART interrup GPIO (gpio 102, in PER) Also, c.f. OMAP PM wiki for troubleshooting GPIO wakeup issues: http://elinux.org/OMAP_Power_Management Reported-by: Mike Chan <mikechan@google.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | | OMAP3: PM: USBHOST: clear wakeup events on both hostsVikram Pandita2009-10-051-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USBHOST module has 2 fclocks (for HOST1 and HOST2), only one iclock and only a single bit in the WKST register to indicate a wakeup event. Because of the single WKST bit, we cannot know whether a wakeup event was on HOST1 or HOST2, so enable both fclocks before clearing the wakeup event to ensure both hosts can properly clear the event. Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | | OMAP3: PM: PRCM interrupt: only handle selected PRCM interruptsPaul Walmsley2009-10-051-9/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clearing wakeup sources is now only done when the PRM indicates a wakeup source interrupt. Since we don't handle any other types of PRCM interrupts right now, warn if we get any other type of PRCM interrupt. Either code needs to be added to the PRCM interrupt handler to react to these, or these other interrupts should be masked off at init. Updated after Jon Hunter's PRCM IRQ rework by Kevin Hilman. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | | OMAP3: PM: PRCM interrupt: check MPUGRPSEL registerPaul Walmsley2009-10-051-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PM_WKST register contents should be ANDed with the contents of the MPUGRPSEL registers. Otherwise the MPU PRCM interrupt handler could wind up clearing wakeup events meant for the IVA PRCM interrupt handler. A future revision to this code should be to read a cached version of MPUGRPSEL from the powerdomain code, since PRM reads are relatively slow. Updated after Jon Hunter's PRCM IRQ change by Kevin Hilman Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * | | | OMAP3: PM: Prevent hang in prcm_interrupt_handlerJon Hunter2009-10-051-83/+60Star
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two scenarios where a race condition could result in a hang in the prcm_interrupt handler. These are: 1). Waiting for PRM_IRQSTATUS_MPU register to clear. Bit 0 of the PRM_IRQSTATUS_MPU register indicates that a wake-up event is pending for the MPU. This bit can only be cleared if the all the wake-up events latched in the various PM_WKST_x registers have been cleared. If a wake-up event occurred during the processing of the prcm interrupt handler, after the corresponding PM_WKST_x register was checked but before the PRM_IRQSTATUS_MPU was cleared, then the CPU would be stuck forever waiting for bit 0 in PRM_IRQSTATUS_MPU to be cleared. 2). Waiting for the PM_WKST_x register to clear. Some power domains have more than one wake-up source. The PM_WKST_x registers indicate the source of a wake-up event and need to be cleared after a wake-up event occurs. When the PM_WKST_x registers are read and before they are cleared, it is possible that another wake-up event could occur causing another bit to be set in one of the PM_WKST_x registers. If this did occur after reading a PM_WKST_x register then the CPU would miss this event and get stuck forever in a loop waiting for that PM_WKST_x register to clear. This patch address the above race conditions that would result in a hang. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | | | omap: iovmm: Add missing mutex_unlockDaniel Walker2009-10-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was using Coccinelle with the mutex_unlock semantic patch, and it unconvered this problem. It appears to be a valid missing unlock issue. This change should correct it by moving the unlock below the label. This patch is against the mainline kernel. Cc: Julia Lawall <julia@diku.dk> Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Daniel Walker <dwalker@fifo99.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap: iovmm: Fix incorrect spellingHiroshi DOYU2009-10-061-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix incorrect spelling Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap: SRAM: flush the right address after memcpy in omap_sram_pushye janboe2009-10-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the original flush operation is to flush the function address which is copied from. But we do not change the function code and it is not necessary to flush it. Signed-off-by: janboe <janboe.ye@gmail.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap: Lock DPLL5 at bootRajendra Nayak2009-10-051-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and USBTLL f-clock are the only users of this DPLL, and 120MHz is is the only recommended rate for these clocks. With this patch, the 60 MHz ULPI clock is generated correctly. Tested on an OMAP3430 SDP. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | omap: Fix incorrect 730 vs 850 detectionTony Lindgren2009-10-051-23/+14Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit cd92204924fafbd5c7241dfd12ca3176d542e0c5 added support for omap850. However, the patch accidentally removed the wrong ifdef: # define cpu_is_omap730() 1 # endif #endif +#else +# if defined(CONFIG_ARCH_OMAP850) +# undef cpu_is_omap850 +# define cpu_is_omap850() 1 +# endif +#endif ... void omap2_check_revision(void); #endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */ - -#endif Instead of removing removing the #endif at the end of the file, the #endif before #else should have been removed. But we cannot have multiple #else statements as pointed out by Alistair Buxton <a.j.buxton@gmail.com>. So the fix is to: - remove the non-multi-omap special handling, as we need to detect between omap730 and omap850 anyways. - add the missing #endif back to the end of the file Reported-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | | Merge branch 'fixes' of ↵Linus Torvalds2009-10-0815-80/+126
|\ \ \ \ \ | |_|_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6 * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: agp: parisc-agp.c - use correct page_mask function parisc: Fix linker script breakage. parisc: convert to asm-generic/hardirq.h parisc: Make THREAD_SIZE available to assembly files and linker scripts. parisc: correct use of SHF_ALLOC parisc: rename parisc's vmalloc_start to parisc_vmalloc_start parisc: add me to Maintainers parisc: includecheck fix: signal.c parisc: HAVE_ARCH_TRACEHOOK parisc: add skeleton syscall.h parisc: stop using task->ptrace for {single,block}step flags parisc: split syscall_trace into two halves parisc: add missing TI_TASK macro in syscall.S parisc: tracehook_signal_handler parisc: tracehook_report_syscall
| * | | | parisc: Fix linker script breakage.Helge Deller2009-09-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: convert to asm-generic/hardirq.hChristoph Hellwig2009-09-282-24/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: Make THREAD_SIZE available to assembly files and linker scripts.Tim Abbott2009-09-281-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tim Abbott <tabbott@ksplice.com> Acked-by: Helge Deller <deller@gmx.de> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: correct use of SHF_ALLOCJulia Lawall2009-09-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SHF_ALLOC is suitable for testing against the sh_flags field, not the sh_type field. Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: rename parisc's vmalloc_start to parisc_vmalloc_startHelge Deller2009-09-282-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | building kernel 2.6.32(pre), gives this compiler warning: /linus-linux-2.6/mm/vmalloc.c: In function 'pcpu_get_vm_areas': /linus-linux-2.6/mm/vmalloc.c:2104: warning: 'vmalloc_start' is used uninitialized in this function The reason is, that the code in mm/vmalloc defines a local variable called vmalloc_start, which is already defined as global variable in parisc's code. To avoid this kind of problems in future, I suggest to rename the parisc variable to parisc_vmalloc_start. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: includecheck fix: signal.cJaswinder Singh Rajput2009-09-281-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following 'make includecheck' warning: arch/parisc/kernel/signal.c: linux/compat.h is included more than once. Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: HAVE_ARCH_TRACEHOOKKyle McMartin2009-09-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let 'er rip. Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: add skeleton syscall.hKyle McMartin2009-09-282-1/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed for lib/syscall.c when HAVE_ARCH_TRACEHOOK. Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: stop using task->ptrace for {single,block}step flagsKyle McMartin2009-09-284-18/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | task->ptrace flags belong to generic code, so instead thief some TIF_ bits to use. Somewhat risky conversion of code to test TASK_FLAGS instead of TASK_PTRACE in assembly, but it looks alright in the end. Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: split syscall_trace into two halvesKyle McMartin2009-09-282-22/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of fiddling with gr[20], restructure code to return whether or not to -ENOSYS. (Also do a bit of fiddling to let them take pt_regs directly instead of re-computing it.) Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: add missing TI_TASK macro in syscall.SKyle McMartin2009-09-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LDREG 0(%r1),%r1 really wants to be accessing thread_info.task, instead of hardcoding the 0. Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: tracehook_signal_handlerKyle McMartin2009-09-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes parisc call the standard tracehook_signal_handler hook in <linux/tracehook.h> after setting up a signal handler. Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
| * | | | parisc: tracehook_report_syscallKyle McMartin2009-09-282-13/+14
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes parisc use the standard tracehook_report_syscall_entry and tracehook_report_syscall_exit hooks in <linux/tracehook.h>. To do this, we need to access current->thread.regs, and to know whether we're entering or exiting the syscall, so add this to syscall_trace. Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
* | | | Merge branch 'kvm-updates/2.6.32' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2009-10-058-30/+106
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'kvm-updates/2.6.32' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: add support for change_pte mmu notifiers KVM: MMU: add SPTE_HOST_WRITEABLE flag to the shadow ptes KVM: MMU: dont hold pagecount reference for mapped sptes pages KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID KVM: VMX: flush TLB with INVEPT on cpu migration KVM: fix LAPIC timer period overflow KVM: s390: fix memsize >= 4G KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly KVM: SVM: Fix tsc offset adjustment when running nested
| * | | | KVM: add support for change_pte mmu notifiersIzik Eidus2009-10-042-9/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this is needed for kvm if it want ksm to directly map pages into its shadow page tables. [marcelo: cast pfn assignment to u64] Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * | | | KVM: MMU: add SPTE_HOST_WRITEABLE flag to the shadow ptesIzik Eidus2009-10-042-7/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this flag notify that the host physical page we are pointing to from the spte is write protected, and therefore we cant change its access to be write unless we run get_user_pages(write = 1). (this is needed for change_pte support in kvm) Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * | | | KVM: MMU: dont hold pagecount reference for mapped sptes pagesIzik Eidus2009-10-041-5/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using mmu notifiers, we are allowed to remove the page count reference tooken by get_user_pages to a specific page that is mapped inside the shadow page tables. This is needed so we can balance the pagecount against mapcount checking. (Right now kvm increase the pagecount and does not increase the mapcount when mapping page into shadow page table entry, so when comparing pagecount against mapcount, you have no reliable result.) Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * | | | KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUIDAvi Kivity2009-10-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of entries is multiplied by the entry size, which can overflow on 32-bit hosts. Bound the entry count instead. Reported-by: David Wagner <daw@cs.berkeley.edu> Cc: stable@kernel.org Signed-off-by: Avi Kivity <avi@redhat.com>
| * | | | KVM: VMX: flush TLB with INVEPT on cpu migrationMarcelo Tosatti2009-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible that stale EPTP-tagged mappings are used, if a vcpu migrates to a different pcpu. Set KVM_REQ_TLB_FLUSH in vmx_vcpu_load, when switching pcpus, which will invalidate both VPID and EPT mappings on the next vm-entry. Cc: stable@kernel.org Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * | | | KVM: fix LAPIC timer period overflowAurelien Jarno2009-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't overflow when computing the 64-bit period from 32-bit registers. Fixes sourceforge bug #2826486. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Cc: stable@kernel.org Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * | | | KVM: s390: fix memsize >= 4GChristian Borntraeger2009-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 628eb9b8a8f3 KVM: s390: streamline memslot handling introduced kvm_s390_vcpu_get_memsize. This broke guests >=4G, since this function returned an int. This patch changes the return value to a long. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * | | | KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctlyJoerg Roedel2009-10-041-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running nested we need to touch the l1 guests tsc_offset. Otherwise changes will be lost or a wrong value be read. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * | | | KVM: SVM: Fix tsc offset adjustment when running nestedJoerg Roedel2009-10-041-0/+2
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When svm_vcpu_load is called while the vcpu is running in guest mode the tsc adjustment made there is lost on the next emulated #vmexit. This causes the tsc running backwards in the guest. This patch fixes the issue by also adjusting the tsc_offset in the emulated hsave area so that it will not get lost. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* | | | Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2009-10-053-1/+5
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Clear sticky FSR register after saving it to func parametr microblaze: UMS is used only for MMU kernel
| * | | | microblaze: Clear sticky FSR register after saving it to func parametrMichal Simek2009-10-052-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear it for noMMU kernel. This one do it for MMU. Correct noMMU version Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: UMS is used only for MMU kernelMichal Simek2009-10-051-0/+2
| |/ / / | | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2009-10-056-59/+547
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc: using HZ needs an include of linux/param.h sparc32: convert to asm-generic/hardirq.h sparc64: Cache per-cpu %pcr register value in perf code. sparc64: Fix comment typo in perf_event.c sparc64: Minor coding style fixups in perf code. sparc64: Add a basic conflict engine in preparation for multi-counter support. sparc64: Increase vmalloc size to fix percpu regressions. sparc64: Add initial perf event conflict resolution and checks. sparc: Niagara1 perf event support. sparc: Add Niagara2 HW cache event support. sparc: Support all ultra3 and ultra4 derivatives. sparc: Support HW cache events.
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