| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: hisilicon: mark wdt_mux_p[] as const | Arnd Bergmann | 2018-03-16 | 1 | -1/+1 |
| | | | | | | | | | | | | The symbol is in the __initconst section but not marked init, which caused a warning when building with LTO. This makes it 'const' as was obviously intended. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: c80dfd9bf54e ("clk: hisilicon: add CRG driver for Hi3516CV300 SoC") Signed-off-by: Stephen Boyd <sboyd@kernel.org> | ||||
| * | clk: hisilicon: add CRG driver for Hi3516CV300 SoC | Pan Wen | 2016-11-14 | 1 | -0/+330 |
| Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset Generator) module generates clock and reset signals used by other module blocks on SoC. Signed-off-by: Pan Wen <wenpan@hisilicon.com> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> | |||||
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index : openslx/kernel-qcow2-linux.git | |
| In-kernel qcow2 (Kernel part) | OpenSLX |
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