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* clk: meson: add mpll supportMichael Turquette2016-06-231-0/+94
MPLLs are adjustable rate clocks derived from PLLs. On both Meson8b and GXBB they appear to be only derived from fixed_pll. Add support for these clock types so that they can be added to their respective drivers. Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>