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path: root/drivers/clk/sunxi-ng/ccu_nkmp.h
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* clk: sunxi-ng: nkmp: Add constraint for maximum rateJernej Skrabec2018-08-271-0/+1
| | | | | | | | | | Some, if not most, NKMP PLLs can be set to higher rate that is really supported by HW. Implement support for maximum frequency constrain for NKMP PLLs. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* clk: sunxi-ng: Support fixed post-dividers on NKMP style clocksIcenowy Zheng2018-03-181-0/+2
| | | | | | | | | | On the new Allwinner H6 SoC, multiple PLL's are NMP style clocks (modelled as NKMP with no K) and have fixed post-dividers. Add fixed post divider support to the NKMP style clocks. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* clk: sunxi-ng: Rename the internal structuresMaxime Ripard2016-10-201-4/+4
| | | | | | | | Rename the structures meant to be embedded in other structures to make it consistent with the mux structure name Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi-ng: Add N-K-M-P factor clockMaxime Ripard2016-07-091-0/+71
Introduce support for clocks that use a combination of two linear multipliers (N and K factors), one linear divider (M) and one power of two divider (P). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-13-maxime.ripard@free-electrons.com