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path:
root
/
drivers
/
clk
Commit message (
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Author
Age
Files
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clk: qcom: common: Migrate to devm_* APIs for resets and clk providers
Stephen Boyd
2017-11-02
1
-24
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+2
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clk: Add devm_of_clk_add_hw_provider()/del_provider() APIs
Stephen Boyd
2017-11-02
1
-0
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+52
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Merge branch 'clk-const' into clk-next
Stephen Boyd
2017-11-14
25
-86
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+86
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clk: make clk_init_data const
Bhumika Goyal
2017-11-02
6
-55
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+55
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clk: imx: make clk_ops const
Bhumika Goyal
2017-11-02
4
-5
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+5
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clk: mmp: make clk_ops const
Bhumika Goyal
2017-11-02
3
-3
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+3
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clk: hisilicon: make clk_ops const
Bhumika Goyal
2017-11-02
3
-4
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+4
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clk: mxs: make clk_ops const
Bhumika Goyal
2017-11-02
2
-2
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+2
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clk: sirf: make clk_ops const
Bhumika Goyal
2017-11-02
1
-6
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+6
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clk: spear: make clk_ops const
Bhumika Goyal
2017-11-02
4
-5
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+5
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CLK: SPEAr: make aux_clk_masks structures const
Bhumika Goyal
2017-11-02
3
-3
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+3
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CLK: SPEAr: make structure field and function argument as const
Bhumika Goyal
2017-11-02
2
-3
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+3
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Merge branch 'clk-sunxi' into clk-next
Stephen Boyd
2017-11-14
2
-3
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+1
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clk: sunxi: explicitly request exclusive reset control
Philipp Zabel
2017-11-02
1
-1
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+1
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clk: sunxi: fix build warning
Corentin LABBE
2017-11-02
1
-2
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+0
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Merge branch 'clk-hikey' into clk-next
Stephen Boyd
2017-11-14
4
-6
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+14
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clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu'
Shawn Guo
2017-11-14
1
-1
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+11
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clk: hisilicon: Delete an error message for a failed memory allocation in his...
Markus Elfring
2017-11-14
1
-3
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+1
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clk: hi3660: fix incorrect uart3 clock freqency
Zhong Kaihua
2017-11-14
1
-1
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+1
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clk: hi6220: mark clock cs_atb_syspll as critical
Leo Yan
2017-11-01
1
-1
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+1
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Merge tag 'tegra-for-4.15-clk-2' of git://git.kernel.org/pub/scm/linux/kernel...
Stephen Boyd
2017-11-14
13
-66
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+102
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clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init()
Nicolin Chen
2017-11-01
1
-2
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+2
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clk: tegra: dfll: Fix drvdata overwriting issue
Nicolin Chen
2017-11-01
3
-13
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+11
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clk: tegra: Fix cclk_lp divisor register
Michał Mirosław
2017-11-01
1
-1
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+1
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clk: tegra: Bump SCLK clock rate to 216 MHz
Dmitry Osipenko
2017-11-01
1
-1
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+1
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clk: tegra: Use common definition of APBDMA clock gate
Dmitry Osipenko
2017-11-01
1
-5
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+1
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clk: tegra: Correct parent of the APBDMA clock
Dmitry Osipenko
2017-11-01
1
-1
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+1
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clk: tegra: Add AHB DMA clock entry
Dmitry Osipenko
2017-11-01
4
-0
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+4
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clk: tegra: Mark APB clock as critical
Jon Hunter
2017-11-01
1
-1
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+1
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clk: tegra: Make tegra_clk_pll_params __ro_after_init
Bhumika Goyal
2017-10-19
1
-8
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+8
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clk: tegra: Fix sor1_out clock implementation
Thierry Reding
2017-10-19
2
-16
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+47
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clk: tegra: Use tegra_clk_register_periph_data()
Thierry Reding
2017-10-19
4
-13
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+4
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clk: tegra: Add peripheral clock registration helper
Thierry Reding
2017-10-19
2
-0
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+11
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clk: tegra: Check BPMP response return code
Timo Alho
2017-10-19
1
-5
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+10
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Merge tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel...
Stephen Boyd
2017-11-01
3
-9
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+7
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clk: rockchip: use new cif/vdpu clock ids on rk3188
Heiko Stuebner
2017-10-14
1
-6
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+6
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clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCs
Romain Perier
2017-10-14
1
-1
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+1
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clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuc...
Markus Elfring
2017-09-28
1
-2
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+0
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Merge tag 'clk-renesas-for-v4.15-tag2' of git://git.kernel.org/pub/scm/linux/...
Stephen Boyd
2017-11-01
13
-34
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+214
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clk: renesas: rcar-gen3: Restore R clock during resume
Geert Uytterhoeven
2017-10-20
1
-2
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+11
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clk: renesas: rcar-gen3: Restore SDHI clocks during resume
Geert Uytterhoeven
2017-10-20
1
-13
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+50
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clk: renesas: div6: Restore clock state during resume
Geert Uytterhoeven
2017-10-20
3
-4
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+40
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clk: renesas: cpg-mssr: Add support to restore core clocks during resume
Geert Uytterhoeven
2017-10-20
6
-11
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+23
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clk: renesas: cpg-mssr: Restore module clocks during resume
Geert Uytterhoeven
2017-10-20
1
-0
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+84
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clk: renesas: cpg-mssr: Add du1 clock to R8A7745
Fabrizio Castro
2017-10-20
1
-0
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+1
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clk: renesas: rz: clk-rz is meant for RZ/A1
Geert Uytterhoeven
2017-10-20
1
-1
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+1
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clk: renesas: r8a77995: Correct parent clock of INTC-AP
Geert Uytterhoeven
2017-10-16
1
-1
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+1
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clk: renesas: r8a7796: Correct parent clock of INTC-AP
Geert Uytterhoeven
2017-10-16
1
-1
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+1
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clk: renesas: r8a7795: Correct parent clock of INTC-AP
Geert Uytterhoeven
2017-10-16
1
-1
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+2
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Merge tag 'meson-clk-for-4.15' of git://github.com/baylibre/clk-meson into cl...
Stephen Boyd
2017-11-01
2
-1
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+297
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