summaryrefslogtreecommitdiffstats
path: root/drivers/dma/amba-pl08x.c
Commit message (Collapse)AuthorAgeFilesLines
...
* dmaengine: PL08x: convert to a list of completed descriptorsRussell King2012-07-011-10/+20
| | | | | | | | | | | Convert PL08x to use a list of completed descriptors rather than merely relying upon a single pointer. This makes it possible to schedule the tasklet for other purposes, and makes our behaviour similar to virt-dma. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: track mux usage on a per-channel basis.Russell King2012-07-011-5/+13
| | | | | | | | | | Keep track of the number of descriptors currently using a MUX setting on a per-channel basis. This allows us to know when we have descriptors queued somewhere which have been assigned a DMA request signal. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: move DMA signal muxing into pl08x_dma_chan structRussell King2012-07-011-14/+15
| | | | | | | | | | Move the signal handling out of the physical channel structure into the virtual channel structure, where it should belong as it has more to do with the virtual channel than the physical one. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: split DMA signal muxing from channel allocRussell King2012-07-011-7/+36
| | | | | | | | | | | Split the DMA request mux signal handling from the physical channel allocation code. The physical channel has very little to do with the DMA request input which will be used, so these should be two separate operations. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: get rid of unnecessary checks in dma_slave_configRussell King2012-07-011-28/+13Star
| | | | | | | | | | Get rid of the unnecessary checks in dma_slave_config utilizing the DMA direction. This allows us to move the computation of cctl to the prepare function. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: ignore 'direction' argument in dma_slave_configRussell King2012-07-011-38/+18Star
| | | | | | | | | | | Ignore the direction argument in dma_slave_config, and configure both directions independently. We still check that the configuration for the intended direction is valid; this check will eventually be dropped. This check is just for debugging at present. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: extract function to to generate cctl valuesRussell King2012-07-011-21/+32
| | | | | | | | | | Extract the functionality from dma_slave_config to generate the cctl values for a given bus width and burst size. This allows us to use this elsewhere in the driver, namely the prepare functions. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: move the bus and increment selection to dma prepare functionRussell King2012-07-011-12/+14
| | | | | | | | | Move the bus and transfer increment selection to the DMA prepare function rather than the slave configuration function. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: get rid of device_fc in struct pl08x_dma_chanRussell King2012-07-011-7/+1Star
| | | | | | | | | As we now store the dma_slave_config in pl08x_dma_chan, we don't need to store this separately. Use the one in dma_slave_config directly. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: get src/dst addr direct from dma_slave_config structRussell King2012-07-011-8/+7Star
| | | | | | | | | | Add a dma_slave_config struct to struct pl08x_dma_chan, and move the src_addr/dst_addr arguments into this struct. This is a step away from using the dma_slave_config's direction member. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: constify channel names and bus_id stringsRussell King2012-07-011-1/+1
| | | | | | Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: move private data structures into amba-pl08x.cRussell King2012-07-011-0/+136
| | | | | | | | | Move the driver private data structures into the driver itself, rather than having them exposed to everyone in a header file. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: clean up get_signal/put_signalRussell King2012-07-011-2/+2
| | | | | | | | | Try to avoid dereferencing the DMA engine's channel struct in these platform helpers; instead, pass a pointer to the channel data into get_signal(), and the returned signal number to put_signal(). Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: remove circular_buffer boolean from channel dataRussell King2012-07-011-7/+0Star
| | | | | | | | | | Circular buffers are not handled in this way; we have a separate API call now to setup circular buffers. So lets not mislead people with this bool. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: remove redundant spinlockRussell King2012-07-011-3/+0Star
| | | | | | | | | The pl08x_driver_data spinlock is only ever initialized. Nothing else uses it. Let's get rid of it. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: fix missed dma_transfer_direction fixupRussell King2012-07-011-1/+1
| | | | | | | | | db8196df4 (dmaengine: move drivers to dma_transfer_direction) missed fixing up the "DMA_NONE" case. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: PL08x: remove runtime PM supportRussell King2012-07-011-10/+0Star
| | | | | | | | | | | | | | The runtime PM support conflicts with the generic AMBA bus PM, and also causes a potential deadlock with the PL011 driver as it results in interrupts being enabled beneath a spinlock. I don't presently see any solution to this other than by removing the runtime PM support entirely from the DMA engine driver. Alternative suggestions welcome. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dmaengine: Use dma_sg_len(sg) instead of sg->lengthLars-Peter Clausen2012-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sg->length may or may not contain the length of the dma region to transfer, depending on the architecture - dma_sg_len(sg) always will though. For the architectures which use the drivers modified by this patch it probably is the case that sg->length contains the dma transfer length. But to be consistent and future proof change them to use dma_sg_len. To quote Russel King: sg->length is meaningless to something performing DMA. In cases where sg_dma_len(sg) and sg->length are the same storage, then there's no problem. But scatterlists _can_ (and one some architectures) do split them - especially when you have an IOMMU which can allow you to combine a scatterlist into fewer entries. So, anything using sg->length for the size of a scatterlist's DMA transfer _after_ a call to dma_map_sg() is almost certainly buggy. The patch has been generated using the following coccinelle patch: <smpl> @@ struct scatterlist *sg; expression X; @@ -sg[X].length +sg_dma_len(&sg[X]) @@ struct scatterlist *sg; @@ -sg->length +sg_dma_len(sg) </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: Use sg_dma_address instead of sg_physLars-Peter Clausen2012-05-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | dmaengine drivers should always use sg_dma_address instead of sg_phys to get the addresses for the transfer from a sg element. To quote Russel King: sg_phys(sg) of course has nothing to do with DMA addresses. It's the physical address _to the CPU_ of the memory associated with the scatterlist entry. That may, or may not have the same value for the DMA engine, particularly if IOMMUs are involved. And if these drivers are used on ARM, they must be fixed, sooner rather than later. There's patches in the works which will mean we will end up with IOMMU support in the DMA mapping later, which means everything I've said above will become reality. The patch has been generated using the following coccinelle patch: <smpl> @@ struct scatterlist *sg; @@ -sg_phys(sg) +sg_dma_address(sg) </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* Merge branch 'fixes' into nextVinod Koul2012-04-251-0/+1
|\
| * dmaengine/amba-pl08x : reset phychan_hold on terminate allDavide Ciminaghi2012-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | When a client calls pl08x_control with DMA_TERMINATE_ALL, it is correct to terminate and release the phy channel currently in use (if one is in use), but the phychan_hold counter must also be reset (otherwise it could get trapped in an unbalanced state). Signed-off-by: Davide Ciminaghi <ciminaghi@gnudd.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/amba-pl08x: add support for the Nomadik variantLinus Walleij2012-04-251-7/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | The Nomadik PL080 variant has some extra protection bits that may be set, so we need to check these bits to see if the channels are actually available for the DMAengine to use. Cc: Russell King <linux@arm.linux.org.uk> Cc: Alim Akhtar <alim.akhtar@gmail.com> Cc: Alessandro Rubini <rubini@gnudd.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/amba-pl08x: check for terminal count status onlyLinus Walleij2012-04-231-1/+1
|/ | | | | | | | | | | | | | | | | For some reason I can't figure out we're reading the PL080_INT_STATUS register instead of PL080_TC_STATUS when checking for the terminal count. The PL080_INT_STATUS is a logical OR between the error and terminal count status register and may not report what we want it to, especially if there is an error and a terminal count at the same time and the former is not lowered in time for the check in the TC register. Make sure we read what we're actually interested in. Cc: Russell King <linux@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Alim Akhtar <alim.akhtar@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclicAlexandre Bounine2012-03-211-1/+1
| | | | | | | | | | | | Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to allow passing client/target specific information associated with the data transfer. Modify all affected DMA engine drivers. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: consolidate initialization of cookiesRussell King - ARM Linux2012-03-131-2/+1Star
| | | | | | | | | | | | Provide a common function to initialize a channels cookie values. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: consolidate tx_status functionsRussell King - ARM Linux2012-03-131-18/+4Star
| | | | | | | | | | | | | | | | Now that we have the completed cookie in the dma_chan structure, we can consolidate the tx_status functions by providing a function to set the txstate structure and returning the DMA status. We also provide a separate helper to set the residue for cookies which are still in progress. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: provide a common function for completing a dma descriptorRussell King - ARM Linux2012-03-131-1/+1
| | | | | | | | | | | | | Provide a common function to do the cookie mechanics for completing a DMA descriptor. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: consolidate assignment of DMA cookiesRussell King - ARM Linux2012-03-131-6/+3Star
| | | | | | | | | | | | | | Everyone deals with assigning DMA cookies in the same way (it's part of the API so they should be), so lets consolidate the common code into a helper function to avoid this duplication. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: add private header fileRussell King - ARM Linux2012-03-131-0/+2
| | | | | | | | | | | | | | | | Add a local private header file to contain definitions and declarations which should only be used by DMA engine drivers. We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against multiple inclusion. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: move last completed cookie into generic dma_chan structureRussell King - ARM Linux2012-03-131-4/+4
| | | | | | | | | | | | | | | Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/amba-pl08x: Take flow controller info from DMA_SLAVE_CONFIGViresh Kumar2012-02-221-1/+3
| | | | | | | | | | Flow controller information is passed now from DMA_SLAVE_CONFIG option. This patch makes changes in pl08x driver to use device_fc from it instead of platform data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* drivers/dma/amba-pl08x.c: adjust double testJulia Lawall2012-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Rewrite a duplicated test to test the correct value The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression E; @@ ( * E || ... || E | * E && ... && E ) // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2012-01-181-19/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (53 commits) ARM: mach-shmobile: specify CHCLR registers on SH7372 dma: shdma: fix runtime PM: clear channel buffers on reset dma/imx-sdma: save irq flags when use spin_lock in sdma_tx_submit dmaengine/ste_dma40: clear LNK on channel startup dmaengine: intel_mid_dma: remove legacy pm interface ASoC: mxs: correct 'direction' of device_prep_dma_cyclic dmaengine: intel_mid_dma: error path fix dmaengine: intel_mid_dma: locking and freeing fixes mtd: gpmi-nand: move to dma_transfer_direction mtd: fix compile error for gpmi-nand mmc: mxs-mmc: fix the dma_transfer_direction migration dmaengine: add DMA_TRANS_NONE to dma_transfer_direction dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled. dma: mxs-dma: fix a typo in comment DMA: PL330: Remove pm_runtime_xxx calls from pl330 probe/remove video i.MX IPU: Fix display connections i.MX IPU DMA: Fix wrong burstsize settings dmaengine/ste_dma40: allow fixed physical channel ... Fix up conflicts in drivers/dma/{Kconfig,mxs-dma.c,pl330.c} The conflicts looked pretty trivial, but I'll ask people to verify them.
| * dmaengine/amba-pl08x: Config ccfg and increment phychan_hold if phychan is trueViresh Kumar2011-12-051-9/+12
| | | | | | | | | | | | | | | | | | | | | | Currently, if plchan->phychan is true, we return immediately from prep_phy_chan(). We must configure txd->ccfg and increment phychan_hold before returning. Otherwise, request line number wouldn't be configured in this txd. Reported-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine: move drivers to dma_transfer_directionVinod Koul2011-10-271-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dmaengine: pl08x: Enable module alias autogeneration for AMBA driversDave Martin2011-11-221-0/+2
|/ | | | | Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine/amba-pl08x: Check txd->llis_va before freeing dma_poolViresh Kumar2011-09-191-1/+2
| | | | | | | | In pl08x_free_txd(), check if pool is allocated successfully before freeing it. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine/amba-pl08x: Add support for sg len greater than one for slave ↵Viresh Kumar2011-09-191-163/+215
| | | | | | | | | | | | | transfers Untill now, sg_len greater than one is not supported. This patch adds support to do that. Note: Still, if peripheral is flow controller, sg_len can't be greater that one. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: amba-pl08x: make filter check that the channel is owned by pl08xRussell King - ARM Linux2011-09-051-1/+9
| | | | | | | | | | | | Before converting the dma channel to our private data structure, first check that the channel is indeed one which our driver registered. We do this by ensuring that the underlying device is bound to our driver. This avoids potential oopses if we try to reference 'plchan->name' against a foreign drivers dma channel. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'next' into v3.1-rc4Vinod Koul2011-09-021-257/+188Star
|\ | | | | | | | | | | Fixed trivial conflicts in drivers/dma/amba-pl08x.c Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Call pl08x_free_txd() instead of calling kfree() directlyViresh Kumar2011-08-251-1/+3
| | | | | | | | | | | | | | | | | | pl08x_prep_channel_resources() is calling kfree() directly for txd(). To maintain consistency in code call pl08x_free_txd() instead. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Pass flow controller information with slave channel dataViresh Kumar2011-08-251-8/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | At least, on SPEAr platforms there is one peripheral, JPEG, which can be flow controller for DMA transfer. Currently DMA controller driver didn't support peripheral flow controller configurations. This patch adds device_fc field in struct pl08x_channel_data, which will be used only for slave transfers and is not used in case of mem2mem transfers. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Choose peripheral bus as master busViresh Kumar2011-08-251-16/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | When we have DMA transfers between peripheral and memory, then we shouldn't reduce width of peripheral at all, as that may be a strict requirement. But we can always reduce width of memory access, with some compromise in performance. Thus, we must select peripheral as master and not memory. Also this rearranges code to make it shorter. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Align lli_len to max(src.width, dst.width)Viresh Kumar2011-08-251-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently lli_len is aligned to min of two widths, which looks to be incorrect. Instead it should be aligned to max of both widths. Lets say, total_size = 441 bytes MIN: lets check if min() suits or not: CASE 1: srcwidth = 1, dstwidth = 4 min(src, dst) = 1 i.e. We program transfer size in control reg to 441. Now, till 440 bytes everything is fine, but on the last byte DMAC can't transfer 1 byte to dst, as its width is 4. CASE 2: srcwidth = 4, dstwidth = 1 min(src, dst) = 1 i.e. we program transfer size in control reg to 110 (data transferred = 110 * srcwidth). So, here too 1 byte is left, but on the source side. MAX: Lets check if max() suits or not: CASE 3: srcwidth = 1, dstwidth = 4 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 440. Now, all 440 bytes will be transferred without any issues. CASE 4: srcwidth = 4, dstwidth = 1 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 110 (data transferred = 110 * srcwidth). Now, also all 440 bytes will be transferred without any issues. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Add prep_single_byte_llis() routineViresh Kumar2011-08-251-28/+33
| | | | | | | | | | | | | | | | | | | | | | | | Code for creating single byte llis is present at several places. Create a routine to avoid code redundancy. Also, we don't need one lli per single byte transfer, we can have single lli to do all single byte transfer. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: max_bytes_per_lli is TRANSFER_SIZE * src_width (not ↵Viresh Kumar2011-08-251-8/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIN(width)) max_bytes_per_lli = bd.srcbus.buswidth * PL080_CONTROL_TRANSFER_SIZE_MASK; This is confirmed by ARM support guys. Below is summary of mail exchange with them: [Viresh] What is the total data to be transferred in case source and destination bus widths are different. Suppose, source bus width is 2 bytes and destination is 4 bytes. Now in order to transfer 80 bytes, what should be value of TransferSize field in control reg: 40? or 20?. [David from ARM] The value that is programmed into the TransferSize field should be the number of <SourceWidth> transfers needed to achieve the required data transfer. So, to transfer 80 bytes, with a Source Width of 2, the TransferSize field = should be programmed with: Total transfer size ------------------- = 40 <source width> [Viresh] Will this change if source is 4 bytes and dest is 2? [David] Yes - the calculation then becomes: Total transfer size ------------------- =20 <source width> Also, max_bytes_per_lli must be calculated after fixing src and dest widths not before that. So move this code to the correct place. This patch also removes max_bytes_per_lli from earlier print message, as till that point max_bytes_per_lli is unknown. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Get rid of pl08x_pre_boundary()Viresh Kumar2011-08-251-124/+17Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pl080 Manual says: "Bursts do not cross the 1KB address boundary" We can program the controller to cross 1 KB boundary on a burst and controller can take care of this boundary condition by itself. Following is the discussion with ARM Technical Support Guys (David): [Viresh] Manual says: "Bursts do not cross the 1KB address boundary" What does that actually mean? As, Maximum size transferable with a single LLI is 4095 * 4 =16380 ~ 16KB. So, if we don't have src/dest address aligned to burst size, we can't use this big of an LLI. [David] There is a difference between bursts describing the total data transferred by the DMA controller and AHB bursts. Bursts described by the programmable parameters in the PL080 have no direct connection with the bursts that are seen on the AHB bus. The statement that "Bursts do not cross the 1KB address boundary" in the TRM is referring to AHB bursts, where this limitation is a requirement of the AHB spec. You can still issue bursts within the PL080 that are in excess of 1KB. The PL080 will make sure that its bursts are broken down into legal AHB bursts which will be formatted to ensure that no AHB burst crosses a 1KB boundary. Based on above discussion, this patch removes all code related to 1 KB boundary as we are not required to handle this in driver. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Schedule tasklet in case of error interruptViresh Kumar2011-08-251-21/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, if error interrupt occurs, nothing is done in interrupt handler (just clearing the interrupts). We must somehow indicate this to the user that DMA is over, due to ERR interrupt or TC interrupt. So, this patch just schedules existing tasklet, with a print showing error interrupt has occurred on which channels. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: No need to check "ch->signal < 0"Viresh Kumar2011-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | We have just executed following in pl08x_get_phy_channel(): ch->signal = -1; We don't have to compare "ch->signal < 0", as this will always be true. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/amba-pl08x: Simplify pl08x_ensure_on()Viresh Kumar2011-08-251-7/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits. Also as per manual, for bit 3-31 of DMACConfiguration register: "read undefined, write as 0" So, we must not rely on values read from this registers bit 3-31. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-21 02:15:09 +0200