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* dmaengine: omap-dma: Do not suppress interrupts for memcpyPeter Ujfalusi2016-04-051-3/+1Star
| | | | | | | | | If the client queues up more transfers the driver will not able to move to the next transfer without knowing that the previous descriptor is completed. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap-dma: Fix polled channel completion detection and handlingPeter Ujfalusi2016-04-051-6/+16
| | | | | | | | | | | | | | | | When based on the CCR_ENABLE bit the channel is stopped we should not call omap_dma_callback(), only change the return value to DMA_COMPLETE. Client drivers will do the right thing to clean up the channel after the transfer has been completed. Check the CCR_ENABLE only if the channel is running and not paused since pause in sDMA means that the channel is stopped. This will fix one hard to reproduce race condition when the channel is terminated during transfer (affecting cyclic operation). Fixes: 1a7cf7b26f25 ("dmaengine: omap-dma: Handle cases when the channel is polled for completion") Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap-dma: Implement device_synchronize callbackPeter Ujfalusi2016-02-221-0/+8
| | | | | | | We need the callback to support the dmaengine_terminate_sync(). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'topic/omap' into for-linusVinod Koul2016-01-061-64/+14Star
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| * dmaengine: omap-dma: Handle cases when the channel is polled for completionPeter Ujfalusi2015-12-051-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When a DMA client driver decides that it is not providing callback for completion of a transfer (and/or does not set the DMA_PREP_INTERRUPT) but it will poll the status of the transfer (in case of short memcpy for example) we will not get interrupt for the completion of the transfer and will not mark the transaction as done. Check the channel enable bit in the CCR when the status is queried and if the channel is no longer active, we call the omap_dma_callback() to handle the transfer completion. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: omap-dma: Remove tasklet to start the transfersPeter Ujfalusi2015-12-051-57/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of tasklet to actually start the DMA transfer slightly decreases the DMA throughput since it adds small scheduling delay when the transfer is started. In normal use, even with high I/O load the tasklet would start one transaction at a time, however running the DMAtest for memcpy on all available channels will cause the tasklet to start about 15 transfers. The performance numbers on OMAP4 PandaBoard-es (test_buf_size = 6553): With the tasklet: dmatest: dma0chan30-copy: summary 5000 tests, 0 failures 186 iops 593 KB/s (0) dmatest: dma0chan8-copy0: summary 5000 tests, 0 failures 184 iops 584 KB/s (0) dmatest: dma0chan13-copy: summary 5000 tests, 0 failures 184 iops 585 KB/s (0) dmatest: dma0chan12-copy: summary 5000 tests, 0 failures 184 iops 585 KB/s (0) dmatest: dma0chan7-copy0: summary 5000 tests, 0 failures 183 iops 581 KB/s (0) With this patch (no tasklet): dmatest: dma0chan4-copy0: summary 5000 tests, 0 failures 199 iops 644 KB/s (0) dmatest: dma0chan5-copy0: summary 5000 tests, 0 failures 199 iops 645 KB/s (0) dmatest: dma0chan6-copy0: summary 5000 tests, 0 failures 199 iops 637 KB/s (0) dmatest: dma0chan24-copy: summary 5000 tests, 0 failures 199 iops 638 KB/s (0) dmatest: dma0chan16-copy: summary 5000 tests, 0 failures 199 iops 638 KB/s (0) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: omap-dma: Clean up the prep_slave_sg sg list walk codePeter Ujfalusi2015-12-051-6/+5Star
| | | | | | | | | | | | | | | | The for_each_sg() macro's last parameter is inteded to be used as counter. We can use 'i' instead of 'j' within the loop for indexes. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: omap-dma: Correct status reporting for memcpyPeter Ujfalusi2015-12-051-1/+1
| | | | | | | | | | | | | | | | | | | | During mem copy both src and dst position moves at the same pace. Check the dst position for progress reporting. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: omap-dma: Add support for DMA filter mapping to slave devicesPeter Ujfalusi2015-12-181-0/+4
|/ | | | | | | | | Add support for providing device to filter_fn mapping so client drivers can switch to use the dma_request_chan() API. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap-dma: Enable packed accesses for cyclic transfersMisael Lopez Cruz2015-10-051-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L3 throughput can be higher than expected when packed access is not enabled. The ratio depends on the number of bytes in a transaction and the EMIF interface width. The throughput was measured for the following settings/cases: * Case 1: Burst size of 64 bytes, packed access disabled * Case 2: Burst size of 64 bytes, packed access enabled * Case 3: Burst disabled, packed access disabled Throughput measurements were done during McASP-based audio playback on the Jacinto6 EVM using the omapconf tool [1]: $ omapconf trace bw -m sdma_rd --------------------------------------------------------- Throughput (MB/s) Audio parameters Case 1 Case 2 Case 3 --------------------------------------------------------- 44.1kHz, 16-bits, stereo 1.41 0.18 1.41 44.1kHz, 32-bits, stereo 1.41 0.35 1.41 44.1kHz, 16-bits, 4-chan 2.82 0.35 2.82 44.1kHz, 16-bits, 6-chan 4.23 0.53 4.23 44.1kHz, 16-bits, 8-chan 5.64 0.71 5.64 --------------------------------------------------------- From above measurements, case 2 is the only one that delivers the expected throughput for the given audio parameters. For that reason, the packed accesses are now enabled. It's worth to mention that packed accesses cannot be enabled for all addressing modes. In cyclic transfers, it can be enabled in the source for MEM_TO_DEV and in dest for DEV_TO_MEM, as they use post-increment mode which supports packed accesses. Peter Ujfalusi: From the TRM regarding to this: "NOTE: Except in the constant addressing mode, the source or destination must be specified as packed for burst transactions to occur." So w/o the packed setting the burst on the MEM side was not enabled, this explains the numbers. [1] https://github.com/omapconf/omapconf Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'topic/omap' into for-linusVinod Koul2015-06-251-6/+23
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| * dmaengine: omap-dma: Reduce the number of virtual channelsPeter Ujfalusi2015-05-091-1/+1
| | | | | | | | | | | | | | | | | | | | Since the mapping between the hardware request lines and channels has been removed it no longer make sense to have too many channels. Set the number of channels to match with the number of logical channels supported by sDMA. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: omap-dma: Remove mapping between virtual channels and requestsPeter Ujfalusi2015-05-091-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | Do not direct map the virtual channels to sDMA request number. When the sDMA is behind of a crossbar this direct mapping can cause situations when certain channel can not be requested since the crossbar request number will no longer match with the sDMA request line. The direct mapping for virtual channels with HW request lines will make it harder to implement MEM_TO_MEM mode for the driver. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: omap-dma: Take DMA request number from DT if it is availablePeter Ujfalusi2015-05-091-1/+11
| | | | | | | | | | | | | | | | | | Use the dma-requests property from DT to get the number of DMA requests. In case of legacy boot or failure to find the property, use the default 127 as number of requests. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: omap-dma: Use defines for dma channels and request countPeter Ujfalusi2015-05-091-2/+5
| | | | | | | | | | | | | | | | Instead of magic numbers in the code, use define for number of logical DMA channels and DMA requests. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: omap-dma: Add support for memcpyPeter Ujfalusi2015-05-041-2/+49
|/ | | | | | | | | The sDMA controller is capable of performing memory copy operation. It need to be configured to software triggered mode and without HW synchronization. The sDMA can copy data which is aligned to 8, 16 or 32 bits. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap-dma: Fix memory leak when terminating running transferPeter Ujfalusi2015-03-301-0/+1
| | | | | | | | | | | | | | | | | | | In omap_dma_start_desc the vdesc->node is removed from the virt-dma framework managed lists (to be precise from the desc_issued list). If a terminate_all comes before the transfer finishes the omap_desc will not be freed up because it is not in any of the lists and we stopped the DMA channel so the transfer will not going to complete. There is no special sequence for leaking memory when using cyclic (audio) transfer: with every start and stop of a cyclic transfer the driver leaks struct omap_desc worth of memory. Free up the allocated memory directly in omap_dma_terminate_all() since the framework will not going to do that for us. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> CC: <stable@vger.kernel.org> CC: <linux-omap@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap: fix the assignment to .device_configVinod Koul2014-12-221-1/+1
| | | | Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap: Declare slave capabilities for the generic codeMaxime Ripard2014-12-221-14/+4Star
| | | | | | | | | | Now that the generic slave caps code can make use of the device assigned capabilities, instead of relying on a callback to be implemented. Make use of this code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap: Split device_controlMaxime Ripard2014-12-221-36/+15Star
| | | | | | | | | Split the device_control callback of the TI OMAP DMA driver to make use of the newly introduced callbacks, that will eventually be used to retrieve slave capabilities. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: Make the destination abbreviation coherentMaxime Ripard2014-12-221-1/+1
| | | | | | | | | | | The dmaengine header abbreviates destination as at least two different strings. Make a coherent use of a single one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge tag 'driver-core-3.19-rc1' of ↵Linus Torvalds2014-12-151-1/+0Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core update from Greg KH: "Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while" * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits) Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries" fs: debugfs: add forward declaration for struct device type firmware class: Deletion of an unnecessary check before the function call "vunmap" firmware loader: fix hung task warning dump devcoredump: provide a one-way disable function device: Add dev_<level>_once variants ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries ath: use seq_file api for ath9k debugfs files debugfs: add helper function to create device related seq_file drivers/base: cacheinfo: remove noisy error boot message Revert "core: platform: add warning if driver has no owner" drivers: base: support cpu cache information interface to userspace via sysfs drivers: base: add cpu_device_create to support per-cpu devices topology: replace custom attribute macros with standard DEVICE_ATTR* cpumask: factor out show_cpumap into separate helper function driver core: Fix unbalanced device reference in drivers_probe driver core: fix race with userland in device_add() sysfs/kernfs: make read requests on pre-alloc files use the buffer. sysfs/kernfs: allow attributes to request write buffer be pre-allocated. fs: sysfs: return EGBIG on write if offset is larger than file size ...
| * dma: drop owner assignment from platform_driversWolfram Sang2014-10-201-1/+0Star
| | | | | | | | | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | dmaengine: omap: Remove chancnt affectationsMaxime Ripard2014-11-061-2/+0Star
|/ | | | | | | | | | | chanctnt is already filled by dma_async_device_register, which uses the channel list to know how much channels there is. Since it's already filled, we can safely remove it from the drivers' probe function. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap-dma: Restore the CLINK_CTRL in resume pathPeter Ujfalusi2014-09-231-0/+3
| | | | | | | | | | | | | When the audio stream is paused or suspended we stop the sDMA and when it is unpaused/resumed we start the channel without reconfiguring it. The omap_dma_stop() clears the link configuration when we pause the dma, but it is not setting it back on start. This will result only one audio buffer to be played back and the DMA will stop, since the linking is disabled. We need to restore the CLINK_CTRL register in case of resume. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: omap-dma: Add memory barrier to dma_resume pathPeter Ujfalusi2014-09-231-0/+2
| | | | | | | | | Add mb() call to resume path to ensure the necessary barrier. Resume can happen after waking up from suspend for example. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: Remove the context argument to the prep_dma_cyclic operationLaurent Pinchart2014-08-041-2/+1Star
| | | | | | | The argument is always set to NULL and never used. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2014-04-101-0/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine updates from Vinod Koul: - New driver for Qcom bam dma - New driver for RCAR peri-peri - New driver for FSL eDMA - Various odd fixes and updates thru the subsystem * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits) dmaengine: add Qualcomm BAM dma driver shdma: add R-Car Audio DMAC peri peri driver dmaengine: sirf: enable generic dt binding for dma channels dma: omap-dma: Implement device_slave_caps callback dmaengine: qcom_bam_dma: Add device tree binding dma: dw: Add suspend and resume handling for PCI mode DW_DMAC. dma: dw: allocate memory in two stages in probe Add new line to test result strings produced in verbose mode dmaengine: pch_dma: use tasklet_kill in teardown dmaengine: at_hdmac: use tasklet_kill in teardown dma: cppi41: start tear down only if channel is busy usb: musb: musb_cppi41: Dont reprogram DMA if tear down is initiated dmaengine: s3c24xx-dma: make phy->irq signed for error handling dma: imx-dma: Add missing module owner field dma: imx-dma: Replace printk with dev_* dma: fsl-edma: fix static checker warning of NULL dereference dma: Remove comment about embedding dma_slave_config into custom structs dma: mmp_tdma: move to generic device tree binding dma: mmp_pdma: add IRQF_SHARED when request irq dma: edma: Fix memory leak in edma_prep_dma_cyclic() ...
| * dma: omap-dma: Implement device_slave_caps callbackPeter Ujfalusi2014-03-291-0/+18
| | | | | | | | | | | | | | | | | | | | With the callback implemented omap-dma can provide information to client drivers regarding to supported address widths, directions, residue granularity, etc. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | dmaengine: omap-dma: more consolidation of CCR register setupRussell King2014-04-041-28/+18Star
| | | | | | | | | | | | | | | | | | | | | | We can move the handling of the DMA synchronisation control out of the prepare functions; this can be pre-calculated when the DMA channel has been allocated, so we don't need to duplicate this in both prepare functions. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: move IRQ handling to omap-dmaRussell King2014-04-041-6/+115
| | | | | | | | | | | | | | | | | | Move the interrupt handling for OMAP2+ into omap-dma, rather than using the legacy support in the platform code. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: move register read/writes into omap-dma.cRussell King2014-04-041-9/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Export the DMA register information from the SoC specific data, such that we can access the registers directly in omap-dma.c, mapping the register region ourselves as well. Rather than calculating the DMA channel register in its entirety for each access, we pre-calculate an offset base address for the allocated DMA channel and then just use the appropriate register offset. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: cleanup errata 3.3 handlingRussell King2014-04-041-23/+29
| | | | | | | | | | | | | | | | | | | | Provide a function to read the CSAC/CDAC register, working around the OMAP 3.2/3.3 erratum (which requires two reads of the register if the first returned zero. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: provide register read/write functionsRussell King2014-04-041-41/+61
| | | | | | | | | | | | | | | | | | Provide a pair of channel register accessors, and a pair of global accessors for non-channel specific registers. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: use cached CCR value when enabling DMARussell King2014-04-041-4/+2Star
| | | | | | | | | | | | | | | | | | | | We don't need to read-modify-write the CCR register; we already know what value it should contain at this point. Use the cached CCR value when setting the enable bit. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: move barrier to omap_dma_start_desc()Russell King2014-04-041-1/+7
| | | | | | | | | | | | | | | | | | We don't need to issue a barrier for every segment of a DMA transfer; doing this just once per descriptor will do. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: move clnk_ctrl setting to preparation functionsRussell King2014-04-041-14/+9Star
| | | | | | | | | | | | | | | | | | | | | | Move the clnk_ctrl setup to the preparation functions, saving its value in the omap_desc. This only needs to be set once per descriptor, not for each segment, so set it in omap_dma_start_desc() rather than omap_dma_start(). Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: improve efficiency loading C.SA/C.EI/C.FI registersRussell King2014-04-041-12/+20
| | | | | | | | | | | | | | | | | | The only thing which changes is which registers are written, so put this in local variables instead. This results in smaller code. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: consolidate clearing channel status registerRussell King2014-04-041-10/+10
| | | | | | | | | | | | | | | | | | Consolidate clearing of the channel status register, rather than open coding the same functionality in two places. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: move CCR buffering disable errata out of the fast pathRussell King2014-04-041-2/+5
| | | | | | | | | | | | | | | | | | | | Since we record the CCR register in the dma transaction, we can move the processing of the iframe buffering errata out of the omap_dma_start(). Move it to the preparation functions. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: provide register definitionsRussell King2014-04-041-54/+117
| | | | | | | | | | | | | | | | | | | | Provide our own set of more complete register definitions; this allows us to get rid of the meaningless 1 << n constants scattered throughout this code. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: consolidate setup of CCRRussell King2014-04-041-86/+61Star
| | | | | | | | | | | | | | | | | | | | Consolidate the setup of the channel control register. Prepare the basic value in the preparation of the DMA descriptor, and write it into the register upon descriptor execution. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: consolidate setup of CSDPRussell King2014-04-041-36/+28Star
| | | | | | | | | | | | | | | | | | | | | | Consolidate the setup of the channel source destination parameters register. This way, we calculate the required CSDP value when we setup a transfer descriptor, and only write it to the device registers once when we start the descriptor. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: move reading of dma position to omap-dma.cRussell King2014-04-041-2/+64
| | | | | | | | | | | | | | | | | | Read the current DMA position from the hardware directly rather than via arch/arm/plat-omap/dma.c. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: control start/stop directlyRussell King2014-04-041-10/+141
| | | | | | | | | | | | | | | | | | Program the non-cyclic mode DMA start/stop directly, rather than via arch/arm/plat-omap/dma.c. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: consolidate writes to DMA registersRussell King2014-04-041-75/+48Star
| | | | | | | | | | | | | | | | | | | | There's no need to keep writing registers which don't change value in omap_dma_start_sg(). Move this into omap_dma_start_desc() and merge the register updates together. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: program hardware directlyRussell King2014-04-041-16/+126
| | | | | | | | | | | | | | | | | | Program the transfer parameters directly into the hardware, rather than using the functions in arch/arm/plat-omap/dma.c. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: provide a hook to get the underlying DMA platform opsRussell King2014-04-041-0/+7
| | | | | | | | | | | | | | | | | | | | Provide and use a hook to obtain the underlying DMA platform operations so that omap-dma.c can access the hardware more directly without involving the legacy DMA driver. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | dmaengine: omap-dma: use devm_kzalloc() to allocate omap_dmadev.Russell King2014-04-041-2/+1Star
|/ | | | | | | | | Use devm_kzalloc() to allocate omap_dmadev() so that we don't need complex error cleanup paths. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dma: omap: Set debug level to debugging messagesEzequiel Garcia2014-01-201-2/+2
| | | | | | | | The channel allocated/released messages are just informative and not really interesting to users. Change them to "debug" level. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-15 04:46:35 +0200