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* Merge tag 'char-misc-4.4-rc1' of ↵Linus Torvalds2015-11-051-1/+38
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver update for 4.4-rc1. Lots of different driver and subsystem updates, hwtracing being the largest with the addition of some new platforms that are now supported. Full details in the shortlog. All of these have been in linux-next for a long time with no reported issues" * tag 'char-misc-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (181 commits) fpga: socfpga: Fix check of return value of devm_request_irq lkdtm: fix ACCESS_USERSPACE test mcb: Destroy IDA on module unload mcb: Do not return zero on error path in mcb_pci_probe() mei: bus: set the device name before running fixup mei: bus: use correct lock ordering mei: Fix debugfs filename in error output char: ipmi: ipmi_ssif: Replace timeval with timespec64 fpga: zynq-fpga: Fix issue with drvdata being overwritten. fpga manager: remove unnecessary null pointer checks fpga manager: ensure lifetime with of_fpga_mgr_get fpga: zynq-fpga: Change fw format to handle bin instead of bit. fpga: zynq-fpga: Fix unbalanced clock handling misc: sram: partition base address belongs to __iomem space coresight: etm3x: adding documentation for sysFS's cpu interface vme: 8-bit status/id takes 256 values, not 255 fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000 ARM: zynq: dt: Updated devicetree for Zynq 7000 platform. ARM: dt: fpga: Added binding docs for Xilinx Zynq FPGA manager. ver_linux: proc/modules, limit text processing to 'sed' ...
| * Merge 4.3-rc4 into char-misc-nextGreg Kroah-Hartman2015-10-068-53/+77
| |\ | | | | | | | | | | | | | | | | | | This is needed due to the duplicated iommu stuff to help with the merge and to prevent future issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | dma: Add support to program MIC x100 status descriptiorsSiva Yerramreddy2015-10-041-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MIC X100 DMA engine has a special status descriptor which writes an 8 byte value to a destination location. This is used to signal completion of all DMA descriptors prior to the status descriptor. This patch add a new DMA engine API which enables updating a destination address with an 8 byte immediate data value. Reviewed-by: Nikhil Rao <nikhil.rao@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Lawrynowicz, Jacek <jacek.lawrynowicz@intel.com> Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com> Signed-off-by: Siva Yerramreddy <yshivakrishna@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge tag 'tty-4.4-rc1' of ↵Linus Torvalds2015-11-054-25/+11Star
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial driver updates from Greg KH: "Here is the big tty and serial driver update for 4.4-rc1. Lots of serial driver updates and a few small tty core changes. Full details in the shortlog. All of these have been in linux-next for a while" * tag 'tty-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (148 commits) tty: Use unbound workqueue for all input workers tty: Abstract tty buffer work tty: Prevent tty teardown during tty_write_message() tty: core: Use correct spinlock flavor in tiocspgrp() tty: Combine SIGTTOU/SIGTTIN handling serial: amba-pl011: fix incorrect integer size in pl011_fifo_to_tty() ttyFDC: Fix build problems due to use of module_{init,exit} tty: remove unneeded return statement serial: 8250_mid: add support for DMA engine handling from UART MMIO dmaengine: hsu: remove platform data dmaengine: hsu: introduce stubs for the exported functions dmaengine: hsu: make the UART driver in control of selecting this driver serial: fix mctrl helper functions serial: 8250_pci: Intel MID UART support to its own driver serial: fsl_lpuart: add earlycon support tty: disable unbind for old 74xx based serial/mpsc console port serial: pl011: Spelling s/clocks-names/clock-names/ n_tty: Remove reader wakeups for TTY_BREAK/TTY_PARITY chars tty: synclink, fix indentation serial: at91, fix rs485 properties ...
| * | | dmaengine: hsu: remove platform dataHeikki Krogerus2015-10-183-18/+9Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are no platforms where it's not possible to calculate the number of channels based on IO space length, and since that is the only purpose for struct hsu_dma_platform_data, removing it. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | | dmaengine: hsu: make the UART driver in control of selecting this driverHeikki Krogerus2015-10-181-7/+2Star
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HSU (High Speed UART) DMA engine, like the name suggests, is an integrated DMA engine for UART and UART alone. Therefore, making the UART drivers responsible of selecting it and removing the user selectable option for it. The UARTs with this DMA engine can always select HSU_DMA when SERIAL_8250_DMA option is enabled. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge branch 'device-properties'Rafael J. Wysocki2015-10-251-8/+17
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * device-properties: ACPI / property: Fix subnode lookup scope for data-only subnodes acpi-dma: Add support for "dma-names" device property device property: Add fwnode_property_match_string() ACPI / property: Extend device_get_next_child_node() to data-only nodes ACPI / gpio: Split acpi_get_gpiod_by_index() ACPI / property: Extend fwnode_property_* to data-only subnodes ACPI / property: Expose data-only subnodes via sysfs ACPI / property: Add support for data-only subnodes ACPI / property: Add routine for extraction of _DSD properties
| * | acpi-dma: Add support for "dma-names" device propertyMika Westerberg2015-09-251-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation hard codes the two supported channels so that "tx" is always 0 and "rx" is always 1. This is because there has been no suitable way in ACPI to name resources. With _DSD device properties we can finally do this: Device (SPI1) { Name (_CRS, ResourceTemplate () { ... FixedDMA (0x0000, 0x0000, Width32bit) FixedDMA (0x0001, 0x0001, Width32bit) }) Name (_DSD, Package () { ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () {"dma-names", Package () {"tx", "rx"}} }, }) } The names "tx" and "rx" now provide index of the FixedDMA resource in question. Modify acpi_dma_request_slave_chan_by_name() so that it looks for "dma-names" property first and only then fall back using hardcoded indices. The DT "dma-names" binding that we reuse for ACPI is documented in Documentation/devicetree/bindings/dma/dma.txt. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | | Merge tag 'dmaengine-fix-4.3-rc4' of ↵Linus Torvalds2015-10-028-53/+77
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine fixes from Vinod Koul: "This contains fixes spread throughout the drivers, and also fixes one more instance of privatecnt in dmaengine. Driver fixes summary: - bunch of pxa_dma fixes for reuse of descriptor issue, residue and no-requestor - odd fixes in xgene, idma, sun4i and zxdma - at_xdmac fixes for cleaning descriptor and block addr mode" * tag 'dmaengine-fix-4.3-rc4' of git://git.infradead.org/users/vkoul/slave-dma: dmaengine: pxa_dma: fix residue corner case dmaengine: pxa_dma: fix the no-requestor case dmaengine: zxdma: Fix off-by-one for testing valid pchan request dmaengine: at_xdmac: clean used descriptor dmaengine: at_xdmac: change block increment addressing mode dmaengine: dw: properly read DWC_PARAMS register dmaengine: xgene-dma: Fix overwritting DMA tx ring dmaengine: fix balance of privatecnt dmaengine: sun4i: fix unsafe list iteration dmaengine: idma64: improve residue estimation dmaengine: xgene-dma: fix handling xgene_dma_get_ring_size result dmaengine: pxa_dma: fix initial list move
| * | dmaengine: pxa_dma: fix residue corner caseRobert Jarzmik2015-10-011-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A very tiny temporal window exists in the residue calculation where : - upon entering residue calculation, the transfer is ongoing - when reading the current transfer pointer, it just changed to the "finisher/linker" descriptor In this case, the residue returned is the whole transfer length instead of 0. Fix it. This appears almost in one extreme case, where the driver is used by older clients which inquire for residue in interrupt context, such as the smsc91x ethernet driver, in a tight loop : interrupt_handler() dmaengine_submit() do { dmaengine_tx_status() } while (residue > 0 || status != DMA_ERROR) Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: pxa_dma: fix the no-requestor caseRobert Jarzmik2015-10-011-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | A very small number of devices don't use the flow control offered by requestor lines. In these specific cases, the pxa dma driver should be aware of that and not try to use a requestor line. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: zxdma: Fix off-by-one for testing valid pchan requestAxel Lin2015-10-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The valid pchan range is 0 ~ d->dma_requests - 1. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: at_xdmac: clean used descriptorLudovic Desroches2015-10-011-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When putting back a descriptor to the free descs list, some fields are not set to 0, it can cause bugs if someone uses it without having this in mind. Descriptor are not put back one by one so it is easier to clean descriptors when we request them. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: stable@vger.kernel.org #4.2 Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: at_xdmac: change block increment addressing modeMaxime Ripard2015-10-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The addressing mode we were using was not only incrementing the address at each microblock, but also at each data boundary, which was severely slowing the transfer, without any benefit since we were not using the data stride. Switch to the micro block increment only in order to get back to an acceptable performance level. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Fixes: 6007ccb57744 ("dmaengine: xdmac: Add interleaved transfer support") Cc: stable@vger.kernel.org #4.2 Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: dw: properly read DWC_PARAMS registerAndy Shevchenko2015-09-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case we have less than maximum allowed channels (8) and autoconfiguration is enabled the DWC_PARAMS read is wrong because it uses different arithmetic to what is needed for channel priority setup. Re-do the caclulations properly. This now works on AVR32 board well. Fixes: fed2574b3c9f (dw_dmac: introduce software emulation of LLP transfers) Cc: yitian.bu@tangramtek.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: xgene-dma: Fix overwritting DMA tx ringRameshwar Prasad Sahu2015-09-301-26/+11Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes an over flow issue with the TX ring descriptor. Each descriptor is 32B in size and an operation requires 2 of these descriptors. Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: fix balance of privatecntPeter Ujfalusi2015-09-301-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dma_release_channel() decrements privatecnt counter and almost all dma_get* function increments it with the exception of dma_get_slave_channel(). In most cases this does not cause issue since normally the channel is not requested and released, but if a driver requests DMA channel via dma_get_slave_channel() and releases the channel the privatecnt will be unbalanced and this will prevent for example getting channel for memcpy. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: sun4i: fix unsafe list iterationEmilio López2015-09-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, sun4i_dma_free_contract iterates over lists and frees memory as it goes through them, causing reads to recently freed memory to be performed. Fix this by using the safe version of the iterator, so freed memory is not referenced at all. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: idma64: improve residue estimationAndy Shevchenko2015-09-251-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The residue calculation may provide a wrong estimation when the transfer is started. There are possible scenarios we have to separate: 1) the transfer is not started yet; residue is equal to the total length; 2) the transfer is just started (first chunk is ongoing); residue is equal to the total length without already transfered bytes; 3) the transfer is ongoing and we already sent few chunks of data; residue is equal to the total length without fully transfered chunks and already sent bytes. Mistakenly the calculation in cases 2) and 3) was done in the similar way and the result is equal to -bytes that have been transfered, i.e. quite big since size_t type can't keep negative values. Rewrite the calculation algorithm to be one pass and have a correct result. Besides above in case user asks for a status of the active DMA descriptor without pausing an ongoing transfer the residue will be estimated based on the register value, though it's still racy. Since the transfer is active the value is continuously being changed. Here we have to read two registers at a time. To minimize an error make those reads close to each other. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: xgene-dma: fix handling xgene_dma_get_ring_size resultAndrzej Hajda2015-09-251-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function can return negative value. The problem has been detected using proposed semantic patch scripts/coccinelle/tests/assign_signed_to_unsigned.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2046107 Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: pxa_dma: fix initial list moveRobert Jarzmik2015-09-251-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Since the commit to have an allocated list of virtual descriptors was reverted, the pxa_dma driver is broken, as it assumes the descriptor is placed on the allocated list upon allocation. Fix the issue in pxa_dma by making an allocated virtual descriptor a singleton. Fixes: 8c8fe97b2b8a ("Revert "dmaengine: virt-dma: don't always free descriptor upon completion"") Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* / genirq: Remove irq argument from irq flow handlersThomas Gleixner2015-09-161-1/+1
|/ | | | | | | | | | | | | | Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
* Merge tag 'dmaengine-4.3-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2015-09-0448-5168/+7606
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: "This time we have aded a new capability for scatter-gathered memset using dmaengine APIs. This is supported in xdmac & hdmac drivers We have added support for reusing descriptors for examples like video buffers etc. Driver will follow The behaviour of descriptor ack has been clarified and documented New devices added are: - dma controller in sun[457]i SoCs - lpc18xx dmamux - ZTE ZX296702 dma controller - Analog Devices AXI-DMAC DMA controller - eDMA support for dma-crossbar - imx6sx support in imx-sdma driver - imx-sdma device to device support Other: - jz4780 fixes - ioatdma large refactor and cleanup for removal of ioat v1 and v2 which is deprecated and fixes - ACPI support in X-Gene DMA engine driver - ipu irq fixes - mvxor fixes - minor fixes spread thru drivers" [ The Kconfig and Makefile entries got re-sorted alphabetically, and I handled the conflict with the new Intel integrated IDMA driver by slightly mis-sorting it on purpose: "IDMA64" got sorted after "IMX" in order to keep the Intel entries together. I think it might be a good idea to just rename the IDMA64 config entry to INTEL_IDMA64 to make the sorting be a true sort, not this mismash. Also, this merge disables the COMPILE_TEST for the sun4i DMA controller, because it does not compile cleanly at all. - Linus ] * tag 'dmaengine-4.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (89 commits) dmaengine: ioatdma: add Broadwell EP ioatdma PCI dev IDs dmaengine :ipu: change ipu_irq_handler() to remove compile warning dmaengine: ioatdma: Fix variable array length dmaengine: ioatdma: fix sparse "error" with prep lock dmaengine: hdmac: Add memset capabilities dmaengine: sort the sh Makefile dmaengine: sort the sh Kconfig dmaengine: sort the dw Kconfig dmaengine: sort the Kconfig dmaengine: sort the makefile drivers/dma: make mv_xor.c driver explicitly non-modular dmaengine: Add support for the Analog Devices AXI-DMAC DMA controller devicetree: Add bindings documentation for Analog Devices AXI-DMAC dmaengine: xgene-dma: Fix the lock to allow client for further submission of requests dmaengine: ioatdma: fix coccinelle warning dmaengine: ioatdma: fix zero day warning on incompatible pointer type dmaengine: tegra-apb: Simplify locking for device using global pause dmaengine: tegra-apb: Remove unnecessary return statements and variables dmaengine: tegra-apb: Avoid unnecessary channel base address calculation dmaengine: tegra-apb: Remove unused variables ...
| * dmaengine: ioatdma: add Broadwell EP ioatdma PCI dev IDsDave Jiang2015-08-282-1/+42
| | | | | | | | | | | | | | | | Adding the Broadwell Xeon ioatdma PCI device IDs and related bits. This is still IOATDMA 3.2 based hw. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine :ipu: change ipu_irq_handler() to remove compile warningyalin wang2015-08-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | Change ipu_irq_handler() to avoid gcc warning: drivers/dma/ipu/ipu_irq.c:305:4: warning: 'irq' may be used uninitialized in this function [-Wmaybe-uninitialized] generic_handle_irq(irq); Signed-off-by: yalin wang <yalin.wang2010@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: ioatdma: Fix variable array lengthDave Jiang2015-08-261-2/+10
| | | | | | | | | | | | | | | | | | | | Sparse reported: drivers/dma/ioat/prep.c:637:27: sparse: Variable length array is used. Assigning a static value for the array. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: ioatdma: fix sparse "error" with prep lockDave Jiang2015-08-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | The prep lock gets acquired in ioat_check_space_lock and released in ioat_tx_submit_unlock. Setting the annotations so sparse does not freak out. drivers/dma/ioat/dma.c:273:30: sparse: context imbalance in 'ioat_tx_submit_unlock' - unexpected unlock drivers/dma/ioat/dma.c:476:5: sparse: context imbalance in 'ioat_check_space_lock' - wrong count at exit Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: hdmac: Add memset capabilitiesMaxime Ripard2015-08-262-3/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | Just like for the XDMAC, the SoCs that embed the HDMAC don't have any kind of GPU, and need to accelerate a few framebuffer-related operations through their DMA controller. However, unlike the XDMAC, the HDMAC doesn't have the memset capability built-in. That can be easily emulated though, by doing a transfer with a fixed address on the variable that holds the value we want to set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: sort the sh MakefileVinod Koul2015-08-261-2/+2
| | | | | | | | | | Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: sort the sh KconfigVinod Koul2015-08-261-12/+12
| | | | | | | | | | Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: sort the dw KconfigVinod Koul2015-08-241-3/+3
| | | | | | | | Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: sort the KconfigVinod Koul2015-08-241-310/+316
| | | | | | | | | | | | | | | | dmaengine Kconfig grew over the years, unfortunately without any order to it. So order by core, driver and client sections, and sort these sections alphabetically Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: sort the makefileVinod Koul2015-08-241-41/+47
| | | | | | | | | | | | | | | | dmaengine makefile grew over the years, unfortunately without any order to it. So order by core, dmatest and driver sections and sort these sections alphabetically Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * drivers/dma: make mv_xor.c driver explicitly non-modularPaul Gortmaker2015-08-231-33/+3Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig for this driver is currently: config MV_XOR bool "Marvell XOR engine support" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. We leave some tags like MODULE_AUTHOR for documentation purposes. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: dmaengine@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine: Add support for the Analog Devices AXI-DMAC DMA controllerLars-Peter Clausen2015-08-233-0/+702
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Analog Devices AXI-DMAC DMA controller. This controller is a soft peripheral that can be instantiated in a FPGA and is often used in Analog Devices' reference designs for FPGA platforms. The peripheral has various configuration options that can be selected at synthesis time and influence the supported features of the instantiated peripheral, those options are represented as device-tree properties to allow the driver to behave accordingly. The peripheral has a zero latency architecture, which means it is possible to switch from one to the next descriptor without any delay. This is archived by having a internal queue which can hold multiple descriptors. The driver supports this, which means it will submit new descriptors directly to the hardware until the queue is full and not wait for a descriptor to complete before the next one is submitted. Interrupts are used for the descriptor queue flow control. Currently the driver supports SG, cyclic and interleaved slave DMA. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * Merge branch 'topic/zxdma' into for-linusVinod Koul2015-08-233-0/+959
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| | * dmaengine: zxdma: Fix force stop bugJun Nie2015-08-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | DMA will not stop when clearing enable bit till all transaction is done. The bug is exposed in audio playback because ring DMA chain never stop. Force hardware to stop with setting FORCE bit. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * dmaengine: zxdma: Fix data width bugJun Nie2015-08-051-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align src and dst width to fix data alignment issue as trailing single transaction that does not fill a full burst require identical src/dst data width. Burst length limitation can be addressed well too. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * dmaengine: zxdma: Support cyclic dmaJun Nie2015-08-051-9/+84
| | | | | | | | | | | | | | | | | | | | | Support cyclic dma for audio playback Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * dmaengine: zxdma: explicitly free irq on device removalVinod Koul2015-07-161-3/+7
| | | | | | | | | | | | | | | | | | | | | At device removal, tasklets are not disabled and irqs are still enabled, so free the irq explicitly on device removal Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * dmaengine: zxdma: Support ZTE ZX296702 dmaJun Nie2015-07-163-0/+878
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add ZTE ZX296702 dma controller support. Only device tree probe is support currently. Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/ti-xbar' into for-linusVinod Koul2015-08-231-10/+31
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| | * | dmaengine: ti-dma-crossbar: Fix checking return value of devm_ioremap_resourceAxel Lin2015-08-051-5/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_ioremap_resource returns ERR_PTR on failure. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: ti-dma-crossbar: Add support for eDMAPeter Ujfalusi2015-07-221-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The crossbar for eDMA works exactly the same way as sDMA, but sDMA requires an offset of 1, while no offset is needed for eDMA. Based on the patch from Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> CC: Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: ti-dma-crossbar: Make idr xbar instance-specificMisael Lopez Cruz2015-07-221-4/+5
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | In preparation for supporting multiple DMA crossbar instances, make the idr xbar instance specific. Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/at_xdmac' into for-linusVinod Koul2015-08-231-6/+6
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| | * | dmaengine: at_xdmac: fix indentationLudovic Desroches2015-07-061-6/+6
| | |/ | | | | | | | | | | | | | | | | | | Fix indentation. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: xgene-dma: Fix the lock to allow client for further submission of ↵Rameshwar Prasad Sahu2015-08-211-11/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | requests This patch provides the fix in the cleanup routing such that client can perform further submission by releasing the lock before calling client's callback function. Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: ioatdma: fix coccinelle warningDave Jiang2015-08-211-4/+3Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplifying the end return. This existed in the original code but was flagged when refactoring of the code made it appear it's new. coccinelle warnings: (new ones prefixed by >>) >> drivers/dma/ioat/init.c:1018:1-3: WARNING: end returns can be simpified Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: ioatdma: fix zero day warning on incompatible pointer typeDave Jiang2015-08-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32bit build is creating this warning. Since we don't expect anyone actually use this on 32bit, restrict ioatdma to be built only on x86_64. This issue has long existed and only reason it's surfacing due to code refactoring. drivers/dma/ioat/dma.c: In function 'ioat_timer_event': >> drivers/dma/ioat/dma.c:870:39: warning: passing argument 2 of 'ioat_cleanup_preamble' from incompatible pointer type if (ioat_cleanup_preamble(ioat_chan, &phys_complete)) ^ drivers/dma/ioat/dma.c:577:13: note: expected 'u64 *' but argument is of type 'dma_addr_t *' static bool ioat_cleanup_preamble(struct ioatdma_chan *ioat_chan, ^ Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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