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* mm/mmu_notifier: convert user range->blockable to helper functionJérôme Glisse2019-05-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the mmu_notifier_range_blockable() helper function instead of directly dereferencing the range->blockable field. This is done to make it easier to change the mmu_notifier range field. This patch is the outcome of the following coccinelle patch: %<------------------------------------------------------------------- @@ identifier I1, FN; @@ FN(..., struct mmu_notifier_range *I1, ...) { <... -I1->blockable +mmu_notifier_range_blockable(I1) ...> } ------------------------------------------------------------------->% spatch --in-place --sp-file blockable.spatch --dir . Link: http://lkml.kernel.org/r/20190326164747.24405-3-jglisse@redhat.com Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Reviewed-by: Ralph Campbell <rcampbell@nvidia.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Cc: Christian König <christian.koenig@amd.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jan Kara <jack@suse.cz> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Peter Xu <peterx@redhat.com> Cc: Felix Kuehling <Felix.Kuehling@amd.com> Cc: Jason Gunthorpe <jgg@mellanox.com> Cc: Ross Zwisler <zwisler@kernel.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krcmar <rkrcmar@redhat.com> Cc: Michal Hocko <mhocko@kernel.org> Cc: Christian Koenig <christian.koenig@amd.com> Cc: John Hubbard <jhubbard@nvidia.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'drm-next-2019-05-09' of git://anongit.freedesktop.org/drm/drmLinus Torvalds2019-05-0978-1746/+5431
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "This has two exciting community drivers for ARM Mali accelerators. Since ARM has never been open source friendly on the GPU side of the house, the community has had to create open source drivers for the Mali GPUs. Lima covers the older t4xx and panfrost the newer 6xx/7xx series. Well done to all involved and hopefully this will help ARM head in the right direction. There is also now the ability if you don't have any of the legacy drivers enabled (pre-KMS) to remove all the pre-KMS support code from the core drm, this saves 10% or so in codesize on my machine. i915 also enable Icelake/Elkhart Lake Gen11 GPUs by default, vboxvideo moves out of staging. There are also some rcar-du patches which crossover with media tree but all should be acked by Mauro. Summary: uapi changes: - Colorspace connector property - fourcc - new YUV formts - timeline sync objects initially merged - expose FB_DAMAGE_CLIPS to atomic userspace new drivers: - vboxvideo: moved out of staging - aspeed: ASPEED SoC BMC chip display support - lima: ARM Mali4xx GPU acceleration driver support - panfrost: ARM Mali6xx/7xx Midgard/Bitfrost acceleration driver support core: - component helper docs - unplugging fixes - devm device init - MIPI/DSI rate control - shmem backed gem objects - connector, display_info, edid_quirks cleanups - dma_buf fence chain support - 64-bit dma-fence seqno comparison fixes - move initial fb config code to core - gem fence array helpers for Lima - ability to remove legacy support code if no drivers requires it (removes 10% of drm.ko size) - lease fixes ttm: - unified DRM_FILE_PAGE_OFFSET handling - Account for kernel allocations in kernel zone only panel: - OSD070T1718-19TS panel support - panel-tpo-td028ttec1 backlight support - Ronbo RB070D30 MIPI/DSI - Feiyang FY07024DI26A30-D MIPI-DSI panel - Rocktech jh057n00900 MIPI-DSI panel i915: - Comet Lake (Gen9) PCI IDs - Updated Icelake PCI IDs - Elkhartlake (Gen11) support - DP MST property addtions - plane and watermark fixes - Icelake port sync and VEBOX disable fixes - struct_mutex usage reduction - Icelake gamma fix - GuC reset fixes - make mmap more asynchronous - sound display power well race fixes - DDI/MIPI-DSI clocks for Icelake - Icelake RPS frequency changing support - Icelake workarounds amdgpu: - Use HMM for userptr - vega20 experimental smu11 support - RAS support for vega20 - BACO support for vega12 + fixes for vega20 - reworked IH interrupt handling - amdkfd RAS support - Freesync improvements - initial timeline sync object support - DC Z ordering fixes - NV12 planes support - colorspace properties for planes= - eDP opts if eDP already initialized nouveau: - misc fixes etnaviv: - misc fixes msm: - GPU zap shader support expansion - robustness ABI addition exynos: - Logging cleanups tegra: - Shared reset fix - CPU cache maintenance fix cirrus: - driver rewritten using simple helpers meson: - G12A support vmwgfx: - Resource dirtying management improvements - Userspace logging improvements virtio: - PRIME fixes rockchip: - rk3066 hdmi support sun4i: - DSI burst mode support vc4: - load tracker to detect underflow v3d: - v3d v4.2 support malidp: - initial Mali D71 support in komeda driver tfp410: - omap related improvement omapdrm: - drm bridge/panel support - drop some omap specific panels rcar-du: - Display writeback support" * tag 'drm-next-2019-05-09' of git://anongit.freedesktop.org/drm/drm: (1507 commits) drm/msm/a6xx: No zap shader is not an error drm/cma-helper: Fix drm_gem_cma_free_object() drm: Fix timestamp docs for variable refresh properties. drm/komeda: Mark the local functions as static drm/komeda: Fixed warning: Function parameter or member not described drm/komeda: Expose bus_width to Komeda-CORE drm/komeda: Add sysfs attribute: core_id and config_id drm: add non-desktop quirk for Valve HMDs drm/panfrost: Show stored feature registers drm/panfrost: Don't scream about deferred probe drm/panfrost: Disable PM on probe failure drm/panfrost: Set DMA masks earlier drm/panfrost: Add sanity checks to submit IOCTL drm/etnaviv: initialize idle mask before querying the HW db drm: introduce a capability flag for syncobj timeline support drm: report consistent errors when checking syncobj capibility drm/nouveau/nouveau: forward error generated while resuming objects tree drm/nouveau/fb/ramgk104: fix spelling mistake "sucessfully" -> "successfully" drm/nouveau/i2c: Disable i2c bus access after ->fini() drm/nouveau: Remove duplicate ACPI_VIDEO_NOTIFY_PROBE definition ...
| * Merge tag 'drm-misc-next-fixes-2019-05-08' of ↵Dave Airlie2019-05-091-1/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm/drm-misc into drm-next - A handful of fixes from -next that just missed feature freeze - More panfrost fixes that went directly in -misc-next-fixes (various) - Fix searchpaths during build (Masahiro) - msm patch to fix the driver for chips without zap shader (Rob) - Fix freeing imported buffers in drm_gem_cma_free_object() (Noralf) Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Rob Clark <robdclark@chromium.org> Cc: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Dave Airlie <airlied@redhat.com> From: Sean Paul <sean@poorly.run> Link: https://patchwork.freedesktop.org/patch/msgid/20190508205153.GA91135@art_vandelay
| | * drm: prefix header search paths with $(srctree)/Masahiro Yamada2019-04-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the Kbuild core manipulates header search paths in a crazy way [1]. To fix this mess, I want all Makefiles to add explicit $(srctree)/ to the search paths in the srctree. Some Makefiles are already written in that way, but not all. The goal of this work is to make the notation consistent, and finally get rid of the gross hacks. Having whitespaces after -I does not matter since commit 48f6e3cf5bc6 ("kbuild: do not drop -I without parameter"). [1]: https://patchwork.kernel.org/patch/9632347/ Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/1553859161-2628-1-git-send-email-yamada.masahiro@socionext.com
| * | Merge branch 'drm-next-5.2' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2019-05-0314-195/+75Star
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next - SR-IOV fixes - Raven flickering fix - Misc spelling fixes - Vega20 power fixes - Freesync improvements - DC fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190502193020.3562-1-alexander.deucher@amd.com
| | * drm/amdgpu: expose VCE 4.0 powergate interfaceEvan Quan2019-04-291-9/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | SMU will use this interface to power down the VCE engine. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: value of amdgpu_sriov_vf cannot be set into F32_POLL_ENABLEWentao Lou2019-04-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | amdgpu_sriov_vf would return 0x0 or 0x4 to indicate if sriov. but F32_POLL_ENABLE need 0x0 or 0x1 to determine if enabled. set 0x4 into F32_POLL_ENABLE would make SDMA0_GFX_RB_WPTR_POLL_CNTL not working. Signed-off-by: Wentao Lou <Wentao.Lou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: update Vega20 sdma golden settingsEvan Quan2019-04-291-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | Update Vega20 sdma golden settings. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Check if SW SMU is supported before accessing funcsLeo Li2019-04-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smu.ppt_funcs is only initialized for ASICs supporting SW SMU. On a Hawaii ASIC, attempting to access the udev attribute ATTRS{power_dpm_state} will cause a null pointer deref in amdgpu_get_dpm_state() because of this. Fix by checking if SW SMU is supported first. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: Change VRAM lost print from ERR to INFAndrey Grodzovsky2019-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | It's normal for VRAM to lost during GPU reset and so change the log level to INFO to avoid confusing users. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/amdgpu: fix spelling mistake "recieve" -> "receive"Colin Ian King2019-04-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | There is a spelling mistake in a pr_err message. Fix it. Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: fix spelling mistake "gateing" -> "gating"Colin Ian King2019-04-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | There is a spelling mistake in a DRM_INFO message. Fix it. Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: enable MGCG for PCOLikun Gao2019-04-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Enable MGCG for picasso. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: disable DRIVER_ATOMIC under SRIOVYintian Tao2019-04-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Under SRIOV, we need disable DRIVER_ATOMIC. Otherwise, it will trigger WARN_ON at drm_universal_plane_init. Signed-off-by: Yintian Tao <yttao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: amdgpu_device_recover_vram got NULL of shadow->parentwentalou2019-04-191-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | amdgpu_bo_destroy had a bug by calling amdgpu_bo_unref outside mutex_lock. If amdgpu_device_recover_vram executed between amdgpu_bo_unref and list_del_init, it would get NULL of shadow->parent, then caused Call Trace and GPU reset failed. Signed-off-by: Wentao Lou <Wentao.Lou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: get_fw_version isn't ASIC specificAmber Lin2019-04-195-176/+51Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Method of getting firmware version is the same across ASICs, so remove them from ASIC-specific files and create one in amdgpu_amdkfd.c. This new created get_fw_version simply reads fw_version from adev->gfx than parsing the ucode header. Signed-off-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: enable Vega20 BACO reset supportEvan Quan2019-04-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | PSP SOS firmware needs to be 0x80067 or later. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | Merge branch 'drm-next-5.2' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2019-04-245-35/+167
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next - Add the amdgpu specific bits for timeline support - Add internal interfaces for xgmi pstate support - DC Z ordering fixes for planes - Add support for NV12 planes in DC - Add colorspace properties for planes in DC - eDP optimizations if the GOP driver already initialized eDP - DC bandwidth validation tracing support Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190419150034.3473-1-alexander.deucher@amd.com
| | * drm/amdgpu: Set proper function to set xgmi pstateshaoyunl2019-04-121-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | Driver need to call SMU to set xgmi pstate Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: fix old fence check in amdgpu_fence_emitChristian König2019-04-121-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | We don't hold a reference to the old fence, so it can go away any time we are waiting for it to signal. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: update version for timeline syncobj support in amdgpu v2Chunming Zhou2019-04-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | v2: update version for amd-staging-drm-next merge Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amdgpu: add timeline support in amdgpu CS v3Chunming Zhou2019-04-122-26/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | syncobj wait/signal operation is appending in command submission. v2: separate to two kinds in/out_deps functions v3: fix checking for timeline syncobj Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Cc: Tobias Hector <Tobias.Hector@amd.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Dave Airlie <airlied@redhat.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | BackMerge v5.1-rc5 into drm-nextDave Airlie2019-04-153-6/+17
| |\ \ | | |/ | |/| | | | | | | | | | Need rc5 for udl fix to add udl cleanups on top. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/amd/display: Remove semicolon from to_dm_plane_state definitionNicholas Kazlauskas2019-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The extra ; in the macro definition creates an empty statement preventing any variable declarations from occuring after any use of to_dm_plane_state(...). Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: support dpm level modification under virtualization v3Yintian Tao2019-04-107-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Under vega10 virtualuzation, smu ip block will not be added. Therefore, we need add pp clk query and force dpm level function at amdgpu_virt_ops to support the feature. v2: add get_pp_clk existence check and use kzalloc to allocate buf v3: return -ENOMEM for allocation failure and correct the coding style Signed-off-by: Yintian Tao <yttao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Always enable memory sharing within same XGMI hiveshaoyunl2019-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | XGMI Memory sharing will be disbaled by default for security reason after boot up, it depends on driver to enable the memory sharing Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Add a check to avoid panic because of unexpected irqsxinhui pan2019-04-103-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IP initialize ras in late_init, because of the BUGs of PSP or any other components, driver receives unexpected irqs. It is ok to add such check anyway. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: sdma use amdgpu_ras_feature_enable_on_bootxinhui pan2019-04-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | handle ras enable on boot. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: gmc use amdgpu_ras_feature_enable_on_bootxinhui pan2019-04-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | handle ras enable on boot. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: gfx use amdgpu_ras_feature_enable_on_bootxinhui pan2019-04-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | handle ras enable on boot. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Introduce another ras enable functionxinhui pan2019-04-102-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many parts of the whole SW stack can program the ras enablement state during the boot. Now we handle that case by adding one function which check the ras flags and choose different code path. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: xinhui pan <xinhui.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Make default ras error type to nonexinhui pan2019-04-101-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unless IP has implemented its own ras, use ERROR_NONE as the default type. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2)Mario Kleiner2019-04-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In VRR mode, proper vblank/pageflip timestamps can only be computed after the display scanout position has left front-porch. Therefore delay calls to drm_crtc_handle_vblank(), and thereby calls to drm_update_vblank_count() and pageflip event delivery, to after the end of front-porch when in VRR mode. We add a new vupdate irq, which triggers at the end of the vupdate interval, ie. at the end of vblank, and calls the core vblank handler function. The new irq handler is not executed in standard non-VRR mode, so vblank handling for fixed refresh rate mode is identical to the past implementation. v2: Implement feedback by Nicholas and Paul Menzel. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Rework vrr flip throttling for late vblank irq.Mario Kleiner2019-04-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For throttling to work correctly, we always need a baseline vblank count last_flip_vblank that increments at start of front-porch. This is the case for drm_crtc_vblank_count() in non-VRR mode, where the vblank irq fires at start of front-porch and triggers DRM core vblank handling, but it is no longer the case in VRR mode, where core vblank handling is done later, after end of front-porch. Therefore drm_crtc_vblank_count() is no longer useful for this. We also can't use drm_crtc_accurate_vblank_count(), as that would screw up vblank timestamps in VRR mode when called in front-porch. To solve this, use the cooked hardware vblank counter returned by amdgpu_get_vblank_counter_kms() instead, as that one is cooked to always increment at start of front-porch, independent of when vblank related irq's fire. This patch allows vblank irq handling to happen anywhere within vblank of even after it, without a negative impact on flip throttling, so followup patches can shift the vblank core handling trigger point wherever they need it. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Add preferred_domain check when determine XGMI stateshaoyunl2019-04-032-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid unnecessary XGMI hight pstate trigger when mapping none-vram memory for peer device Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: provide the page fault queue to the VM codeChristian König2019-04-032-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | We are going to need that for recoverable page faults. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: handle leaf PDEs as PTEs on VegaChristian König2019-04-031-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | This way we get retry faults for missing PDs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: fix ATC handling for RyzenChristian König2019-04-031-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise we don't correctly use translate further. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Adjust TMR address alignment as per HW requirementshaoyunl2019-04-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to HW engineer, they prefer the TMR address be "naturally aligned", e.g. the start address must be an integer divide of TME size. Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Correct the irq types' num of sdmaEmily Deng2019-04-036-34/+30Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the issue about TDR-2 will have "fallback timer expired on ring sdma1". It is because the wrong number of irq types setting. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | Merge branch 'drm-next-5.2' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2019-04-0359-1457/+4898
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next amdgpu: - Switch to HMM for userptr (reverted until HMM fixes land) - New experimental SMU 11 replacement for powerplay for vega20 (not enabled by default) - Initial RAS support for vega20 - BACO support for vega12 - BACO fixes for vega20 - Rework IH handling for page fault and retry interrupts - Cleanly split CPU and GPU paths for GPUVM updates - Powerplay fixes - XGMI fixes - Rework how DC interacts with atomic for planes - Clean up and simplify DC/Powerplay interfaces - Misc cleanups and bug fixes amdkfd: - Switch to HMM for userptr (reverted until HMM fixes land) - Add initial RAS support - MQD fixes ttm: - Unify DRM_FILE_PAGE_OFFSET handling - Account for kernel allocations in kernel zone only - Misc cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190402170820.22197-1-alexander.deucher@amd.com
| | * | Revert "drm/amdgpu: use HMM callback to replace mmu notifier"Alex Deucher2019-03-284-72/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 57731a07795ae80790c6ae7d8e7001cdbd6d14c0. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | Revert "drm/amdgpu: replace get_user_pages with HMM mirror helpers"Alex Deucher2019-03-289-182/+278
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 915d3eecfa23693bac9e54cdacf84fb4efdcc5c4. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | Revert "drm/amdgpu: fix HMM config dependency issue"Alex Deucher2019-03-283-19/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 6b8f7e3dee7883084932bbdfce471a2960c6db5d. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | Revert "drm/amdkfd: support concurrent userptr update for HMM"Alex Deucher2019-03-281-19/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 386a68e78620c793ed1ba9bc5789b90c18be262a. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | Revert "drm/amdgpu: support userptr cross VMAs case with HMM"Alex Deucher2019-03-281-91/+35Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5aeaccca30023c00d982dfa7bfd25b384523460a. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | Revert "drm/amdgpu: more descriptive message if HMM not enabled"Alex Deucher2019-03-281-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 194f87ddffe26bbbd124c549a9bf12a96a7f2919. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: don't put the root PD into the relocated listChristian König2019-03-281-10/+8Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of skipping the root PD while processing the relocated list just never put it on the list in the first place. This avoids walking the list all together when the root PD is the only entry and so also avoids trying to submit a zero sized IB to the SDMA. Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: drop the ib from the VM update parametersChristian König2019-03-282-16/+13Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is redundant with the job pointer. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: move VM table mapping into the backend as wellChristian König2019-03-284-27/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean that up further and also fix another case where the BO wasn't kmapped for CPU based updates. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-05-14 10:07:00 +0200