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* drm/amdgpu: revert "enable gfxoff in non-sriov and stutter mode by default"Christian König2018-11-012-4/+2Star
| | | | | | | | | | | | | | | | This is still completely breaking my Raven system. This reverts commit cdf2f910fa969adca1b0e3ad2b487821233dc038. Revert until we sort out the sbios and firmware combinations that work correctly. bug: https://bugs.freedesktop.org/show_bug.cgi?id=108606 Cc: stable@vger.kernel.org # v4.19 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix skipping hangged job reset during gpu recover.Andrey Grodzovsky2018-11-011-1/+1
| | | | | | | | | | | | | | | | Problem: During GPU recover DAL would hang in amdgpu_pm_compute_clocks->amdgpu_fence_wait_empty Fix: Turns out there was a typo introduced by 3320b8d drm/amdgpu: remove job->ring which caused skipping amdgpu_fence_driver_force_completion and so the hangged job was never force signaled and this would cause the hang later in DAL. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix compute ring 1.0.0 failure after resetAndrey Grodzovsky2018-10-261-2/+4
| | | | | | | | | | | | | | | Problem: After GPU reset on dGPUs with gfx8 compute ring 1.0.0 fails to pass the ring test. Ring registers inspection shows that it's active and no hang is observed (rptr == wptr) No significant diffs were observed between CP_HQD* registers for the ring in good and bad shape. Fix: No clear reason why but reversing the order of ring tests fixes the problem. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix VM leaf walkingChristian König2018-10-261-1/+2
| | | | | | | | | | | Make sure we don't try to go down further after the leave walk already ended. This fixes a crash with a new VM test. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Rex Zhu Rex.Zhu@amd.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix amdgpu_vm_finiChristian König2018-10-251-1/+3
| | | | | | | | | We should not remove mappings in rbtree_postorder_for_each_entry_safe because that rebalances the tree. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix null point errorRex Zhu2018-10-254-6/+10
| | | | | | | | | | need to check adev->powerplay.pp_funcs first, becasue from AI, the smu ip can be disabled by user, and the pp_handle is null in this case. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix null pointer amdgpu_device_fw_loadingEmily Deng2018-10-221-1/+1
| | | | | | | | Need to check adev->powerplay.pp_funcs. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: error out when force clock level under auto dpm mode V2Evan Quan2018-10-221-3/+12
| | | | | | | | | | | | Forcing clock level is supported under manual dpm mode only. Error out when trying to set under manual mode. Instead of doing nothing and reporting success. V2: update for mclk/pcie clock level settings also Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Fix uninitialized symbol errorJames Zhu2018-10-171-2/+2
| | | | | | | | | ret_code should be initialized with 0. The check of read/write ptr should be activate when UVD_POWER_STATUS_TILES is off. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Fix debugfs error handlingDan Carpenter2018-10-161-10/+2Star
| | | | | | | | | | | | | | | | | | | | The error handling is wrong and "ent" could be NULL we when dereference it to get "ent->d_inode". The thing is that normally debugfs_create_file() is not supposed to require (or have) any error handling. That function does return error pointers if debugfs is turned off but we know it's enable here. When it's enabled, then it returns NULL on error. So what I did was I stripped out all the error handling except around the i_size_write(). I could have just used a NULL check instead of an IS_ERR_OR_NULL() but I figured this was more clear because that way you don't have to look at the surrounding code to see whether debugfs is enabled or not. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Update gc_9_0 golden settings.Feifei Xu2018-10-161-0/+1
| | | | | | | | | Add mmDB_DEBUG3 settings. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: update Vega20 SDMA golden settingEvan Quan2018-10-161-0/+2
| | | | | | | | Update SDMA golden settings. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix typo in amdgpu_vmid_mgr_initRex Zhu2018-10-161-1/+1
| | | | | | | | | fix a typo in for loop: i->j Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: correct SPDX identifier in amdgpu_trace_points.cJonathan Gray2018-10-151-1/+1
| | | | | | | | | | Commit b24413180f5600bcb3bb70fbed5cf186b60864bd 'License cleanup: add SPDX GPL-2.0 license identifier to files with no license' incorrectly added "SPDX-License-Identifier: GPL-2.0" to a file with MIT license text. Change the SPDX identifier to match the license text. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Update SPG mode UVD status clearJames Zhu2018-10-121-3/+3
| | | | | | | | | Update Static Power Gate mode UVD status clear Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Set VCPU busy after gate power during vcn SPG startJames Zhu2018-10-121-0/+4
| | | | | | | | | Set VCPU busy after gate power during vcn Static Power Gate start Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Apply new UMC enable for VNC DPG modeJames Zhu2018-10-121-3/+8
| | | | | | | | | Apply new UMC enable for VNC Dynamic Power Gate mode Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Remove SPG mode unused steps during vcn startJames Zhu2018-10-121-28/+2Star
| | | | | | | | | Remove Sitatic Power Gate mode unused steps during vcn start Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Add SPG mode Register XX checkJames Zhu2018-10-121-0/+4
| | | | | | | | | Add Static Power Gate mode Register XX check Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Move SPG mode mc resume after MPC controlJames Zhu2018-10-121-2/+2
| | | | | | | | | Move Static Power Gate mode mc resume after MPC control Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Update SPG mode VCN global tilingJames Zhu2018-10-121-0/+18
| | | | | | | | | Update Static Power Gate mode VCN global tiling Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Update SPG mode VCN memory controlJames Zhu2018-10-121-7/+6Star
| | | | | | | | | Update Static Power Gate mode VCN memory control Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Apply new UMC enable for VNC DPG mode startJames Zhu2018-10-121-4/+5
| | | | | | | | | Apply new UMC enable for VNC Dynamic Power Gate mode start Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Remove DPG mode unused steps during vcn startJames Zhu2018-10-121-27/+1Star
| | | | | | | | | Remove Dynamic Power Gate mode unused steps during VCN start Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Add DPG mode Register XX checkJames Zhu2018-10-121-0/+8
| | | | | | | | | Add Dynamic Power Gate mode Register XX check Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Update DPG mode VCN global tiling registersJames Zhu2018-10-121-4/+15
| | | | | | | | | Update Dynamic Power Gate mode VCN global tiling registers Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Update DPG mode VCN memory controlJames Zhu2018-10-121-8/+11
| | | | | | | | | Update Dynamic Power Gate mode VCN memory control Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Reduce unnecessary local variableJames Zhu2018-10-121-9/+9
| | | | | | | | | Reduce unnecessary local variable. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Add ring W/R PTR check for VCN DPG mode stopJames Zhu2018-10-121-0/+10
| | | | | | | | | | Add ring write/read pointer check for VCN dynamic power gate mode stop,to make sure that no job is left in ring before turn off DPG mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Update latest spg mode stop for VCNJames Zhu2018-10-121-15/+26
| | | | | | | | | Update latest static power gate mode stop function for VCN Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn:Update latest UVD_MPC register for VCNJames Zhu2018-10-121-12/+40
| | | | | | | | | | Update latest UVD_MPC register for VCN. Use defined macro to replace value for readability. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Set the default value about gds vmid0 sizeEmily Deng2018-10-121-1/+14
| | | | | | | | | | | | | | | | For sriov, when first run windows guest, then run linux guest, the gds vmid0 size will be reset to 0 by windows guest. So if the value has been reset to 0, then set the value to the default value in linux guest. v2: Fixed value instead of reading mmGDS_VMID0_SIZE. v3: Set the default value of the switch. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove set but not used variable 'header'YueHaibing2018-10-101-2/+0Star
| | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c: In function 'amdgpu_ucode_init_bo': drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c:431:39: warning: variable 'header' set but not used [-Wunused-but-set-variable] Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove set but not used variable 'ring' in psp_v11_0_ring_stopYueHaibing2018-10-101-3/+0Star
| | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/psp_v11_0.c: In function 'psp_v11_0_ring_stop': drivers/gpu/drm/amd/amdgpu/psp_v11_0.c:309:19: warning: variable 'ring' set but not used [-Wunused-but-set-variable] Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Suppress keypresses from ACPI_VIDEO eventsLyude Paul2018-10-101-5/+12
| | | | | | | | | | | | | | | | | Currently we return NOTIFY_DONE for any event which we don't think is ours. However, many laptops will send more then just an ATIF event and will also send an ACPI_VIDEO_NOTIFY_PROBE event as well. Since we don't check for this, we return NOTIFY_DONE which causes a keypress for the ACPI event to be propogated to userspace. This is the equivalent of someone pressing the display key on a laptop every time there's a hotplug event. So, check for ACPI_VIDEO_NOTIFY_PROBE events and suppress keypresses from them. Signed-off-by: Lyude Paul <lyude@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Remove the direct fw loading support for sdma2.4Rex Zhu2018-10-101-42/+0Star
| | | | | | | | | sdma2.4 is only for iceland. For Vi, we don't maintain the direct fw loading. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Remove wrong fw loading type warningRex Zhu2018-10-101-2/+0Star
| | | | | | | | | | Remove the warning message: "-1 is not supported on VI" the -1 is the default fw load type, mean auto. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Load fw between hw_init/resume_phase1 and phase2Rex Zhu2018-10-103-20/+60
| | | | | | | | | Extract the function of fw loading out of powerplay. Do fw loading between hw_init/resuem_phase1 and phase2 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: split ip hw_init into 2 phasesRex Zhu2018-10-101-13/+53
| | | | | | | | | | | We need to do some IPs earlier to deal with ordering issues similar to how resume is split into two phases. Will do fw loading via smu/psp between the two phases. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Remove amdgpu_ucode_fini_boRex Zhu2018-10-103-23/+1Star
| | | | | | | | The variable clean is unnecessary. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Split amdgpu_ucode_init/fini_bo into two functionsRex Zhu2018-10-103-29/+36
| | | | | | | | | | | | | | | | | | | 1. one is for create/free bo when init/fini 2. one is for fill the bo before fw loading the ucode bo only need to be created when load driver and free when driver unload. when resume/reset, driver only need to re-fill the bo if the bo is allocated in vram. Suggested by Christian. v2: Return error when bo create failed. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Check late_init status before set cg/pg stateRex Zhu2018-10-101-2/+2
| | | | | | | | Fix cg/pg unexpected set in hw init failed case. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Refine function amdgpu_device_ip_late_initRex Zhu2018-10-101-2/+2
| | | | | | | | | | 1. only call late_init when hw_init successful, so check status.hw instand of status.valid in late_init. 2. set status.late_initialized true if late_init was not implemented. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Change AI gfx/sdma/smu init sequenceRex Zhu2018-10-101-4/+4
| | | | | | | | initialize gfx/sdma before dpm features enabled. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Change SI/CI gfx/sdma/smu init sequenceRex Zhu2018-10-102-14/+16
| | | | | | | | initialize gfx/sdma before dpm features enabled. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Limit the max mc address to hole startEmily Deng2018-10-101-2/+4
| | | | | | | | | | | For the vram_start is 0 case, the gart range will be from 0x0000FFFF00000000 to 0x0000FFFF1FFFFFFF, which will cause the engine hang. So to avoid the hole, limit the max mc address to AMDGPU_GMC_HOLE_START.:wq Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix CPDMA hang in PRT modeTao Zhou2018-10-101-3/+12
| | | | | | | | | | | | Fix CPDMA hang in PRT mode, set CPF_INT_DMA in reg CP_MECx_F32_INT_DIS for Compute and set DISABLE_GFX_HALT_ON_UTCL1_ERROR in reg CP_DEBUG for GFX Affected ASICs: Vega10 Vega12 Raven Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Tested-by: Yukun.Li <yukun1.li@amd.com> Tested-by: Maciej.Jesionowski <maciej.jesionowski@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Change VI gfx/sdma/smu init sequenceRex Zhu2018-10-101-12/+12
| | | | | | | | initialize gfx/sdma before dpm features enabled. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add fw load in gfx_v8 and sdma_v3Rex Zhu2018-10-102-0/+19
| | | | | | | | gfx and sdma can be initialized before smu. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Don't reallocate ucode bo when suspendRex Zhu2018-10-101-1/+1
| | | | | | | | | driver don't release the ucode memory when suspend. so don't need to allocate bo when resume back. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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