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path: root/drivers/gpu/drm/i915/intel_drv.h
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* drm/i915: Share the common force-audio property between connectorsChris Wilson2011-06-041-0/+1
| | | | | | | | | Make the audio property creation routine common and share the single property between the connectors. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: split PCH clock gating initJesse Barnes2011-05-141-0/+2
| | | | | | | | | Ibex Peak and CougarPoint already require a different setting (added here), and future chips will likely follow that precedent. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Attach a fb to the load-detect pipeChris Wilson2011-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | We need to ensure that we feed valid memory into the display plane attached to the pipe when switching the pipe on. Otherwise, the display engine may read through an invalid PTE and so throw an PGTBL_ER exception. As we need to perform load detection before even the first object is allocated for the fbdev, there is no pre-existing object large enough for us to borrow to use as the framebuffer. So we need to create one and cleanup afterwards. At other times, the current fbcon may be large enough for us to borrow it for duration of load detection. Found by assert_fb_bound_for_plane(). Reported-by: Knut Petersen <Knut_Petersen@t-online.de> References: https://bugs.freedesktop.org/show_bug.cgi?id=36246 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Don't store temporary load-detect variables in the generic encoderChris Wilson2011-05-101-3/+7
| | | | | | | | | | | Keep all the state required for undoing and restoring the previous pipe configuration together in a single struct passed from intel_get_load_detect_pipe() to intel_release_load_detect_pipe() rather than stuffing them inside the common encoder structure. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Simplify return value from intel_get_load_detect_pipeChris Wilson2011-05-101-4/+4
| | | | | | | | | | ... and so remove the confusion as to whether to use the returned crtc or intel_encoder->base.crtc with the subsequent load-detection. Even though they were the same, the two instances of load-detection code disagreed over which was the more correct. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: restore only the mode of this driver on lastclose (v2)Dave Airlie2011-04-271-0/+1
| | | | | | | | | | | | | | | i915 calls the panic handler function on last close to reset the modes, however this is a really bad idea for multi-gpu machines, esp shareable gpus machines. So add a new entry point for the driver to just restore its own fbcon mode. v2: move code into fb helper, fix panic code to block mode change on powered off GPUs. [airlied: this hits drm core and I wrote it and it was reviewed on intel-gfx so really I signed it off twice ;-).] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/i915: Busy-spin wait_for condition in atomic contextsChris Wilson2011-03-311-1/+1
| | | | | | | | | | | | | During modesetting, we need to wait for the hardware to report readiness by polling the registers. Normally, we call msleep() between reads, because some state changes may take a whole vblank or more to complete. However during a panic, we are in an atomic context and cannot sleep. Instead, busy spin polling the termination condition. References: https://bugzilla.kernel.org/show_bug.cgi?id=31772 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Keith Packard <keithp@keithp.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Add support for limited color range of broadcast outputsChris Wilson2011-02-221-0/+2
| | | | | | | | | In order to prevent "crushed blacks" on TVs, the range of the RGB output may be limited to 16-235. This used to be available through Xorg under the "Broadcast RGB" option, so reintroduce support for KMS. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34543 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Use a device flag for non-interruptible phasesChris Wilson2011-02-221-2/+1Star
| | | | | | | | | | | The code paths for modesetting are growing in complexity as we may need to move the buffers around in order to fit the scanout in the aperture. Therefore we face a choice as to whether to thread the interruptible status through the entire pinning and unbinding code paths or to add a flag to the device when we may not be interrupted by a signal. This does the latter and so fixes a few instances of modesetting failures under stress. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2011-02-161-1/+0Star
|\ | | | | | | | | | | | | | | | | Grab the latest stabilisation bits from -fixes and some suspend and resume fixes from linus. Conflicts: drivers/gpu/drm/i915/i915_drv.h drivers/gpu/drm/i915/i915_irq.c
| * drm/i915: Disable RC6 on IronlakeChris Wilson2011-02-091-1/+0Star
| | | | | | | | | | | | | | | | | | | | The automatic powersaving feature is once again causing havoc, with 100% reliable hangs on boot and resume on affected machines. Reported-by: Francesco Allertsen <fallertsen@gmail.com> Reported-by: Gui Rui <chaos.proton@gmail.com> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=28582 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Move the lvds OpRegion lid detection code to panel and reuse for eDPChris Wilson2011-02-161-0/+1
| | | | | | | | | | | | | | Share the lid detection code for the all panels for consistent behaviour and a single place to add the eventual quirks for crap hardware. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Include TLB miss latency in g4x watermark computationsChris Wilson2011-01-191-0/+7
|/ | | | | | | Reports of FIFO underruns are still persisting on gm45. References: https://bugs.freedesktop.org/show_bug.cgi?id=27589 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/panel: Only record the backlight level when it is enabledChris Wilson2011-01-111-0/+3
| | | | | | | | | | | | | By tracking the current status of the backlight we can prevent recording the value of the current backlight when we have disabled it. And so prevent restoring it to 'off' after an unbalanced sequence of intel_lvds_disable/enable. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=22672 Tested-by: Alex Riesen <raa.lkml@gmail.com> Tested-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
* drm/i915: dynamic render p-state support for Sandy BridgeJesse Barnes2010-12-181-0/+2
| | | | | | | | | Add an interrupt handler for switching graphics frequencies and handling PM interrupts. This should allow for increased performance when busy and lower power consumption when idle. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Uncouple render/power ctx before suspendingChris Wilson2010-12-061-1/+2
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-12-031-1/+1
|\ | | | | | | | | Conflicts: drivers/gpu/drm/i915/intel_drv.h
| * drm/i915: Clear pfit registers when not used by any outputsChris Wilson2010-11-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | ... otherwise the panel-fitter may be left enabled with random settings and cause unintended filtering (i.e. blurring of native modes on external panels). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31942 Reported-and-tested-by: Ben Kohler <bkohler@gmail.com> Tested-by: Ciprian Docan <docan@eden.rutgers.edu> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Thread the pipelining ring through the callers.Chris Wilson2010-11-231-1/+1
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Use drm_i915_gem_object as the preferred typeChris Wilson2010-11-231-7/+8
|/ | | | | | | A glorified s/obj_priv/obj/ with a net reduction of over a 100 lines and many characters! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* i915: reprogram power monitoring registers on resumeKyle McMartin2010-11-031-0/+1
| | | | | | | | | | | Fixes issue where i915_gfx_val was reporting values several orders of magnitude higher than physically possible (without leaving scorch marks on my thighs at least.) Signed-off-by: Kyle McMartin <kyle@redhat.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* i915: enable AVI infoframe for intel_hdmi.c [v4]David Härdeman2010-10-221-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the sending of AVI infoframes in drivers/gpu/drm/i915/intel_hdmi.c. My receiver currently loses sync when the HDMI output on my computer (DG45FC motherboard) is switched from 800x600 (the BIOS resolution) to 1920x1080 as part of the boot. Fixable by switching inputs on the receiver a couple of times. With this patch, my receiver has not lost sync yet (> 40 tries). Fourth version, now based on drm-intel-next from: git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel.git Two questions still remain: I'm assuming that the sdvo hardware also stores a header ECC byte in the MSB of the first dword - is this correct? Does the SDVOB and SDVOC handling in intel_hdmi_set_avi_infoframe() look correct? Signed-off-by: David Härdeman <david@hardeman.nu> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: remove broken intel_pch_has_edp functionJesse Barnes2010-10-081-1/+0Star
| | | | | | | | | Since we set the output type of PCH attached eDP panels to INTEL_OUTPUT_eDP this function would never return true when it should. It's been replaced by working functions. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: add eDP checking functions for the display codeJesse Barnes2010-10-081-0/+1
| | | | | | | | The display code needs to distinguish between CPU and PCH attached eDP panels, so add some helpers to handle that. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-10-031-1/+1
|\ | | | | | | | | | | | | Conflicts: drivers/gpu/drm/i915/i915_gem_evict.c drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_dp.c
| * drm/i915: Use pipe state to tell when pipe is offKeith Packard2010-10-031-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | Instead of waiting for the display line value to settle, we can simply wait for the pipe configuration register 'state' bit to turn off. Contrarywise, disabling the plane will not cause the display line value to stop changing, so instead we wait for the vblank interrupt bit to get set. And, we only do this when we're not about to wait for the pipe to turn off. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: use GMBUS to manage i2c linksChris Wilson2010-09-181-18/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the GMBUS interface rather than direct bit banging to grab the EDID over DDC (and for other forms of auxiliary communication with external display controllers). The hope is that this method will be much faster and more reliable than bit banging for fetching EDIDs from buggy monitors or through switches, though we still preserve the bit banging as a fallback in case GMBUS fails. Based on an original patch by Jesse Barnes. Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915/i2c: Track the parent encoder rather than just the devChris Wilson2010-09-141-2/+3
| | | | | | | | | | | | | | | | The SDVO proxy i2c adapter wants to be able to use information stored in the encoder, so pass that through intel_i2c rather than iterate over all known encoders every time. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Push pipelining of display plane flushes to the callerChris Wilson2010-09-141-1/+2
| | | | | | | | | | | | | | This ensures that we do wait upon the flushes to complete if necessary and avoid the visual tears, whilst enabling pipelined page-flips. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Fix an overlay regression from 7e7d76cChris Wilson2010-09-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | When separating out the prepare/commit into its own separate functions we overlooked that the intel_crtc->dpms_mode was being used elsewhere to check on the actual status of the pipe. Track that bit of logic separately from the actual dpms mode, so there is no confusion should we be able to handle multiple dpms modes, nor any semantic conflict between prepare/commit and dpms. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Share crtc setup and teardown between dpms and disable/enableChris Wilson2010-09-131-1/+1
| | | | | | | | | | | | | | | | | | This closes a couple of corner cases where we introduced and forgot about a couple of routines that need to be called when disabling the crtc and then re-enabling it. The code needs to be moved again so that the common bits are shared across generations. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915/lvds: Ensure panel is unlocked for Ironlake or the panel fitterChris Wilson2010-09-131-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 77d07fd9d73ef28689737c0952dbd5d6a5017743 introduced a regression where by not waiting for the panel to be turned off, left the panel and PLL registers locked across the modeset. Thus the panel remaining blank. As pointed out by Daniel Vetter, when testing LVDS it helps to open the laptop and look at the actual panel you are purporting to test. A second issue with the patch was that in order to modify the panel fitter before gen5, the pipe and the panel must have be completely powered down. So we wait. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Use msleep instead of mdelay during wait_vblank_offChris Wilson2010-09-121-0/+7
| | | | | | | | | | | | | | Avoid a potentially long busy-wait if we not in the process of atomically switching to the kdb console. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Use the real FDI frequency for determining b/wChris Wilson2010-09-111-0/+3
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Make the connector->encoder relationship explicitChris Wilson2010-09-091-1/+9
| | | | | | | | | | | | | | | | | | Currently we have a exact mapping of a connector onto an encoder for its whole lifetime. Make this an explicit property of the structure and so simplify the code. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | drm/i915: Use the direct mapping of pipe->crtcChris Wilson2010-09-091-1/+7
| | | | | | | | | | | | | | | | Why iterate all the crtcs to find the pipe, when we already know which crtc is attached to which pipe? Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | drm/i915: Rename intel_encoder->enc to base for consistencyChris Wilson2010-09-091-2/+2
| | | | | | | | | | | | | | | | [Patch is slightly larger than is strictly necessary to fixup surrounding checkpatch.pl errors.] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | drm/i915: Show framebuffer info in debugfsChris Wilson2010-09-081-1/+7
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Refactor panel backlight controlsChris Wilson2010-09-081-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were two instances of code to control the panel backlight and neither handled the complete set of device variations. Fixes: Bug 29716 - [GM965] Regression: Backlight resets to minimum when changing resolution https://bugs.freedesktop.org/show_bug.cgi?id=29716 And a bug on one of my PineView boxes which overflowed the backlight value. Incorporates part of a similar patch by Matthew Garrett that exposes a native Intel backlight controller. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915/overlay: Make the overlay control struct opaque.Chris Wilson2010-09-081-24/+0Star
| | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/overlay: Pass interruptible to switch_off()Chris Wilson2010-09-081-3/+2Star
| | | | | | | | | | | | | | | | | | During DPMS we currently do not want the overlay code to be interruptible, so pass that information down and only take the uninterrruptible paths. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/overlay: Combine SWITCH_OFF into a single stepChris Wilson2010-09-081-2/+1Star
| | | | | | | | | | | | | | | | | | We can program the h/w to first wait on the flip and then switch off without relying on s/w intervention. This removes the need for a double step switch off, bringing much rejoicing. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/overlay: Explicitly pass regs from map to unmapChris Wilson2010-09-081-1/+0Star
| | | | | | | | | | | | | | The scoping of the validity of the mapping is thus clarified. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/overlay: WhitespaceChris Wilson2010-09-081-1/+1
| | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/sdvo: Preserve pixel-multiplierChris Wilson2010-09-081-0/+18
| | | | | | | | | | | | | | Store the pixel-multiplier on the adjusted mode and avoid modifying the requested mode. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Avoid using msleep under kdb and wait_for()Chris Wilson2010-09-081-1/+1
| | | | | | | | | | | | | | | | | | wait_for() uses msleep() to yield the cpu whilst spinning waiting for a register to change. kdb asserts that mode changes are atomic and so prohibits msleep. The alternative would be to use mdelay or to simply probe the register more often instead of busy waiting. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Drop the msleep parameter to wait_for()Chris Wilson2010-09-081-1/+4
|/ | | | | | | | | | | | Jesse's feedback from using the wait_for() macro was that the msleep argument was that it was superfluous and made the macro more difficult to use and to read. As the actually amount of time to sleep is not critical, the crucial part is to sleep and let the processor schedule something else whilst we wait for the event, replace the argument with a hardcoded value. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Avoid pageflipping freeze when we miss the flip prepare interruptSimon Farnsworth2010-09-071-0/+10
| | | | | | | | | | | | | | | | When we miss the flip prepare interrupt, we never get into the software state needed to restart userspace, resulting in a freeze of a full-screen OpenGL application (such as a compositor). Work around this by checking DSPxSURF/DSPxBASE to see if the page flip has actually happened. If it has, do the work we would have done when the flip prepare interrupt comes in. Also, add debugfs information to tell us what's going on (based on the patch from Chris Wilson attached to bugs.fdo bug #29798). Signed-off-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: wait for actual vblank, not just 20msJesse Barnes2010-08-221-1/+2
| | | | | | | | | | | | | | Waiting for a hard coded 20ms isn't always enough to make sure a vblank period has actually occurred, so add code to make sure we really have passed through a vblank period (or that the pipe is off when disabling). This prevents problems with mode setting and link training, and seems to fix a bug like https://bugs.freedesktop.org/show_bug.cgi?id=29278, but on an HP 8440p instead. Hopefully also fixes https://bugs.freedesktop.org/show_bug.cgi?id=29141. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Only update i845/i865 CURBASE when disabled (v2)Chris Wilson2010-08-091-1/+1
| | | | | | | | | | | | | The i845 and i865 have a peculiarlity in that CURBASE is not the trigger for the vsync update of the cursor registers but instead the modification of that register is prohibited whilst the cursor is enabled. Reorder the write sequence for CURPOS, CURCNTR and CURBASE on i845 to i865 to match. v2: Remove the checks for i845/i865 from within i9xx_cursor_update() Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
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