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| * drm/nvd0/disp: do modeset irq handling from taskletBen Skeggs2011-09-201-7/+22
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: untested LVDS supportBen Skeggs2011-09-201-16/+66
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: track down fb positioning methodBen Skeggs2011-09-201-2/+2
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: determine U table config in or_mode_set()Ben Skeggs2011-09-201-21/+15Star
| | | | | | | | | | | | | | Takes a gamble and presumes that we can safely store something random in OR_MODE_CTRL+4, the hw doesn't seem to mind... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: dac load detectBen Skeggs2011-09-201-1/+16
| | | | | | | | | | | | | | | | VBIOS does more than this, as does nv50/nvc0 driver in nouveau. Traces of the NVIDIA binary driver however, show pretty much just this being done... Seems to work for me, it'll be fine for the moment. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: handle sync polarity, kill off some unknownBen Skeggs2011-09-201-6/+10
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: scalingBen Skeggs2011-09-201-5/+32
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: push the update button in mode_set_base()Ben Skeggs2011-09-201-0/+4
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: fixup clut so it actually worksBen Skeggs2011-09-201-4/+6
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: initial attempt at modeset irq handlingBen Skeggs2011-09-201-0/+130
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: stub dac load detect, prevents oopsBen Skeggs2011-09-201-0/+7
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: dac encoder moduleBen Skeggs2011-09-201-0/+137
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: extend the init voodoo to cover crtcsBen Skeggs2011-09-201-19/+27
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: remove lp reordering from vram dmaobj, create fb dmaobjsBen Skeggs2011-09-201-5/+22
| | | | | | | | | | | | Fixes CLUT being messed up. Mostly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: some magic to make evo happeirBen Skeggs2011-09-201-0/+12
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: they moved the linear flag..Ben Skeggs2011-09-201-3/+6
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: initial crtc object implementationBen Skeggs2011-09-201-1/+456
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: skeletal handling of modeset interruptsBen Skeggs2011-09-201-0/+60
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: start on SOR encoder functionsBen Skeggs2011-09-201-1/+202
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: setup a couple of dma objects we'll needBen Skeggs2011-09-201-2/+41
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: start on interrupt handlingBen Skeggs2011-09-201-0/+42
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: whip up some basic dma handling for the evo channelsBen Skeggs2011-09-201-3/+65
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/disp: very initial evo setupBen Skeggs2011-09-204-3/+179
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/bios: allow passing in crtc to the init table parserBen Skeggs2011-09-206-36/+41
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/pm: enable clock/voltage hooksBen Skeggs2011-09-201-0/+3
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/bios: fix INIT_GPIO for new chipsetsBen Skeggs2011-09-201-22/+51
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/gpio: initial implementationBen Skeggs2011-09-204-4/+48
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0/i2c: initial implementationBen Skeggs2011-09-201-16/+35
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: initial chipset description for nvdX chipsetsBen Skeggs2011-09-201-2/+46
| | | | | | | | | | | | | | All the non-stubbed functions should be okay for this chipset, the rest will be added back as they're figured out. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: allow modeset module option to select 'headless mode'Ben Skeggs2011-09-203-1/+11
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: fixup init/fini sequence to deal with no CRTCsBen Skeggs2011-09-202-38/+30Star
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: make general drm modesetting init commonBen Skeggs2011-09-208-67/+32Star
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvd0: add a card_type for 0xdX chipsetsBen Skeggs2011-09-204-3/+4
| | | | | | | | | | | | | | These are different enough from 0xcX to justify it, half fermi, half kepler(??).. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nv04/pm: recalibrate timer on nvclk changesMartin Peres2011-09-201-0/+4
| | | | | | | | | | Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau/tmr: calibrate for ns timestamps on initBen Skeggs2011-09-201-26/+82
| | | | | | | | | | | | | | | | | | | | | | We previously assumed (incorrectly a lot of the time) that PTIMER would be programmed at a frequency which'd give its 64-bit timestamps in nanoseconds. By programming PTIMER ourselves, we avoid this problem. Reviewed-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/gr: unblacklist nvcf accelerationBen Skeggs2011-09-201-1/+0Star
| | | | | | | | | | | | Reported to be working. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: don't complain for disabled timingset entriesBen Skeggs2011-09-201-1/+2
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/gr: copy GPC mpart config from PFFBBen Skeggs2011-09-201-1/+1
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/vram: support non-uniform memory size per controllerBen Skeggs2011-09-201-5/+43
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/gr: add support for nvcf chipsetBen Skeggs2011-09-208-24/+44
| | | | | | | | | | | | untested, written from a trace, accel disabled by default until it is Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: allow a nouveau_mm to be created with holesBen Skeggs2011-09-202-20/+28
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: embed nouveau_mmBen Skeggs2011-09-207-61/+51Star
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nv31/mpeg: support for a single class3174 userBen Skeggs2011-09-202-4/+40
| | | | | | | | | | | | | | Uncertain if/how the hw does multiple PMPEG channels, supporting one is better than none however. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: rename nv40_mpeg to nv31_mpegBen Skeggs2011-09-204-29/+29
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/pm: more complete parsing of clock domainsBen Skeggs2011-09-204-19/+31
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nvc0/pm: initial implementation of clocks_get()Ben Skeggs2011-09-204-1/+150
| | | | | | | | | | | | | | Not too certain on memory clock yet, but it gets the right numbers for each perflvl on my NVC0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nva3/pm: idle graphics engine before changing clocksBen Skeggs2011-09-201-0/+40
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nouveau: add function to wait until a callback returns trueBen Skeggs2011-09-202-0/+21
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nv50/gr: insert set/clr of a ctxprog flag at start/end of ctxprogBen Skeggs2011-09-201-0/+6
| | | | | | | | | | | | | | The set will be replaced with a wait on the same flag by a subsequent commit in order to halt a ctxprog's execution temporarily. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * drm/nva3/pm: tidy and add some comments here and thereBen Skeggs2011-09-201-47/+78
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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