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* drm/amdgpu: Move VBIOS version to sysfsKent Russell2017-08-291-31/+23Star
| | | | | | | | sysfs is more stable, and doesn't require root to access Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add debugfs file for VBIOS and versionKent Russell2017-08-293-1/+67
| | | | | | | | | | | | | | | | | | | Add 2 debugfs files, one that contains the VBIOS version, and one that contains the VBIOS itself. These won't change after initialization, so we can add the VBIOS version when we parse the atombios information. This ensures that we can find out the VBIOS version, even when the dmesg buffer fills up, and makes it easier to associate which VBIOS version is for which GPU on mGPU configurations. Set the size to 20 characters in case of some weird VBIOS version that exceeds the expected 17 character format (3-8-3\0). The VBIOS dump also allows for easy debugging v2: Move to debugfs, clarify commit message, add VBIOS dump file Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: use new TTM populate/dma map helper functionsTom St Denis2017-08-291-31/+2Star
| | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Use new TTM populate/map helper functionTom St Denis2017-08-291-31/+2Star
| | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/ttm: Add helper functions to populate/map in one call (v2)Tom St Denis2017-08-291-0/+41
| | | | | | | | | | | | These functions replace a section of common code found in radeon/amdgpu drivers (and possibly others) as part of the ttm_tt_*populate() callbacks. v2: squash in fix for sw iommu from Tom Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include: Add hdmi_redriver_set to atomfirmwareHarry Wentland2017-08-291-1/+18
| | | | | | | | We'll need this for a some upcoming display changes Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Remove AMDGPU tracepoint and use new TTM tracepoint (v2)Tom St Denis2017-08-292-74/+3Star
| | | | | | | | | | | | Switches the AMDGPU driver over to the TTM tracepoint and removes our old one. Now you can enable traces before loading the module and trace all mappings. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (v2): Use struct device instead of pci in trace.
* drm/ttm: Add DMA map/unmap tracepoint (v3)Tom St Denis2017-08-294-1/+208
| | | | | | | | | | | | | | | Also exports two functions that vendor drivers can call to trace DMA mappings. This is meant to help translate IOMMU mappings of bus addresses back to physical pages. Used by the umr amdgpu debugger for instance. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (v2): Use dev_name() to get PCI path instead. (v3): Use correct types for dma/phys addresses
* drm/amdgpu: support polaris10/11/12 new cp firmwaresEvan Quan2017-08-291-10/+55
| | | | | | | | | | | | Newer versions of the CP firmware require changes in how the driver initializes the hw block. Change the firmware name for new firmware to maintain compatibility with older kernels. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove duplicate return statementColin Ian King2017-08-291-1/+0Star
| | | | | | | | | | Remove a redundant identical return statement, it has no use. Detected by CoverityScan, CID#1454586 ("Structurally dead code") Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: check memory allocation failureChristophe JAILLET2017-08-291-0/+3
| | | | | | | | | | | | | | | | | Check memory allocation failure and return -ENOMEM in such a case. 'num_post_dep_syncobjs' still has to be set to 0 before the test in order to have it initialized if 'amdgpu_cs_parser_fini()' is called to free resources. The calling graph would be, in such a case! failure in amdgpu_cs_process_syncobj_out_dep() ---> error code returned by amdgpu_cs_dependencies() --> amdgpu_cs_parser_fini() is called Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: fix BANK_SELECT on Vega10 (v2)Roger He2017-08-292-6/+4Star
| | | | | | | | | | | BANK_SELECT should always be FRAGMENT_SIZE + 3 due to 8-entry (2^3) per cache line in L2 TLB for Vega10. v2: agd: fix warning Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: inline amdgpu_ttm_do_bind againChristian König2017-08-291-27/+18Star
| | | | | | | | | The function is called only once and doesn't do anything special. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix amdgpu_ttm_bindChristian König2017-08-293-19/+30
| | | | | | | | | | Use ttm_bo_mem_space instead of manually allocating GART space. This allows us to evict BOs when there isn't enought GART space any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove the GART copy hackChristian König2017-08-291-17/+5Star
| | | | | | | | | This isn't used since we don't map evicted BOs to GART any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/ttm:fix wrong decoding of bo_countMonk Liu2017-08-291-2/+2
| | | | | | | | | | | | | we observe abnormal number from: /sys/devices/virtual/drm/amdttm/buffer_objects/bo_count bo_count is atomic_inc which is "int" type, shouldn't explicitly turn it to unsigned long. Signed-off-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/ttm: fix missing inc bo_countMonk Liu2017-08-291-0/+1
| | | | | | Signed-off-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: set sched_hw_submission higher for KIQ (v3)Alex Deucher2017-08-291-4/+12
| | | | | | | | | | | | | | | | | | KIQ doesn't really use the GPU scheduler. The base drivers generally use the KIQ ring directly rather than submitting IBs. However, amdgpu_sched_hw_submission (which defaults to 2) limits the number of outstanding fences to 2. KFD uses the KIQ for TLB flushes and the 2 fence limit hurts performance when there are several KFD processes running. v2: move some expressions to one line change KIQ sched_hw_submission to at least 16 v3: bump to 256 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move default gart size setting into gmc modulesAlex Deucher2017-08-296-57/+74
| | | | | | | | Move the asic specific code into the IP modules. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: refine default gart sizeAlex Deucher2017-08-292-7/+33
| | | | | | | | | | Be more explicit and add comments explaining each case. Also s/gart/GART/ in the parameter string as per Felix' suggestion. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: ACG frequency added in PPTableEvan Quan2017-08-292-5/+12
| | | | | | Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: discard commands of killed processesChristian König2017-08-291-4/+19
| | | | | | | | | | When a process is killed we shouldn't submit all waiting jobs, but instead clean up as fast as possible. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix and cleanup shadow handlingChristian König2017-08-293-37/+23Star
| | | | | | | | | | | | | | Set the shadow flag on the shadow and not the parent, always bind shadow BOs during allocation instead of manually, use the reservation_object wrappers to grab the lock. This fixes a couple of issues with binding the shadow BOs as well as correctly evicting them when memory becomes tight. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add automatic per asic settings for gart_sizeAlex Deucher2017-08-294-6/+20
| | | | | | | | | | We need a larger gart for asics that do not support GPUVM on all engines (e.g., MM) to make sure we have enough space for all gtt buffers in physical mode. Change the default size based on the asic type. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/gfx8: fix spelling typo in mqd allocationAlex Deucher2017-08-292-8/+8
| | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: unhalt mec after loadingEvan Quan2017-08-291-1/+2
| | | | | | Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/virtual_dce: Virtual display doesn't support disable vblank ↵Emily Deng2017-08-291-2/+3
| | | | | | | | | | | | | immediately For virtual display, it uses software timer to emulate the vsync interrupt, it doesn't have high precision, so doesn't support disable vblank immediately. BUG: SWDEV-129274 Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix huge page updates with CPUFelix Kuehling2017-08-291-1/+15
| | | | | | | | | | | | Correctly detect system memory mappings when using CPU and don't use huge pages for them. Avoid incorrectly translating a physical page table GPU address when splitting a huge page while mapping system memory. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-vmwgfx-next' of ↵Dave Airlie2017-08-298-158/+503
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~syeh/repos_linux into drm-next vmwgfx add fence fd support. * 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux: drm/vmwgfx: Bump the version for fence FD support drm/vmwgfx: Add export fence to file descriptor support drm/vmwgfx: Add support for imported Fence File Descriptor drm/vmwgfx: Prepare to support fence fd drm/vmwgfx: Fix incorrect command header offset at restart drm/vmwgfx: Support the NOP_ERROR command drm/vmwgfx: Restart command buffers after errors drm/vmwgfx: Move irq bottom half processing to threads drm/vmwgfx: Don't use drm_irq_[un]install
| * drm/vmwgfx: Bump the version for fence FD supportSinclair Yeh2017-08-281-2/+2
| | | | | | | | | | | | | | | | Minor version bump to indicate support for fence FD Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| * drm/vmwgfx: Add export fence to file descriptor supportSinclair Yeh2017-08-284-11/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | Added code to link a fence to a out_fence_fd file descriptor and thread out_fence_fd down to vmw_execbuf_copy_fence_user() so it can be copied into the IOCTL reply and be passed back up the the user. v2: Make sure to sync and clean up in case of failure Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| * drm/vmwgfx: Add support for imported Fence File DescriptorSinclair Yeh2017-08-283-2/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows vmwgfx to wait on a fence created by another device. v2: * Remove special handling for vmwgfx fence and just use dma_fence_wait() * Use interruptible waits * Added function documentation Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| * drm/vmwgfx: Prepare to support fence fdSinclair Yeh2017-08-281-5/+0Star
| | | | | | | | | | | | | | | | Make the fields and flags available. Signed-off-by: Sinclair Yeh <syeh@vmware.com> Reviewed-by: Deepak Singh Rawat <drawat@vmware.com> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
| * drm/vmwgfx: Fix incorrect command header offset at restartThomas Hellstrom2017-08-281-0/+1
| | | | | | | | | | | | | | | | Sometimes it appears like the device modifies the command header offset member. So explicitly clear it when restarting after an error. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| * drm/vmwgfx: Support the NOP_ERROR commandThomas Hellstrom2017-08-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Can be used by user-space applications to test and verify the kernel command buffer error recovery functionality. Malicious user-space apps could potentially use this command to slow down graphics processing somewhat, but they could also accomplish the same thing using a random malformed command so this should be considered safe. At least as safe as it gets. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| * drm/vmwgfx: Restart command buffers after errorsThomas Hellstrom2017-08-283-27/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we skipped the command buffer and added an extra fence to avoid hangs due to skipped fence commands. Now we instead restart the command buffer after the failing command, if there are any commands left. In addition we print out some information about the failing command and its location in the command buffer. Testing Done: ran glxgears using mesa modified to send the NOP_ERROR command before each 10th clear and verified that we detected the device error properly and that there were no other device errors caused by incorrectly ordered command buffers. Also ran the piglit "quick" test suite which generates a couple of device errors and verified that they were handled as intended. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| * drm/vmwgfx: Move irq bottom half processing to threadsThomas Hellstrom2017-08-284-91/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | This gets rid of the irq bottom half tasklets and instead performs the work needed in process context. We also convert irq-disabling spinlocks to ordinary spinlocks. This should decrease system latency for other system components, like sound for example but has the potential to increase latency for processes that wait on the GPU. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
| * drm/vmwgfx: Don't use drm_irq_[un]installThomas Hellstrom2017-08-283-21/+40
| | | | | | | | | | | | | | | | We're not allowed to change the upstream version of the drm_irq_install function to be able to incorporate threaded irqs. So roll our own irq install- and uninstall functions instead of relying on the drm core ones. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
* | Merge tag 'exynos-drm-next-for-v4.14' of ↵Dave Airlie2017-08-2916-309/+299Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Summary: - Provide NV12MT pixel format support of Mixer driver in generic way. - Refactor Exynos KMS drivers . Refactoring to panel detection way . Refactoring to setting up possible_crtcs . Refactoring to video and command mode support - Some cleanups * tag 'exynos-drm-next-for-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: simplify set_pixfmt() in DECON and FIMD drivers drm/exynos: consistent use of cpp drm/exynos: mixer: remove src offset from mixer_graph_buffer() drm/exynos: mixer: simplify mixer_graph_buffer() drm/exynos: mixer: simplify vp_video_buffer() drm/exynos: mixer: enable NV12MT support for the video plane drm/exynos: mixer: fix chroma comment in vp_video_buffer() arm64: dts: exynos: remove i80-if-timings nodes dt-bindings: exynos5433-decon: remove i80-if-timings property drm/exynos/decon5433: use mode info stored in CRTC to detect i80 mode drm/exynos: add mode_valid callback to exynos_drm drm/exynos/decon5433: refactor irq requesting code drm/exynos/mic: use mode info stored in CRTC to detect i80 mode drm/exynos/dsi: propagate info about command mode from panel drm/exynos/dsi: refactor panel detection logic drm/exynos: use helper to set possible crtcs drm/exynos/decon5433: use readl_poll_timeout helpers
| * | drm/exynos: simplify set_pixfmt() in DECON and FIMD driversTobias Jakobi2017-08-253-16/+3Star
| | | | | | | | | | | | | | | | | | | | | DRM core already checks the validity of the pixelformat. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos: consistent use of cppTobias Jakobi2017-08-253-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent commit (272725c7db4da1fd3229d944fc76d2e98e3a144e) has removed the use of 'bits_per_pixel' in DRM. However the corresponding Exynos driver code still uses the ambiguous 'bpp', even though it is now initialized from fb->cpp[0]. Consistenly use 'cpp' in FIMD, DECON7 and DECON5433 drivers. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
| * | drm/exynos: mixer: remove src offset from mixer_graph_buffer()Tobias Jakobi2017-08-251-9/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always translate the dma address such that the offsets of the source image are zero. Hence we can remove manipulation of the MXR_GRAPHIC_SXY(win) register and just zero them once in mixer_win_reset(). Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos: mixer: simplify mixer_graph_buffer()Tobias Jakobi2017-08-251-4/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DRM core already checks in drm_atomic_plane_check() if the pixelformat is valid. Hence we can collapse the default case of the switch statement with the XRGB8888 case. No functional change. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos: mixer: simplify vp_video_buffer()Tobias Jakobi2017-08-251-20/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DRM core already checks in drm_atomic_plane_check() if the pixelformat is valid. Hence we can drop the default case of the switch statement and collapse most of the code. Also rename the two booleans to reflect what true/false actually means, and to avoid mixing CrCb/NV21 descriptions. No functional change. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos: mixer: enable NV12MT support for the video planeTobias Jakobi2017-08-254-1/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The video processor supports a tiled version of the NV12 format, known as NV12MT in V4L2 terms. The support was removed in commit 083500baefd5f4c215a5a93aef2492c1aa775828 due to not being a real pixel format, but rather NV12 with a special memory layout. With the introduction of FB modifiers, we can now properly support this format again. Tested with a hacked up modetest from libdrm's test suite on an ODROID-X2 (Exynos4412). Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos: mixer: fix chroma comment in vp_video_buffer()Tobias Jakobi2017-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current comment sounds like the division op is done to compensate for some hardware erratum. But the chroma plane having half the height of the luma plane is just the way NV12/NV21 is defined, so clarify this behaviour. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos/decon5433: use mode info stored in CRTC to detect i80 modeAndrzej Hajda2017-08-251-15/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since panel's mode of work is propagated properly from panel to DECON, there is no need to use redundant private device tree property. The only issue with such approach is that check for required interrupts should be postponed until panel communicate its requirements, ie to mode validation phase - mode_valid callback. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
| * | drm/exynos: add mode_valid callback to exynos_drmAndrzej Hajda2017-08-252-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | crtc::mode_valid callback is required to implement proper pipeline validation for command/video modes. Since Exynos uses private framework such callback should be added to it. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos/decon5433: refactor irq requesting codeAndrzej Hajda2017-08-251-24/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow runtime validation of mode of work irq request code should be split into two separate phases: - irq reqesting, - irq checking. Following patches will move 2nd phase to mode validation phase. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/exynos/mic: use mode info stored in CRTC to detect i80 modeAndrzej Hajda2017-08-251-40/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | MIC driver should use info from CRTC to check mode of work instead of illegally peeking into nodes of other devices. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-05-20 02:18:38 +0200