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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* i2c: mediatek: Add i2c support for MediaTek MT8183Qii Wang2019-04-151-2/+60
| | | | | | | | | | | Add i2c compatible for MT8183. Compare to MT2712 i2c controller, MT8183 has different register offsets. Ltiming_reg is added to adjust low width of SCL. Arb clock and dma_sync are needed. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Add i2c and apdma sync in i2c driverQii Wang2019-04-151-0/+11
| | | | | | | | | | When i2c and apdma use different source clocks, we should enable synchronization between them. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Add arb clock in i2c driverQii Wang2019-04-151-3/+22
| | | | | | | | | | | | | When two i2c controllers are internally connected to the same GPIO pins, the arb clock is needed to ensure that the waveforms do not interfere with each other. And we also need to enable the interrupt to find arb lost, old i2c controllers also have the bit. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Add offsets array for new i2c registersQii Wang2019-04-151-59/+104
| | | | | | | | | New i2c registers would have different offsets, so we use different offsets array to distinguish different i2c registers version. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: modify threshold passed to i2c_get_dma_safe_msg_buf()Hsin-Yi Wang2019-03-121-4/+4
| | | | | | | | | | DMA with zero-length transfers doesn't make sense and this HW doesn't support them at all, so increase the threshold. Fixes: fc66b39fe36a ("i2c: mediatek: Use DMA safe buffers for i2c transactions") Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> [wsa: reworded commit message] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: remove completion_done()qii wang2019-02-051-2/+0Star
| | | | | | | | Completion_done() is useless when we don't use its return value, so we remove it. Signed-off-by: qii wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: speeds is replaced by macros definitionsqii wang2019-02-051-2/+2
| | | | | | | | | Different speeds have been defined by macros, so we use macros definitions. Signed-off-by: qii wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Use DMA safe buffers for i2c transactionsJun Gao2018-09-061-7/+55
| | | | | | | | DMA mode will always be used in i2c transactions, try to allocate a DMA safe buffer if the buf of struct i2c_msg used is not DMA safe. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: use of_device_get_match_data()Ryder Lee2018-04-301-6/+2Star
| | | | | | | | | | The usage of of_device_get_match_data() reduce the code size a bit. Also, the only way to call mtk_i2c_probe() is to match an entry in mtk_i2c_of_match[], so of_id cannot be NULL. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Enable i2c module clock before i2c registers access.Jun Gao2018-01-041-0/+9
| | | | | | | | Make sure i2c module clock has been enabled before i2c registers access. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Add i2c compatible for MediaTek MT2712Jun Gao2018-01-041-4/+27
| | | | | | | | | Add i2c compatible for MT2712. Compare to MT8173 i2c controller, internal divider of i2c source clock need to be configured for MT2712 i2c speed calculation. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Add i2c compatible for MediaTek MT7622Jun Gao2017-08-271-0/+14
| | | | | | | | | | Add i2c compatible for MT7622. Compare to MT8173 i2c controller, MT7622 limits message numbers to 255, and does not support 4GB DMA mode. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: send i2c master code at 400kJun Gao2017-07-311-19/+46
| | | | | | | | | | | | The speed of sending i2c master code in high-speed mode depends on source clock, clock-div and TIMING register. The source clock and clock-div of different SoC are not all the same. In order to send i2c master code at 400k in high-speed mode, a appropriate value should be set to TIMING register for a certain source clock and clock-div. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: m65xx: drop superfluous quirk structureWolfram Sang2017-03-081-9/+0Star
| | | | | | | | All length fields in Linux I2C are u16, so a HW length limitation of 16 bit lengths is not a limitation. Remove the quirk structure. Tested-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: don't print error when adding adapter failsWolfram Sang2016-08-221-3/+1Star
| | | | | | | | | | | | | | | | | The core will do this for us now. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Peter Korsgaard <peter@korsgaard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Horman <nhorman@tuxdriver.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mt65xx: use new 8 bit address helper functionWolfram Sang2016-04-111-4/+1Star
| | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mt65xx: add 4GB DMA mode support in i2c driverLiguo Zhang2016-02-121-0/+42
| | | | | | | | | | | If 4GB mode is enabled, we should add 4GB DMA mode support in i2c driver. Set 4GB mode register to support 4GB mode. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> [wsa: updated commit message] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: fix i2c multi transfer issue in high speed modeLiguo Zhang2016-01-031-2/+19
| | | | | | | | | | For mt8173 platform with auto restart support, when doing i2c multi transfer in high speed, we should ignore the first restart irq after the master code, otherwise the first transfer will be discarded. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: add i2c first write then read optimizationLiguo Zhang2015-12-011-6/+27
| | | | | | | | | | | | For platform with auto restart support, between every transfer, i2c controller will trigger an interrupt and SW need to handle it to start new transfer. When doing write-then-read transfer, instead of restart mechanism, using WRRD mode to have controller send both transfer in one request to reduce latency. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: add i2c resume supportLiguo Zhang2015-10-231-0/+16
| | | | | | | | | mt65xx i2c controller initial setting will be cleared after system suspend, so we should init mt65xx i2c controller again when system resume. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Fixup i2c ack error interrupt handlingEddie Huang2015-08-111-4/+11
| | | | | | | | | | | | When occur i2c ack error, i2c controller generate two interrupts, first is the ack error interrupt, then the complete interrupt. i2c interrupt handler should keep the two interrupt value, and only call complete() for the complete interrupt. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: mediatek: Reset DMA engine in hardware init functionEddie Huang2015-08-111-0/+6
| | | | | | | | | | Reset DMA in hardware init function to avoid unknown hardware state before do any I2C operation. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* I2C: mediatek: Add driver for MediaTek MT8173 I2C controllerEddie Huang2015-06-011-29/+74
| | | | | | | | | | | | Add mediatek MT8173 I2C controller driver. Compare to I2C controller of earlier mediatek SoC, MT8173 fix write-then-read limitation, and also increase message size to 64kb. Signed-off-by: Xudong Chen <xudong.chen@mediatek.com> Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* I2C: mediatek: Add driver for MediaTek I2C controllerXudong Chen2015-06-011-0/+686
The mediatek SoCs have I2C controller that handle I2C transfer. This patch include common I2C bus driver. This driver is compatible with I2C controller on mt65xx/mt81xx. Signed-off-by: Xudong Chen <xudong.chen@mediatek.com> Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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