summaryrefslogtreecommitdiffstats
path: root/drivers/iommu
Commit message (Collapse)AuthorAgeFilesLines
...
| * | | | iommu/amd: Drop oprofile dependencyBorislav Petkov2014-07-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a40d4c67d7de ("iommu/amd: Implement mmu_notifier_release call-back") removed the oprofile task_exit notifier hack^Wusage but forgot to readjust the Kconfig dependency. Fix that. Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | | iommu/amd: Moving PPR fault flags macros definitionsAlexey Skidanov2014-07-091-6/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Any kernel source registering the invalid PPR calback may include the header file with PPR fault flags macros definitions. Thus we move them to include/linux/amd-iommu.h Signed-off-by: Alexey Skidanov <Alexey.Skidanov@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@amd.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | | iommu/amd: Fix for pasid initializationAlexey Skidanov2014-07-091-0/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pasid wasn't properly initialized before caling to invalid PPR calback Signed-off-by: Alexey Skidanov <Alexey.Skidanov@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@amd.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Fix race setting IRQ CPU affinity while freeing IRQGreg Edwards2014-07-311-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A user process setting the CPU affinity of an IRQ for a KVM direct-assigned device via /proc/irq/<IRQ#>/smp_affinity can race with the IRQ being released by QEMU, resulting in a NULL iommu pointer dereference in get_irte(), causing this crash: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff8190a652>] intel_ioapic_set_affinity+0x82/0x1b0 PGD 99172e067 PUD 1026979067 PMD 0 Oops: 0000 [#1] SMP Modules linked in: CPU: 1 PID: 3354 Comm: affin Not tainted 3.16.0-rc7-00007-g31dab71 #1 Hardware name: Supermicro SYS-F617R2-RT+/X9DRFR, BIOS 3.0a 01/29/2014 task: ffff881025b0e720 ti: ffff88099173c000 task.ti: ffff88099173c000 RIP: 0010:[<ffffffff8190a652>] [<ffffffff8190a652>] intel_ioapic_set_affinity+0x82/0x1b0 RSP: 0018:ffff88099173fdb0 EFLAGS: 00010046 RAX: 0000000000000082 RBX: ffff880a36294600 RCX: 0000000000000082 RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffffffff8266af00 RBP: ffff88099173fdf8 R08: 0000000000000000 R09: ffff88103ec00490 R10: 0000000000000000 R11: 0000000000000000 R12: ffff88099173fe90 R13: 000000000000005f R14: ffff880faa38fe80 R15: ffff880faa38fe80 FS: 00007f7161f05740(0000) GS:ffff88107fc40000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000090 CR3: 000000099140d000 CR4: 00000000001427e0 Stack: ffffffff81c44740 ffff88099173fdc8 ffffffff00000000 00000000c991fd3b ffff880a36294600 ffff88099173fe90 ffff88099173fe90 0000000000000000 0000000000000286 ffff88099173fe08 ffffffff8190aac5 ffff88099173fe28 Call Trace: [<ffffffff8190aac5>] set_remapped_irq_affinity+0x25/0x40 [<ffffffff811322dc>] irq_do_set_affinity+0x1c/0x50 [<ffffffff81132458>] irq_set_affinity_locked+0x98/0xd0 [<ffffffff811324d6>] __irq_set_affinity+0x46/0x70 [<ffffffff811362dc>] write_irq_affinity.isra.6+0xdc/0x100 [<ffffffff8113631c>] irq_affinity_list_proc_write+0x1c/0x20 [<ffffffff8129f30d>] proc_reg_write+0x3d/0x80 [<ffffffff812384a7>] vfs_write+0xb7/0x1f0 [<ffffffff81243619>] ? putname+0x29/0x40 [<ffffffff812390c5>] SyS_write+0x55/0xd0 [<ffffffff81adc729>] system_call_fastpath+0x16/0x1b Code: ff 48 85 d2 74 68 4c 8b 7a 30 4d 85 ff 74 5f 48 c7 c7 00 af 66 82 e8 9e 1b 1d 00 49 8b 57 20 41 0f b7 77 28 48 c7 c7 00 af 66 82 <48> 8b 8a 90 00 00 00 41 0f b7 57 2a 01 f2 48 89 c6 48 63 d2 48 RIP [<ffffffff8190a652>] intel_ioapic_set_affinity+0x82/0x1b0 RSP <ffff88099173fdb0> CR2: 0000000000000090 Signed-off-by: Greg Edwards <gedwards@ddn.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Exclude devices using RMRRs from IOMMU API domainsAlex Williamson2014-07-291-10/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The user of the IOMMU API domain expects to have full control of the IOVA space for the domain. RMRRs are fundamentally incompatible with that idea. We can neither map the RMRR into the IOMMU API domain, nor can we guarantee that the device won't continue DMA with the area described by the RMRR as part of the new domain. Therefore we must prevent such devices from being used by the IOMMU API. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Fix issue in computing domain's iommu_snooping flagJiang Liu2014-07-231-18/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IOMMU units may dynamically attached to/detached from domains, so we should scan all active IOMMU units when computing iommu_snooping flag for a domain instead of only scanning IOMMU units associated with the domain. Also check snooping and superpage capabilities when hot-adding DMAR units. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Introduce helper function iova_size() to improve code readabilityJiang Liu2014-07-231-4/+3Star
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Introduce helper domain_pfn_within_range() to simplify codeJiang Liu2014-07-231-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce helper function domain_pfn_within_range() to simplify code and improve readability. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Simplify intel_unmap_sg() and kill duplicated codeJiang Liu2014-07-231-51/+19Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce intel_unmap() to reduce duplicated code in intel_unmap_sg() and intel_unmap_page(). Also let dma_pte_free_pagetable() to call dma_pte_clear_range() directly, so caller only needs to call dma_pte_free_pagetable(). Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Change iommu_enable/disable_translation to return voidJiang Liu2014-07-231-13/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify error handling path by changing iommu_{enable|disable}_translation to return void. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Avoid freeing virtual machine domain in free_dmar_iommu()Jiang Liu2014-07-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Virtual machine domains are created by intel_iommu_domain_init() and should be destroyed by intel_iommu_domain_destroy(). So avoid freeing virtual machine domain data structure in free_dmar_iommu() when doamin->iommu_count reaches zero, otherwise it may cause invalid memory access because the IOMMU framework still holds references to the domain structure. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Fix possible invalid memory access caused by free_dmar_iommu()Jiang Liu2014-07-231-7/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Static identity and virtual machine domains may be cached in iommu->domain_ids array after corresponding IOMMUs have been removed from domain->iommu_bmp. So we should check domain->iommu_bmp before decreasing domain->iommu_count in function free_dmar_iommu(), otherwise it may cause free of inuse domain data structure. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Allocate dynamic domain id for virtual domains onlyJiang Liu2014-07-231-21/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the same domain id is allocated for si_domain on each IOMMU, otherwise the IOTLB flush for si_domain will fail. Now the rules to allocate and manage domain id are: 1) For normal and static identity domains, domain id is allocated when creating domain structure. And this id will be written into context entry. 2) For virtual machine domain, a virtual id is allocated when creating domain. And when binding virtual machine domain to an iommu, a real domain id is allocated on demand and this domain id will be written into context entry. So domain->id for virtual machine domain may be different from the domain id written into context entry(used by hardware). Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Introduce helper functions to make code symmetric for readabilityJiang Liu2014-07-231-67/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce domain_attach_iommu()/domain_detach_iommu() and refine iommu_attach_domain()/iommu_detach_domain() to make code symmetric and improve readability. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Introduce helper functions to improve code readabilityJiang Liu2014-07-231-33/+26Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce domain_type_is_vm() and domain_type_is_vm_or_si() to improve code readability. Also kill useless macro DOMAIN_FLAG_P2P_MULTIPLE_DEVICES. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Use correct domain id to flush virtual machine domainsJiang Liu2014-07-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For virtual machine domains, domain->id is a virtual id, and the real domain id written into context entry is dynamically allocated. So use the real domain id instead of domain->id when flushing iotlbs for virtual machine domains. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | iommu/vt-d: Match segment number when searching for dev_iotlb capable devicesJiang Liu2014-07-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For virtual machine and static identity domains, there may be devices from different PCI segments associated with the same domain. So function iommu_support_dev_iotlb() should also match PCI segment number (iommu unit) when searching for dev_iotlb capable devices. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | | Merge branch 'core' into x86/vt-dJoerg Roedel2014-07-2319-475/+689
|\ \ \ \ | | |_|/ | |/| | | | | | | | | | Conflicts: drivers/iommu/intel-iommu.c
| * | | iommu: Fix compile error in iommu-sysfs.cJoerg Roedel2014-07-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add missing include of <linux/slab.h>. Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu: Constify struct iommu_opsThierry Reding2014-07-0712-18/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This structure is read-only data and should never be modified. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/amd: Add sysfs supportAlex Williamson2014-07-043-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AMD-Vi support for IOMMU sysfs. This allows us to associate devices with a specific IOMMU device and examine the capabilities and features of that IOMMU. The AMD IOMMU is hosted on and actual PCI device, so we make that device the parent for the IOMMU class device. This initial implementaiton exposes only the capability header and extended features register for the IOMMU. # find /sys | grep ivhd /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:00.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:02.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:04.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:09.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:11.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:12.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:12.2 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:13.0 ... /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/power /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/power/control ... /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/device /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/subsystem /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu/cap /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu/features /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/uevent /sys/class/iommu/ivhd0 Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/vt-d: Make use of IOMMU sysfs supportAlex Williamson2014-07-042-1/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register our DRHD IOMMUs, cross link devices, and provide a base set of attributes for the IOMMU. Note that IRQ remapping support parses the DMAR table very early in boot, well before the iommu_class can reasonably be setup, so our registration is split between intel_iommu_init(), which occurs later, and alloc_iommu(), which typically occurs much earlier, but may happen at any time later with IOMMU hot-add support. On a typical desktop system, this provides the following (pruned): $ find /sys | grep dmar /sys/devices/virtual/iommu/dmar0 /sys/devices/virtual/iommu/dmar0/devices /sys/devices/virtual/iommu/dmar0/devices/0000:00:02.0 /sys/devices/virtual/iommu/dmar0/intel-iommu /sys/devices/virtual/iommu/dmar0/intel-iommu/cap /sys/devices/virtual/iommu/dmar0/intel-iommu/ecap /sys/devices/virtual/iommu/dmar0/intel-iommu/address /sys/devices/virtual/iommu/dmar0/intel-iommu/version /sys/devices/virtual/iommu/dmar1 /sys/devices/virtual/iommu/dmar1/devices /sys/devices/virtual/iommu/dmar1/devices/0000:00:00.0 /sys/devices/virtual/iommu/dmar1/devices/0000:00:01.0 /sys/devices/virtual/iommu/dmar1/devices/0000:00:16.0 /sys/devices/virtual/iommu/dmar1/devices/0000:00:1a.0 /sys/devices/virtual/iommu/dmar1/devices/0000:00:1b.0 /sys/devices/virtual/iommu/dmar1/devices/0000:00:1c.0 ... /sys/devices/virtual/iommu/dmar1/intel-iommu /sys/devices/virtual/iommu/dmar1/intel-iommu/cap /sys/devices/virtual/iommu/dmar1/intel-iommu/ecap /sys/devices/virtual/iommu/dmar1/intel-iommu/address /sys/devices/virtual/iommu/dmar1/intel-iommu/version /sys/class/iommu/dmar0 /sys/class/iommu/dmar1 (devices also link back to the dmar units) This makes address, version, capabilities, and extended capabilities available, just like printed on boot. I've tried not to duplicate data that can be found in the DMAR table, with the exception of the address, which provides an easy way to associate the sysfs device with a DRHD entry in the DMAR. It's tempting to add scopes and RMRR data here, but the full DMAR table is already exposed under /sys/firmware/ and therefore already provides a way for userspace to learn such details. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu: Add sysfs support for IOMMUsAlex Williamson2014-07-042-0/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IOMMUs currently have no common representation to userspace, most seem to have no representation at all aside from a few printks on bootup. There are however features of IOMMUs that are useful to know about. For instance the IOMMU might support superpages, making use of processor large/huge pages more important in a device assignment scenario. It's also useful to create cross links between devices and IOMMU hardware units, so that users might be able to load balance their devices to avoid thrashing a single hardware unit. This patch adds a device create and destroy interface as well as device linking, making it very lightweight for an IOMMU driver to add basic support. IOMMU drivers can provide additional attributes automatically by using an attribute_group. The attributes exposed are expected to be relatively device specific, the means to retrieve them certainly are, so there are currently no common attributes for the new class created here. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu: Remove pci.hAlex Williamson2014-07-041-29/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The single helper here no longer has any users. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/fsl: Use iommu_group_get_for_dev() for IOMMU groupsAlex Williamson2014-07-041-65/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop custom code and use IOMMU provided grouping support for PCI. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Varun Sethi <varun.sethi@freescale.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/vt-d: Update to use PCI DMA aliasesAlex Williamson2014-07-042-138/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VT-d code currently makes use of pci_find_upstream_pcie_bridge() in order to find the topology based alias of a device. This function has a few problems. First, it doesn't check the entire alias path of the device to the root bus, therefore if a PCIe device is masked upstream, the wrong result is produced. Also, it's known to get confused and give up when it crosses a bridge from a conventional PCI bus to a PCIe bus that lacks a PCIe capability. The PCI-core provided DMA alias support solves both of these problems and additionally adds support for DMA function quirks allowing VT-d to work with devices like Marvell and Ricoh with known broken requester IDs. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/vt-d: Use iommu_group_get_for_dev()Alex Williamson2014-07-041-75/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IOMMU code now provides a common interface for finding or creating an IOMMU group for a device on PCI buses. Make use of it and remove piles of code. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/amd: Use iommu_group_get_for_dev()Alex Williamson2014-07-042-160/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The common iommu_group_get_for_dev() allows us to greatly simplify our group lookup for a new device. Also, since we insert IVRS aliases into the PCI DMA alias quirks, we should alway come up with the same results as the existing code. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: Joerg Roedel <joro@8bytes.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/amd: Update to use PCI DMA aliasesAlex Williamson2014-07-041-4/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AMD-Vi already has a concept of an alias provided via the IVRS table. Now that PCI-core also understands aliases, we need to incorporate both aspects when programming the IOMMU. IVRS is generally quite reliable, so we continue to prefer it when an alias is present. For cases where we have an IVRS alias that does not match the PCI alias or where PCI does not report an alias, report the mismatch to allow us to collect more quirks and dynamically incorporate the alias into the device alias quirks where possible. This should allow AMD-Vi to work with devices like Marvell and Ricoh with DMA function alias quirks unknown to the BIOS. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Cc: Joerg Roedel <joro@8bytes.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| * | | iommu/core: Create central IOMMU group lookup/creation interfaceAlex Williamson2014-07-041-0/+182
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently each IOMMU driver that supports IOMMU groups has its own code for discovering the base device used in grouping. This code is generally not specific to the IOMMU hardware, but to the bus of the devices managed by the IOMMU. We can therefore create a common interface for supporting devices on different buses. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Suppress compiler warningsYijing Wang2014-07-041-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | suppress compiler warnings: drivers/iommu/intel-iommu.c: In function ‘device_to_iommu’: drivers/iommu/intel-iommu.c:673: warning: ‘segment’ may be used uninitialized in this function drivers/iommu/intel-iommu.c: In function ‘get_domain_for_dev.clone.3’: drivers/iommu/intel-iommu.c:2217: warning: ‘bridge_bus’ may be used uninitialized in this function drivers/iommu/intel-iommu.c:2217: warning: ‘bridge_devfn’ may be used uninitialized in this function Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Remove the useless dma_pte_addrYijing Wang2014-07-041-4/+2Star
| | | | | | | | | | | | | | | Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Don't use magic number in dma_pte_superpageJoerg Roedel2014-07-041-1/+1
| | | | | | | | | | | | | | | | | | | | | Use the already defined DMA_PTE_LARGE_PAGE for testing instead of hardcoding the value again. Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Fix reference count in iommu_prepare_isaYijing Wang2014-07-041-0/+1
| | | | | | | | | | | | | | | | | | | | | Decrease the device reference count avoid memory leak. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Use inline function dma_pte_superpage instead of macrosYijing Wang2014-07-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use inline function dma_pte_superpage() instead of macro for better readability. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Clear the redundant assignment for domain->nidYijing Wang2014-07-041-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | Alloc_domain() will initialize domain->nid to -1. So the initialization for domain->nid in md_domain_init() is redundant, clear it. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Clear the redundant assignment in dmar_enable_qiYijing Wang2014-07-041-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | __dmar_enable_qi() will initialize free_head,free_tail and free_cnt for q_inval. Remove the redundant initialization in dmar_enable_qi(). Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | | iommu/vt-d: Use list_for_each_safe() to simplify codeYijing Wang2014-07-041-4/+2Star
|/ / | | | | | | | | | | | | | | Use list_for_each_entry_safe() instead of list_entry() to simplify code. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | iommu/amd: Fix small race between invalidate_range_end/startJoerg Roedel2014-06-201-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit e79df31 introduced mmu_notifer_count to protect against parallel mmu_notifier_invalidate_range_start/end calls. The patch left a small race condition when invalidate_range_end() races with a new invalidate_range_start() the empty page-table may be reverted leading to stale TLB entries in the IOMMU and the device. Use a spin_lock instead of just an atomic variable to eliminate the race. Signed-off-by: Joerg Roedel <jroedel@suse.de>
* | iommu/vt-d: fix bug in handling multiple RMRRs for the same PCI deviceJiang Liu2014-06-201-6/+3Star
|/ | | | | | | | | | | | | | | Function dmar_iommu_notify_scope_dev() makes a wrong assumption that there's one RMRR for each PCI device at most, which causes DMA failure on some HP platforms. So enhance dmar_iommu_notify_scope_dev() to handle multiple RMRRs for the same PCI device. Fixbug: https://bugzilla.novell.com/show_bug.cgi?id=879482 Cc: <stable@vger.kernel.org> # 3.15 Reported-by: Tom Mingarelli <thomas.mingarelli@hp.com> Tested-by: Linda Knippers <linda.knippers@hp.com> Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* Merge tag 'iommu-updates-v3.16' of ↵Linus Torvalds2014-06-0612-613/+1993
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu into next Pull IOMMU updates from Joerg Roedel: "The changes include: - a new IOMMU driver for ARM Renesas SOCs - updates and fixes for the ARM Exynos driver to bring it closer to a usable state again - convert the AMD IOMMUv2 driver to use the mmu_notifier->release call-back instead of the task_exit notifier - random other fixes and minor improvements to a number of other IOMMU drivers" * tag 'iommu-updates-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (54 commits) iommu/msm: Use devm_ioremap_resource to simplify code iommu/amd: Fix recently introduced compile warnings arm/ipmmu-vmsa: Fix compile error iommu/exynos: Fix checkpatch warning iommu/exynos: Fix trivial typo iommu/exynos: Remove invalid symbol dependency iommu: fsl_pamu.c: Fix for possible null pointer dereference iommu/amd: Remove duplicate checking code iommu/amd: Handle parallel invalidate_range_start/end calls correctly iommu/amd: Remove IOMMUv2 pasid_state_list iommu/amd: Implement mmu_notifier_release call-back iommu/amd: Convert IOMMUv2 state_table into state_list iommu/amd: Don't access IOMMUv2 state_table directly iommu/ipmmu-vmsa: Support clearing mappings iommu/ipmmu-vmsa: Remove stage 2 PTE bits definitions iommu/ipmmu-vmsa: Support 2MB mappings iommu/ipmmu-vmsa: Rewrite page table management iommu/ipmmu-vmsa: PMD is never folded, PUD always is iommu/ipmmu-vmsa: Set the PTE contiguous hint bit when possible iommu/ipmmu-vmsa: Define driver-specific page directory sizes ...
| *-----------. Merge branches 'iommu/fixes', 'arm/omap', 'arm/smmu', 'arm/shmobile', ↵Joerg Roedel2014-05-3013-611/+2003
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'x86/amd', 'arm/exynos', 'arm/renesas', 'ppc/pamu' and 'arm/msm' into next
| | | | | | | | * iommu/msm: Use devm_ioremap_resource to simplify codeKefeng Wang2014-05-301-31/+7Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_ioremap_resource() to make the code simpler, drop unused variable, redundant return value check, and error-handing code. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| | | | | | | * | iommu: fsl_pamu.c: Fix for possible null pointer dereferenceRickard Strandqvist2014-05-261-2/+1Star
| | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is otherwise a risk of a possible null pointer dereference. Was largely found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Reviewed-by: Bharat Bhushan <bharat.bhushan@freescale.com> Acked-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| | | | | | * | arm/ipmmu-vmsa: Fix compile errorJoerg Roedel2014-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function arm_iommu_create_mapping lost the order parameter. Remove it from this IOMMU driver too to make it build. Signed-off-by: Joerg Roedel <jroedel@suse.de>
| | | | | | * | iommu/ipmmu-vmsa: Support clearing mappingsLaurent Pinchart2014-05-261-4/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| | | | | | * | iommu/ipmmu-vmsa: Remove stage 2 PTE bits definitionsLaurent Pinchart2014-05-261-8/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't support stage 2 translation yet. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| | | | | | * | iommu/ipmmu-vmsa: Support 2MB mappingsLaurent Pinchart2014-05-261-3/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for 2MB block mappings at the PMD level. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| | | | | | * | iommu/ipmmu-vmsa: Rewrite page table managementLaurent Pinchart2014-05-261-107/+86Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IOMMU core will only call us with page sizes advertized as supported by the driver. We can thus simplify the code by removing loops over PGD and PMD entries. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
| | | | | | * | iommu/ipmmu-vmsa: PMD is never folded, PUD always isLaurent Pinchart2014-05-261-57/+9Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver only supports the 3-level long descriptor format that has no PUD and always has a PMD. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-09-17 19:20:11 +0200