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* mmc: mmci: refactor ST Micro busy detectionLinus Walleij2016-11-291-29/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | The ST Micro-specific busy detection was made after the assumption that only this variant supports busy detection. So when doing busy detection, the host immediately tries to use some ST-specific register bits. Since the qualcomm variant also supports some busy detection schemes, encapsulate the variant flags better in the variant struct and prepare to add more variants by just providing some bitmasks to the logic. Put the entire busy detection logic within an if()-clause in the mmci_cmd_irq() function so the code is only executed when busy detection is enabled, and so that it is kept in (almost) one place, and add comments describing what is going on so the code can be understood. Tested on the Ux500 by introducing some prints in the busy detection path and noticing how the IRQ is enabled, used and disabled successfully. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: clean up header definesLinus Walleij2016-11-291-8/+8
| | | | | | | | | | | | | | | | | There was some confusion in the CPSM (Command Path State Machine) and DPSM (Data Path State Machine) regarding the naming of the registers, clarify the meaning of this acronym so the naming is understandable, and consistently use BIT() to define these fields. Consequently name the register bit defines MCI_[C|D]PSM_* and adjust the driver as well. Include new definitions for a few bits found in a patch from Srinivas Kandagatla. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Remove redundant runtime PM callsUlf Hansson2016-05-021-20/+0Star
| | | | | | | | | | Commit 9250aea76bfc ("mmc: core: Enable runtime PM management of host devices"), made some calls to the runtime PM API from the driver redundant. Especially those which deals with runtime PM reference counting, so let's remove them. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Remove unnecessary header fileWang Hongcheng2016-03-171-1/+0Star
| | | | | | | | The header file asm/sizes.h is unnecessary, let's remove it. This also allows to compile under X86 arch. Signed-off-by: Wang Hongcheng <annie.wang@amd.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: support 8bit mode on the NomadikLinus Walleij2016-01-141-0/+1
| | | | | | | The Nomadik variant supports 8bit mode for (e)MMC cards. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: fix an ages old detection errorLinus Walleij2016-01-141-1/+1
| | | | | | | | | | | | | | | commit 4956e10903fd ("ARM: 6244/1: mmci: add variant data and default MCICLOCK support") added variant data for ARM, U300 and Ux500 variants. The Nomadik NHK8815/8820 variant was erroneously labeled as a U300 variant, and when the proper Nomadik variant was later introduced in commit 34fd421349ff ("ARM: 7378/1: mmci: add support for the Nomadik MMCI variant") this was not fixes. Let's say this fixes the latter commit as there was no proper Nomadik support until then. Cc: stable@vger.kernel.org Fixes: 34fd421349ff ("ARM: 7378/1: mmci: add support for the Nomadik...") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Cascade EPROBE_DEFER from regulators.Bjorn Andersson2015-03-251-1/+4
| | | | | Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Get rid of dead code in mmci_dma_setupPramod Gurav2015-01-281-5/+0Star
| | | | | | | | | DMA configuration has been removed from function mmci_dma_setup but the local mask variable was not removed. This remains unused hence remove it from the function and operations on it Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Do pm_runtime_put() after the host has been addedUlf Hansson2015-01-191-1/+1
| | | | | | | | | | Previously the pm_runtime_put() caused the device to be runtime PM suspended, but then immediately being resumed when we add the host. Prevent this unnecessary runtime PM suspend/resume cycle during ->probe() by moving the call to pm_runtime_put() after mmc_add_host(). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* Merge tag 'pm+acpi-3.19-rc1' of ↵Linus Torvalds2014-12-111-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI and power management updates from Rafael Wysocki: "This time we have some more new material than we used to have during the last couple of development cycles. The most important part of it to me is the introduction of a unified interface for accessing device properties provided by platform firmware. It works with Device Trees and ACPI in a uniform way and drivers using it need not worry about where the properties come from as long as the platform firmware (either DT or ACPI) makes them available. It covers both devices and "bare" device node objects without struct device representation as that turns out to be necessary in some cases. This has been in the works for quite a few months (and development cycles) and has been approved by all of the relevant maintainers. On top of that, some drivers are switched over to the new interface (at25, leds-gpio, gpio_keys_polled) and some additional changes are made to the core GPIO subsystem to allow device drivers to manipulate GPIOs in the "canonical" way on platforms that provide GPIO information in their ACPI tables, but don't assign names to GPIO lines (in which case the driver needs to do that on the basis of what it knows about the device in question). That also has been approved by the GPIO core maintainers and the rfkill driver is now going to use it. Second is support for hardware P-states in the intel_pstate driver. It uses CPUID to detect whether or not the feature is supported by the processor in which case it will be enabled by default. However, it can be disabled entirely from the kernel command line if necessary. Next is support for a platform firmware interface based on ACPI operation regions used by the PMIC (Power Management Integrated Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms. That interface is used for manipulating power resources and for thermal management: sensor temperature reporting, trip point setting and so on. Also the ACPI core is now going to support the _DEP configuration information in a limited way. Basically, _DEP it supposed to reflect off-the-hierarchy dependencies between devices which may be very indirect, like when AML for one device accesses locations in an operation region handled by another device's driver (usually, the device depended on this way is a serial bus or GPIO controller). The support added this time is sufficient to make the ACPI battery driver work on Asus T100A, but it is general enough to be able to cover some other use cases in the future. Finally, we have a new cpufreq driver for the Loongson1B processor. In addition to the above, there are fixes and cleanups all over the place as usual and a traditional ACPICA update to a recent upstream release. As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for Intel platforms should be able to handle power management of the DMA engine correctly, the cpufreq-dt driver should interact with the thermal subsystem in a better way and the ACPI backlight driver should handle some more corner cases, among other things. On top of the ACPICA update there are fixes for race conditions in the ACPICA's interrupt handling code which might lead to some random and strange looking failures on some systems. In the cleanups department the most visible part is the series of commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration option. That was triggered by a discussion regarding the generic power domains code during which we realized that trying to support certain combinations of PM config options was painful and not really worth it, because nobody would use them in production anyway. For this reason, we decided to make CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the conclusion that the latter became redundant and CONFIG_PM could be used instead of it. The material here makes that replacement in a major part of the tree, but there will be at least one more batch of that in the second part of the merge window. Specifics: - Support for retrieving device properties information from ACPI _DSD device configuration objects and a unified device properties interface for device drivers (and subsystems) on top of that. As stated above, this works with Device Trees and ACPI and allows device drivers to be written in a platform firmware (DT or ACPI) agnostic way. The at25, leds-gpio and gpio_keys_polled drivers are now going to use this new interface and the GPIO subsystem is additionally modified to allow device drivers to assign names to GPIO resources returned by ACPI _CRS objects (in case _DSD is not present or does not provide the expected data). The changes in this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam, Geert Uytterhoeven). - Support for Hardware Managed Performance States (HWP) as described in Volume 3, section 14.4, of the Intel SDM in the intel_pstate driver. CPUID is used to detect whether or not the feature is supported by the processor. If supported, it will be enabled automatically unless the intel_pstate=no_hwp switch is present in the kernel command line. From Dirk Brandewie. - New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie). - Support for firmware interface based on ACPI operation regions used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR platforms for power resource control and thermal management (Aaron Lu). - Limited support for retrieving off-the-hierarchy dependencies between devices from ACPI _DEP device configuration objects and deferred probing support for the ACPI battery driver based on the _DEP information to make that driver work on Asus T100A (Lan Tianyu). - New cpufreq driver for the Loongson1B processor (Kelvin Cheung). - ACPICA update to upstream revision 20141107 which only affects tools (Bob Moore). - Fixes for race conditions in the ACPICA's interrupt handling code and in the ACPI code related to system suspend and resume (Lv Zheng and Rafael J Wysocki). - ACPI core fix for an RCU-related issue in the ioremap() regions management code that slowed down significantly after CPUs had been allowed to enter idle states even if they'd had RCU callbakcs queued and triggered some problems in certain proprietary graphics driver (and elsewhere). The fix replaces synchronize_rcu() in that code with synchronize_rcu_expedited() which makes the issue go away. From Konstantin Khlebnikov. - ACPI LPSS (Low-Power Subsystem) driver fix to handle power management of the DMA engine included into the LPSS correctly. The problem is that the DMA engine doesn't have ACPI PM support of its own and it simply is turned off when the last LPSS device having ACPI PM support goes into D3cold. To work around that, the PM domain used by the ACPI LPSS driver is redesigned so at least one device with ACPI PM support will be on as long as the DMA engine is in use. From Andy Shevchenko. - ACPI backlight driver fix to avoid using it on "Win8-compatible" systems where it doesn't work and where it was used by default by mistake (Aaron Lu). - Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki, Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin Chaugule (mostly related to the upcoming ARM64 support). - Intel RAPL (Running Average Power Limit) power capping driver fixes and improvements including new processor IDs (Jacob Pan). - Generic power domains modification to power up domains after attaching devices to them to meet the expectations of device drivers and bus types assuming devices to be accessible at probe time (Ulf Hansson). - Preliminary support for controlling device clocks from the generic power domains core code and modifications of the ARM/shmobile platform to use that feature (Ulf Hansson). - Assorted minor fixes and cleanups of the generic power domains core code (Ulf Hansson, Geert Uytterhoeven). - Assorted minor fixes and cleanups of the device clocks control code in the PM core (Geert Uytterhoeven, Grygorii Strashko). - Consolidation of device power management Kconfig options by making CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter which is now redundant (Rafael J Wysocki and Kevin Hilman). That is the first batch of the changes needed for this purpose. - Core device runtime power management support code cleanup related to the execution of callbacks (Andrzej Hajda). - cpuidle ARM support improvements (Lorenzo Pieralisi). - cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and Bartlomiej Zolnierkiewicz). - New cpufreq driver callback (->ready) to be executed when the cpufreq core is ready to use a given policy object and cpufreq-dt driver modification to use that callback for cooling device registration (Viresh Kumar). - cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James Geboski, Tomeu Vizoso). - Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate, cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao, Stefan Wahren, Petr Cvek). - OPP (Operating Performance Points) framework modification to allow OPPs to be removed too and update of a few cpufreq drivers (cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added during initialization) on driver removal (Viresh Kumar). - Hibernation core fixes and cleanups (Tina Ruchandani and Markus Elfring). - PM Kconfig fix related to CPU power management (Pankaj Dubey). - cpupower tool fix (Prarit Bhargava)" * tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (120 commits) i2c-omap / PM: Drop CONFIG_PM_RUNTIME from i2c-omap.c dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM tools: cpupower: fix return checks for sysfs_get_idlestate_count() drivers: sh / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM e1000e / igb / PM: Eliminate CONFIG_PM_RUNTIME MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM MFD / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM misc / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM media / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM input / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM leds: leds-gpio: Fix multiple instances registration without 'label' property iio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM hsi / OMAP / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM i2c-hid / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM drm / exynos / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM hwrandom / exynos / PM: Use CONFIG_PM in #ifdef block / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM USB / PM: Drop CONFIG_PM_RUNTIME from the USB core PM: Merge the SET*_RUNTIME_PM_OPS() macros ...
| * PM: Merge the SET*_RUNTIME_PM_OPS() macrosRafael J. Wysocki2014-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SET_PM_RUNTIME_PM_OPS() and SET_RUNTIME_PM_OPS() macros are identical except that one of them is not empty for CONFIG_PM set, while the other one is not empty for CONFIG_PM_RUNTIME set, respectively. However, after commit b2b49ccbdd54 (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so one of these macros is now redundant. For this reason, replace SET_PM_RUNTIME_PM_OPS() with SET_RUNTIME_PM_OPS() everywhere and redefine the SET_PM_RUNTIME_PM_OPS symbol as SET_RUNTIME_PM_OPS in case new code is starting to use the macro being removed here. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | mmc: mmci: fix mmci_post_requestSrinivas Kandagatla2014-11-101-0/+7
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the post request is cancelling the channel and descriptor and which are equal to host->dma_current and host->dma_desc_current respectively, then it makes sense to reset these pointers to NULL, so that the driver does not reference it. Also the host_cookie can be reset to 0 in cases of error, so that the core could reissue the same mmc_request. This patch was tested with 'mmc: core: fix prepared requests while doing bkops' to fix the below issue. mmci-pl18x 12400000.sdcc: error during DMA transfer! Unable to handle kernel paging request at virtual address 40000000 pgd = c0204000 [40000000] *pgd=00000000 Internal error: Oops: 805 [#1] SMP ARM Modules linked in: ipv6 ath6kl_sdio ath6kl_core CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.17.0-rc7-linaro-multi-v7 #1 task: c0c9d7e0 ti: c0c92000 task.ti: c0c92000 PC is at v7_dma_inv_range+0x34/0x4c LR is at __dma_page_dev_to_cpu+0x80/0x100 pc : [<c021efc0>] lr : [<c021af18>] psr: 400f0193 sp : c0c93e20 ip : c0c9a478 fp : c08ea538 r10: c0c9f548 r9 : 00000002 r8 : e97d9000 r7 : 00000200 r6 : c0c9d504 r5 : c0db0880 r4 : 00000000 r3 : 0000003f r2 : 00000040 r1 : 40000200 r0 : 40000000 Flags: nZcv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5787d Table: a9ef406a DAC: 00000015 Process swapper/0 (pid: 0, stack limit = 0xc0c92250) Stack: (0xc0c93e20 to 0xc0c94000) 3e20: c021f058 e9a17178 e9a171bc e99dfd6c 00000001 00000001 e995de10 00000002 3e40: 00000000 c021b574 00000000 c04bc4a4 00000000 e9b49ac0 c0ce6e6c e99dfda4 3e60: 00000088 e9810780 c0d8291c c072ea58 00000000 c072d3fc 00000000 c072f534 3e80: 00000000 e9b49ac0 00000100 c0c9a444 00000088 c072f6b4 c072f5d4 e9d40080 3ea0: e98107dc 00000000 00000000 c0280a60 00000000 7d55bf61 e9810780 e98107dc 3ec0: 00000000 f0002000 c0d460e8 c0d460e8 c0c92000 c0280b60 e9810780 c0ce7190 3ee0: 00000000 c028369c c02835f4 00000088 00000088 c0280278 c0c8ec70 c020f080 3f00: f000200c c0c9a958 c0c93f28 c02088e4 c04bd630 c04bd5bc 200f0013 ffffffff 3f20: c0c93f5c c0212800 00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b 3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70 3f60: c04bd630 c04bd5bc 200f0013 ffffffff c04bd574 c071bd24 7d50c9b4 c0719a44 3f80: 7d50c9b4 0000015b c0c9a498 c0c92028 c0c9a498 c0c9a4fc ea7a0e40 c0c8ee38 3fa0: c0d460e8 c0276198 00000000 c0d8291a 00000000 c0c9a400 00000000 c0be0bc4 3fc0: ffffffff ffffffff c0be05f8 00000000 00000000 c0c533d8 c0d82ed4 c0c9a47c 3fe0: c0c533d4 c0c9e870 8020406a 511f06f0 00000000 80208074 00000000 00000000 [<c021efc0>] (v7_dma_inv_range) from [<c021af18>] (__dma_page_dev_to_cpu+0x80/0x100) [<c021af18>] (__dma_page_dev_to_cpu) from [<c021b574>] (arm_dma_unmap_sg+0x5c/0x84) [<c021b574>] (arm_dma_unmap_sg) from [<c072ea58>] (mmci_dma_unmap.isra.16+0x60/0x74) [<c072ea58>] (mmci_dma_unmap.isra.16) from [<c072f534>] (mmci_data_irq+0x1fc/0x29c) [<c072f534>] (mmci_data_irq) from [<c072f6b4>] (mmci_irq+0xe0/0x114) [<c072f6b4>] (mmci_irq) from [<c0280a60>] (handle_irq_event_percpu+0x78/0x134) [<c0280a60>] (handle_irq_event_percpu) from [<c0280b60>] (handle_irq_event+0x44/0x64) [<c0280b60>] (handle_irq_event) from [<c028369c>] (handle_fasteoi_irq+0xa8/0x1a8) [<c028369c>] (handle_fasteoi_irq) from [<c0280278>] (generic_handle_irq+0x2c/0x3c) [<c0280278>] (generic_handle_irq) from [<c020f080>] (handle_IRQ+0x40/0x90) [<c020f080>] (handle_IRQ) from [<c02088e4>] (gic_handle_irq+0x38/0x68) [<c02088e4>] (gic_handle_irq) from [<c0212800>] (__irq_svc+0x40/0x54) Exception stack(0xc0c93f28 to 0xc0c93f70) 3f20: 00000001 a987c000 c0c93f3c c04bd574 00000000 0000015b 3f40: ea7a0e40 00000000 c0d460e8 c0d460e8 c0c92000 c08ea538 29b12000 c0c93f70 3f60: c04bd630 c04bd5bc 200f0013 ffffffff [<c0212800>] (__irq_svc) from [<c04bd5bc>] (msm_cpu_pm_enter_sleep+0x48/0x4c) [<c04bd5bc>] (msm_cpu_pm_enter_sleep) from [<c071bd24>] (qcom_lpm_enter_spc+0x20/0x2c) [<c071bd24>] (qcom_lpm_enter_spc) from [<c0719a44>] (cpuidle_enter_state+0x44/0xf0) [<c0719a44>] (cpuidle_enter_state) from [<c0276198>] (cpu_startup_entry+0x1f4/0x238) [<c0276198>] (cpu_startup_entry) from [<c0be0bc4>] (start_kernel+0x384/0x390) Code: 1e070f3e e1110003 e1c11003 1e071f3e (ee070f36) ---[ end trace cf6cb3f6432c9834 ]--- Kernel panic - not syncing: Fatal exception in interrupt Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: restore detect line inversion semanticsLinus Walleij2014-10-021-2/+2
| | | | | | | | | | | | | | | | | | | | commit 98e90de99a0c43bd434da814c882c4332441871e "mmc: host: switch OF parser to use gpio descriptors" switched the semantic behaviour of card detect and read only flags such that the inversion capability flag would only be set if inversion was explicitly specified in the device tree, in the hopes that no-one was using double inversion. It turns out that the XOR:ing between the explicit inversion was indeed in use, so we need to restore the old semantics where both ways of inversion are checked and the end result XOR:ed. Reported-by: Javier Martinez Canillas <javier@dowhile0.org> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: rename sdio flag in vendor data to st_sdioSrinivas Kandagatla2014-09-101-24/+24
| | | | | | | | | | | | This patch renames sdio flag in vendor data to st_sdio, as this flag is only used to enable ST specific sdio setup. This will also ensure that the ST specfic setup is not done on other vendor like Qualcomm. Originally the issue was detected while testing WLAN ath6kl on IFC6410 board with APQ8064 SOC. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add sdio enable mask in variant dataSrinivas Kandagatla2014-09-101-7/+7
| | | | | | | | | | | | | | | This patch adds sdio enable mask in variant data, SOCs like ST have special bits in datactrl register to enable sdio. Unconditionally setting this bit in this driver breaks other SOCs like Qualcomm which maps this bits to something else, so making this enable bit to come from variant data solves the issue. Originally the issue is detected while testing WLAN ath6kl on Qualcomm APQ8064. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: augment driver to handle gpio descriptorsLinus Walleij2014-09-091-10/+29
| | | | | | | | | | | | | | | | | | | | | | Currently the MMCI driver will only handle GPIO descriptors implicitly through the device tree probe glue in mmc_of_init(), but devices instatiated other ways such as through board files and passing descriptors using the GPIO descriptor table will not be able to exploit descriptors. Augment the driver to look for a GPIO descriptor if device tree is not used for the device, and if that doesn't work, fall back to platform data GPIO assignment using the old API. The end goal is to get rid of the platform data integer GPIO assingments from the kernel. This enable the MMCI-embedding platforms to be converted to GPIO descritor tables. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add qcom dml support to the driver.Srinivas Kandagatla2014-09-091-1/+17
| | | | | | | | | | | | | | | | | | On Qualcomm APQ8064 SOCs, SD card controller has an additional glue called DML (Data Mover Local/Lite) to assist dma transfers. This hardware needs to be setup before any dma transfer is requested. DML itself is not a DMA engine, its just a gule between the SD card controller and dma controller. Most of this code has been ported from qualcomm's 3.4 kernel. This patch adds the code necessary to intialize the hardware and setup before doing any dma transfers. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Reverse IRQ handling for the arm_variantUlf Hansson2014-08-111-2/+10
| | | | | | | | | | | | | | | | | | | | | | Commit "mmc: mmci: Handle CMD irq before DATA irq", caused an issue when using the ARM model of the PL181 and running QEMU. The bug was reported for the following QEMU version: $ qemu-system-arm -version QEMU emulator version 2.0.0 (Debian 2.0.0+dfsg-2ubuntu1.1), Copyright (c) 2003-2008 Fabrice Bellard To resolve the problem, let's restore the old behavior were the DATA irq is handled prior the CMD irq, but only for the arm_variant, which the problem was reported for. Reported-by: John Stultz <john.stultz@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Move all CMD irq handling to mmci_cmd_irq()Ulf Hansson2014-08-111-10/+12
| | | | | | | | | | | | | | This patch won't change the behavior of how mmci deals with CMD irqs. By moving code from mmci_irq() to mmci_cmd_irq(), we getter a better overview of what going on. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Remove redundant check of status for DATA irqUlf Hansson2014-08-111-6/+5Star
| | | | | | | | | | | | | | We don't need to verify the content of the status register twice, while we are about to handle a DATA irq. Instead let's leave all verification to be handled by mmci_data_irq(). Cc: Peter Maydell <peter.maydell@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add Qualcomm Id to amba id tableSrinivas Kandagatla2014-07-091-0/+23
| | | | | | | | | | | This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm SDCC controller is pl180, but amba id registers read 0x0's. The plan is to remove SDCC driver totally and use mmci as the main SD controller driver for Qualcomm SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add Qcom specific rx_fifocnt logic.Srinivas Kandagatla2014-07-091-2/+28
| | | | | | | | | | | | | | | | | | | | | MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements a qcom specific get_rx_fifocnt function which is implemented based on status register flags. Based on qcom_fifo flag in variant data structure, the corresponding get_rx_fifocnt function is selected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add explicit clk controlSrinivas Kandagatla2014-07-091-3/+26
| | | | | | | | | | | | | | On Controllers like Qcom SD card controller where cclk is mclk and mclk should be directly controlled by the driver. This patch adds support to control mclk directly in the driver, and also adds explicit_mclk_control flag in variant structure giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Fixed checkpatch warning Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add f_max to variant structureSrinivas Kandagatla2014-07-091-2/+11
| | | | | | | | | | | Some of the controller have maximum supported frequency, This patch adds support in variant data structure to specify such restrictions. This gives more flexibility in calculating the f_max before passing it to mmc-core. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add support to data commands via variant structure.Srinivas Kandagatla2014-07-091-0/+5
| | | | | | | | | | | On some SOCs like Qcom there are explicit bits in the command register to specify if its a data transfer command or not. So this patch adds support to such bits in variant data, giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add edge support to data and command out in variant data.Srinivas Kandagatla2014-07-091-1/+5
| | | | | | | | | | | | | | This patch adds edge support for data and command out to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add 8bit bus support in variant dataSrinivas Kandagatla2014-07-091-1/+6
| | | | | | | | | | | | | This patch adds 8bit bus enable to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add ddrmode mask to variant dataSrinivas Kandagatla2014-07-091-1/+4
| | | | | | | | | | | | | | This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with incorrect ddrmode mask, resulting in failures on Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add Qcom datactrl register variantSrinivas Kandagatla2014-07-091-0/+5
| | | | | | | | | | Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit position datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add enough delay between writes to CMD register.Srinivas Kandagatla2014-07-091-1/+1
| | | | | | | | | | | | | | | | | | | On Qcom SD Card controller POWER, CLKCTRL, DATACTRL and COMMAND registers should be updated in MCLK domain, and writes to these registers must be separated by three MCLK cycles. This resitriction is not applicable for other registers. Any subsequent writes to these register will be ignored until 3 MCLK have passed. One usec delay between two CMD register writes is not sufficient in the card identification phase where the CCLK is very low. This patch replaces a static 1 usec delay to use mmci_reg_delay function which can provide correct delay depending on the cclk frequency. Without this patch the card is not detected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: use NSEC_PER_SEC macroSrinivas Kandagatla2014-07-091-1/+1
| | | | | | | | | This patch replaces a constant used in calculating timeout with a proper macro. This is make code more readable. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* Merge tag 'mmc-updates-for-3.16-rc1' of ↵Linus Torvalds2014-06-101-2/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC update from Chris Ball: "MMC highlights for 3.16: Core: - support HS400 mode of eMMC 5.0, via DT bindings mmc-hs400-1_{2,8}v - if card init at 3.3v doesn't work, try 1.8v and 1.2v too Drivers: - moxart: New driver for MOXA ART SoCs - rtsx_usb_sdmmc: New driver for Realtek USB card readers - sdhci: Large rework around IRQ/regulator handling, remove card_tasklet - sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support - sunxi: New driver for Allwinner sunxi SoCs - usdhi6rol0: New driver for Renesas SD/SDIO controller" * tag 'mmc-updates-for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (95 commits) mmc: sdhci-s3c: use mmc_of_parse and remove the card_tasklet mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controller mmc: sdhci-of-esdhc: Fixup compile error mmc: tegra: fix reporting of base clock frequency mmc: tegra: disable UHS modes mmc: sdhci-dove: use mmc_of_parse() and remove card_tasklet CD handler MAINTAINERS: mmc: Add path to git tree mmc: dove: fix missing MACH_DOVE dependency mmc: sdhci: SD tuning is broken for some controllers mmc: sdhci-esdhc-imx: fix mmc ddr mode regression issue mmc: sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support mmc: omap_hsmmc: split omap-dma header file mmc: omap_hsmmc: fix cmd23 multiblock read/write mmc: omap_hsmmc: use devm_ioremap_resource mmc: omap_hsmmc: use devm_request_threaded_irq mmc: omap_hsmmc: use devm_request_irq mmc: omap_hsmmc: use devm_clk_get mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs mmc: wmt-sdmmc: Use GFP_KERNEL instead of hard-coded value mmc: omap: Use DIV_ROUND_UP instead of open coded ...
| * mmc: mmci: clarify DDR timing mode between SD-UHS and eMMCSeungwon Jeon2014-04-201-2/+4
| | | | | | | | | | | | | | | | | | Added MMC_DDR52 as eMMC's DDR mode distinguished from SD-UHS. CC: Russell King <linux@arm.linux.org.uk> Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
* | mmc: mmci: Enforce DMA configuration through DTUlf Hansson2014-06-021-23/+1Star
| | | | | | | | | | | | | | | | | | | | Remove the option to provide DMA configuration as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Roland Stigge <stigge@antcom.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
* | mmc: mmci: Enforce max frequency configuration through DTUlf Hansson2014-05-201-4/+1Star
| | | | | | | | | | | | | | Remove the option to provide a maximum frequency as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Enforce mmc capabilities through DTUlf Hansson2014-05-121-2/+0Star
| | | | | | | | | | | | | | Remove the option to provide the flags for mmc capabilities as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Enforce DT for signal direction and feedback clockUlf Hansson2014-05-121-20/+14Star
| | | | | | | | | | | | | | Remove the option to provide signal direction configuration and feeback clock as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Enable MMC_CAP_CMD23Ulf Hansson2014-05-121-0/+3
| | | | | | | | | | | | | | This is pure software configuration, which mmci has been supporting for a while. Let's enable it as default so we can take benefit from it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Use the common mmc DT parserUlf Hansson2014-05-121-59/+33Star
| | | | | | | | | | | | | | | | | | | | | | Let mmci DT parser only handle the specific bindings related to mmci and extend the DT support by converting to the common mmc DT parser. While both DT and platform data exist, DT takes precedence. If there are supplied DT data, the card detect and write protect GPIOS are enforced to be provided through it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Add DT bindings for feedback clock pinUlf Hansson2014-05-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | The ST Micro variant supports the option of using a feedback clock signal in favor of the clockout pin when latching incoming signals on the data bus. Since this is matter of how pins are being routed we need to provide a new DT binding to be able to configure this through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | mmc: mmci: Add DT bindings for signal directionUlf Hansson2014-05-121-0/+11
| | | | | | | | | | | | | | | | | | | | | | Some variants have support for indicating the bus signal directions, which currently are configured through platform data. Add corresponding DT bindings to enable us to move away from using the platform data. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | mmc: mmci: Convert to devm functionsUlf Hansson2014-05-121-35/+17Star
| | | | | | | | | | | | | | Converting to devm functions to simplify error handling in ->probe() and to cleanup ->remove(). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Convert to the mmc gpio APIUlf Hansson2014-05-121-82/+15Star
| | | | | | | | | | | | | | To avoid duplication of code while handling card detect and write protect GPIO pins/irqs, let's convert to use the mmc gpio API. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Put the device into low power state at system suspendUlf Hansson2014-05-121-31/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For CONFIG_PM_SLEEP, the device were always left in full power state after system suspend. We solely relied on a power domain to put it into low power state, which is an unreasonable requirement to put on SOCs to implement. Especially for those SOCs not supporting power domains at all. Use pm_runtime_force_suspend|resume() as the system suspend callbacks, to resolve the issue. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Let runtime PM callbacks be available for CONFIG_PMUlf Hansson2014-05-121-2/+2
| | | | | | | | | | | | | | | | | | | | Convert to the SET_PM_RUNTIME_PM macro while defining the runtime PM callbacks. This means the callbacks becomes available for both CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME, which is needed to handle the combinations of these scenarios. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Mask IRQs for all variants during runtime suspendUlf Hansson2014-05-121-12/+11Star
|/ | | | | | | | | | | In runtime suspended state, we are not expecting IRQs and thus we can safely mask them, not only for pwrreg_nopower variants but for all. Obviously we then also need to make sure we restore the IRQ mask while becoming runtime resumed. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Enable support for busy detection for ux500 variantUlf Hansson2014-02-231-8/+43
| | | | | | | | | | | | | | | | | The ux500 variants have HW busy detection support, which is indicated by the busy_detect flag. For these variants let's enable the MMC_CAP_WAIT_WHILE_BUSY flag and add the support for it. The mmc core will provide the RSP_BUSY command flag for those requests we should care about busy detection. Regarding the max_busy_timeout, the HW don't support busy detection timeouts so at this initial step let's make it simple and set it to zero to indicate we are able to support any timeout. Cc: Russell King <linux@arm.linux.org.uk> Cc: Johan Rudholm <jrudholm@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
* mmc: mmci: Handle CMD irq before DATA irqUlf Hansson2014-02-231-4/+5
| | | | | | | | | | | | | | | | | In case of a read operation both MCI_CMDRESPEND and MCI_DATAEND can be set in the status register when entering the interrupt handler. This is due to that the card start sending data before the host has acknowledged the command response. To resolve the issue for this scenario, we must start by handling the CMD irq instead of the DATA irq. The reason is beacuse the completion of the DATA irq will not respect the current command and then causing it to be garbled. Cc: Russell King <linux@arm.linux.org.uk> Cc: Johan Rudholm <jrudholm@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
* ARM: 7906/1: mmc: mmci: Remove unnecessary amba_set_drvdata()Michal Simek2013-12-291-2/+0Star
| | | | | | | | | | | | Driver core clears the driver data to NULL after device_release or on probe failure, so just remove it from here. Driver core change: "device-core: Ensure drvdata = NULL when no driver is bound" (sha1: 0998d0631001288a5974afc0b2a5f568bcdecb4d) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge tag 'mmc-updates-for-3.13-rc1' of ↵Linus Torvalds2013-11-181-13/+4Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC updates from Chris Ball: "MMC highlights for 3.13: Core: - Improve runtime PM support, remove mmc_{suspend,resume}_host(). - Add MMC_CAP_RUNTIME_RESUME, for delaying MMC resume until we're outside of the resume sequence (in runtime_resume) to decrease system resume time. Drivers: - dw_mmc: Support HS200 mode. - sdhci-eshdc-imx: Support SD3.0 SDR clock tuning, DDR on IMX6. - sdhci-pci: Add support for Intel Clovertrail and Merrifield" * tag 'mmc-updates-for-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (108 commits) mmc: wbsd: Silence compiler warning mmc: core: Silence compiler warning in __mmc_switch mmc: sh_mmcif: Convert to clk_prepare|unprepare mmc: sh_mmcif: Convert to PM macros when defining dev_pm_ops mmc: dw_mmc: exynos: Revert the sdr_timing assignment mmc: sdhci: Avoid needless loop while handling SDIO interrupts in sdhci_irq mmc: core: Add MMC_CAP_RUNTIME_RESUME to resume at runtime_resume mmc: core: Improve runtime PM support during suspend/resume for sd/mmc mmc: core: Remove redundant mmc_power_up|off at runtime callbacks mmc: Don't force card to active state when entering suspend/shutdown MIPS: db1235: Don't use MMC_CLKGATE mmc: core: Remove deprecated mmc_suspend|resume_host APIs mmc: mmci: Move away from using deprecated APIs mmc: via-sdmmc: Move away from using deprecated APIs mmc: tmio: Move away from using deprecated APIs mmc: sh_mmcif: Move away from using deprecated APIs mmc: sdricoh_cs: Move away from using deprecated APIs mmc: rtsx: Remove redundant suspend and resume callbacks mmc: wbsd: Move away from using deprecated APIs mmc: pxamci: Remove redundant suspend and resume callbacks ...
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-04 15:29:42 +0200