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* mmc: core: restore detect line inversion semanticsLinus Walleij2014-10-021-2/+2
| | | | | | | | | | | | | | | | | | | | commit 98e90de99a0c43bd434da814c882c4332441871e "mmc: host: switch OF parser to use gpio descriptors" switched the semantic behaviour of card detect and read only flags such that the inversion capability flag would only be set if inversion was explicitly specified in the device tree, in the hopes that no-one was using double inversion. It turns out that the XOR:ing between the explicit inversion was indeed in use, so we need to restore the old semantics where both ways of inversion are checked and the end result XOR:ed. Reported-by: Javier Martinez Canillas <javier@dowhile0.org> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: rename sdio flag in vendor data to st_sdioSrinivas Kandagatla2014-09-101-24/+24
| | | | | | | | | | | | This patch renames sdio flag in vendor data to st_sdio, as this flag is only used to enable ST specific sdio setup. This will also ensure that the ST specfic setup is not done on other vendor like Qualcomm. Originally the issue was detected while testing WLAN ath6kl on IFC6410 board with APQ8064 SOC. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add sdio enable mask in variant dataSrinivas Kandagatla2014-09-101-7/+7
| | | | | | | | | | | | | | | This patch adds sdio enable mask in variant data, SOCs like ST have special bits in datactrl register to enable sdio. Unconditionally setting this bit in this driver breaks other SOCs like Qualcomm which maps this bits to something else, so making this enable bit to come from variant data solves the issue. Originally the issue is detected while testing WLAN ath6kl on Qualcomm APQ8064. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: augment driver to handle gpio descriptorsLinus Walleij2014-09-091-10/+29
| | | | | | | | | | | | | | | | | | | | | | Currently the MMCI driver will only handle GPIO descriptors implicitly through the device tree probe glue in mmc_of_init(), but devices instatiated other ways such as through board files and passing descriptors using the GPIO descriptor table will not be able to exploit descriptors. Augment the driver to look for a GPIO descriptor if device tree is not used for the device, and if that doesn't work, fall back to platform data GPIO assignment using the old API. The end goal is to get rid of the platform data integer GPIO assingments from the kernel. This enable the MMCI-embedding platforms to be converted to GPIO descritor tables. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add qcom dml support to the driver.Srinivas Kandagatla2014-09-091-1/+17
| | | | | | | | | | | | | | | | | | On Qualcomm APQ8064 SOCs, SD card controller has an additional glue called DML (Data Mover Local/Lite) to assist dma transfers. This hardware needs to be setup before any dma transfer is requested. DML itself is not a DMA engine, its just a gule between the SD card controller and dma controller. Most of this code has been ported from qualcomm's 3.4 kernel. This patch adds the code necessary to intialize the hardware and setup before doing any dma transfers. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Reverse IRQ handling for the arm_variantUlf Hansson2014-08-111-2/+10
| | | | | | | | | | | | | | | | | | | | | | Commit "mmc: mmci: Handle CMD irq before DATA irq", caused an issue when using the ARM model of the PL181 and running QEMU. The bug was reported for the following QEMU version: $ qemu-system-arm -version QEMU emulator version 2.0.0 (Debian 2.0.0+dfsg-2ubuntu1.1), Copyright (c) 2003-2008 Fabrice Bellard To resolve the problem, let's restore the old behavior were the DATA irq is handled prior the CMD irq, but only for the arm_variant, which the problem was reported for. Reported-by: John Stultz <john.stultz@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Move all CMD irq handling to mmci_cmd_irq()Ulf Hansson2014-08-111-10/+12
| | | | | | | | | | | | | | This patch won't change the behavior of how mmci deals with CMD irqs. By moving code from mmci_irq() to mmci_cmd_irq(), we getter a better overview of what going on. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Remove redundant check of status for DATA irqUlf Hansson2014-08-111-6/+5Star
| | | | | | | | | | | | | | We don't need to verify the content of the status register twice, while we are about to handle a DATA irq. Instead let's leave all verification to be handled by mmci_data_irq(). Cc: Peter Maydell <peter.maydell@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add Qualcomm Id to amba id tableSrinivas Kandagatla2014-07-091-0/+23
| | | | | | | | | | | This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm SDCC controller is pl180, but amba id registers read 0x0's. The plan is to remove SDCC driver totally and use mmci as the main SD controller driver for Qualcomm SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add Qcom specific rx_fifocnt logic.Srinivas Kandagatla2014-07-091-2/+28
| | | | | | | | | | | | | | | | | | | | | MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements a qcom specific get_rx_fifocnt function which is implemented based on status register flags. Based on qcom_fifo flag in variant data structure, the corresponding get_rx_fifocnt function is selected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add explicit clk controlSrinivas Kandagatla2014-07-091-3/+26
| | | | | | | | | | | | | | On Controllers like Qcom SD card controller where cclk is mclk and mclk should be directly controlled by the driver. This patch adds support to control mclk directly in the driver, and also adds explicit_mclk_control flag in variant structure giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Fixed checkpatch warning Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add f_max to variant structureSrinivas Kandagatla2014-07-091-2/+11
| | | | | | | | | | | Some of the controller have maximum supported frequency, This patch adds support in variant data structure to specify such restrictions. This gives more flexibility in calculating the f_max before passing it to mmc-core. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add support to data commands via variant structure.Srinivas Kandagatla2014-07-091-0/+5
| | | | | | | | | | | On some SOCs like Qcom there are explicit bits in the command register to specify if its a data transfer command or not. So this patch adds support to such bits in variant data, giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add edge support to data and command out in variant data.Srinivas Kandagatla2014-07-091-1/+5
| | | | | | | | | | | | | | This patch adds edge support for data and command out to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add 8bit bus support in variant dataSrinivas Kandagatla2014-07-091-1/+6
| | | | | | | | | | | | | This patch adds 8bit bus enable to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: add ddrmode mask to variant dataSrinivas Kandagatla2014-07-091-1/+4
| | | | | | | | | | | | | | This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with incorrect ddrmode mask, resulting in failures on Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add Qcom datactrl register variantSrinivas Kandagatla2014-07-091-0/+5
| | | | | | | | | | Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit position datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Add enough delay between writes to CMD register.Srinivas Kandagatla2014-07-091-1/+1
| | | | | | | | | | | | | | | | | | | On Qcom SD Card controller POWER, CLKCTRL, DATACTRL and COMMAND registers should be updated in MCLK domain, and writes to these registers must be separated by three MCLK cycles. This resitriction is not applicable for other registers. Any subsequent writes to these register will be ignored until 3 MCLK have passed. One usec delay between two CMD register writes is not sufficient in the card identification phase where the CCLK is very low. This patch replaces a static 1 usec delay to use mmci_reg_delay function which can provide correct delay depending on the cclk frequency. Without this patch the card is not detected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: use NSEC_PER_SEC macroSrinivas Kandagatla2014-07-091-1/+1
| | | | | | | | | This patch replaces a constant used in calculating timeout with a proper macro. This is make code more readable. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* Merge tag 'mmc-updates-for-3.16-rc1' of ↵Linus Torvalds2014-06-101-2/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC update from Chris Ball: "MMC highlights for 3.16: Core: - support HS400 mode of eMMC 5.0, via DT bindings mmc-hs400-1_{2,8}v - if card init at 3.3v doesn't work, try 1.8v and 1.2v too Drivers: - moxart: New driver for MOXA ART SoCs - rtsx_usb_sdmmc: New driver for Realtek USB card readers - sdhci: Large rework around IRQ/regulator handling, remove card_tasklet - sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support - sunxi: New driver for Allwinner sunxi SoCs - usdhi6rol0: New driver for Renesas SD/SDIO controller" * tag 'mmc-updates-for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (95 commits) mmc: sdhci-s3c: use mmc_of_parse and remove the card_tasklet mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controller mmc: sdhci-of-esdhc: Fixup compile error mmc: tegra: fix reporting of base clock frequency mmc: tegra: disable UHS modes mmc: sdhci-dove: use mmc_of_parse() and remove card_tasklet CD handler MAINTAINERS: mmc: Add path to git tree mmc: dove: fix missing MACH_DOVE dependency mmc: sdhci: SD tuning is broken for some controllers mmc: sdhci-esdhc-imx: fix mmc ddr mode regression issue mmc: sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support mmc: omap_hsmmc: split omap-dma header file mmc: omap_hsmmc: fix cmd23 multiblock read/write mmc: omap_hsmmc: use devm_ioremap_resource mmc: omap_hsmmc: use devm_request_threaded_irq mmc: omap_hsmmc: use devm_request_irq mmc: omap_hsmmc: use devm_clk_get mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs mmc: wmt-sdmmc: Use GFP_KERNEL instead of hard-coded value mmc: omap: Use DIV_ROUND_UP instead of open coded ...
| * mmc: mmci: clarify DDR timing mode between SD-UHS and eMMCSeungwon Jeon2014-04-201-2/+4
| | | | | | | | | | | | | | | | | | Added MMC_DDR52 as eMMC's DDR mode distinguished from SD-UHS. CC: Russell King <linux@arm.linux.org.uk> Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
* | mmc: mmci: Enforce DMA configuration through DTUlf Hansson2014-06-021-23/+1Star
| | | | | | | | | | | | | | | | | | | | Remove the option to provide DMA configuration as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Roland Stigge <stigge@antcom.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
* | mmc: mmci: Enforce max frequency configuration through DTUlf Hansson2014-05-201-4/+1Star
| | | | | | | | | | | | | | Remove the option to provide a maximum frequency as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Enforce mmc capabilities through DTUlf Hansson2014-05-121-2/+0Star
| | | | | | | | | | | | | | Remove the option to provide the flags for mmc capabilities as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Enforce DT for signal direction and feedback clockUlf Hansson2014-05-121-20/+14Star
| | | | | | | | | | | | | | Remove the option to provide signal direction configuration and feeback clock as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Enable MMC_CAP_CMD23Ulf Hansson2014-05-121-0/+3
| | | | | | | | | | | | | | This is pure software configuration, which mmci has been supporting for a while. Let's enable it as default so we can take benefit from it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Use the common mmc DT parserUlf Hansson2014-05-121-59/+33Star
| | | | | | | | | | | | | | | | | | | | | | Let mmci DT parser only handle the specific bindings related to mmci and extend the DT support by converting to the common mmc DT parser. While both DT and platform data exist, DT takes precedence. If there are supplied DT data, the card detect and write protect GPIOS are enforced to be provided through it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Add DT bindings for feedback clock pinUlf Hansson2014-05-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | The ST Micro variant supports the option of using a feedback clock signal in favor of the clockout pin when latching incoming signals on the data bus. Since this is matter of how pins are being routed we need to provide a new DT binding to be able to configure this through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | mmc: mmci: Add DT bindings for signal directionUlf Hansson2014-05-121-0/+11
| | | | | | | | | | | | | | | | | | | | | | Some variants have support for indicating the bus signal directions, which currently are configured through platform data. Add corresponding DT bindings to enable us to move away from using the platform data. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | mmc: mmci: Convert to devm functionsUlf Hansson2014-05-121-35/+17Star
| | | | | | | | | | | | | | Converting to devm functions to simplify error handling in ->probe() and to cleanup ->remove(). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Convert to the mmc gpio APIUlf Hansson2014-05-121-82/+15Star
| | | | | | | | | | | | | | To avoid duplication of code while handling card detect and write protect GPIO pins/irqs, let's convert to use the mmc gpio API. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Put the device into low power state at system suspendUlf Hansson2014-05-121-31/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For CONFIG_PM_SLEEP, the device were always left in full power state after system suspend. We solely relied on a power domain to put it into low power state, which is an unreasonable requirement to put on SOCs to implement. Especially for those SOCs not supporting power domains at all. Use pm_runtime_force_suspend|resume() as the system suspend callbacks, to resolve the issue. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Let runtime PM callbacks be available for CONFIG_PMUlf Hansson2014-05-121-2/+2
| | | | | | | | | | | | | | | | | | | | Convert to the SET_PM_RUNTIME_PM macro while defining the runtime PM callbacks. This means the callbacks becomes available for both CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME, which is needed to handle the combinations of these scenarios. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | mmc: mmci: Mask IRQs for all variants during runtime suspendUlf Hansson2014-05-121-12/+11Star
|/ | | | | | | | | | | In runtime suspended state, we are not expecting IRQs and thus we can safely mask them, not only for pwrreg_nopower variants but for all. Obviously we then also need to make sure we restore the IRQ mask while becoming runtime resumed. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: mmci: Enable support for busy detection for ux500 variantUlf Hansson2014-02-231-8/+43
| | | | | | | | | | | | | | | | | The ux500 variants have HW busy detection support, which is indicated by the busy_detect flag. For these variants let's enable the MMC_CAP_WAIT_WHILE_BUSY flag and add the support for it. The mmc core will provide the RSP_BUSY command flag for those requests we should care about busy detection. Regarding the max_busy_timeout, the HW don't support busy detection timeouts so at this initial step let's make it simple and set it to zero to indicate we are able to support any timeout. Cc: Russell King <linux@arm.linux.org.uk> Cc: Johan Rudholm <jrudholm@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
* mmc: mmci: Handle CMD irq before DATA irqUlf Hansson2014-02-231-4/+5
| | | | | | | | | | | | | | | | | In case of a read operation both MCI_CMDRESPEND and MCI_DATAEND can be set in the status register when entering the interrupt handler. This is due to that the card start sending data before the host has acknowledged the command response. To resolve the issue for this scenario, we must start by handling the CMD irq instead of the DATA irq. The reason is beacuse the completion of the DATA irq will not respect the current command and then causing it to be garbled. Cc: Russell King <linux@arm.linux.org.uk> Cc: Johan Rudholm <jrudholm@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
* ARM: 7906/1: mmc: mmci: Remove unnecessary amba_set_drvdata()Michal Simek2013-12-291-2/+0Star
| | | | | | | | | | | | Driver core clears the driver data to NULL after device_release or on probe failure, so just remove it from here. Driver core change: "device-core: Ensure drvdata = NULL when no driver is bound" (sha1: 0998d0631001288a5974afc0b2a5f568bcdecb4d) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge tag 'mmc-updates-for-3.13-rc1' of ↵Linus Torvalds2013-11-181-13/+4Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC updates from Chris Ball: "MMC highlights for 3.13: Core: - Improve runtime PM support, remove mmc_{suspend,resume}_host(). - Add MMC_CAP_RUNTIME_RESUME, for delaying MMC resume until we're outside of the resume sequence (in runtime_resume) to decrease system resume time. Drivers: - dw_mmc: Support HS200 mode. - sdhci-eshdc-imx: Support SD3.0 SDR clock tuning, DDR on IMX6. - sdhci-pci: Add support for Intel Clovertrail and Merrifield" * tag 'mmc-updates-for-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (108 commits) mmc: wbsd: Silence compiler warning mmc: core: Silence compiler warning in __mmc_switch mmc: sh_mmcif: Convert to clk_prepare|unprepare mmc: sh_mmcif: Convert to PM macros when defining dev_pm_ops mmc: dw_mmc: exynos: Revert the sdr_timing assignment mmc: sdhci: Avoid needless loop while handling SDIO interrupts in sdhci_irq mmc: core: Add MMC_CAP_RUNTIME_RESUME to resume at runtime_resume mmc: core: Improve runtime PM support during suspend/resume for sd/mmc mmc: core: Remove redundant mmc_power_up|off at runtime callbacks mmc: Don't force card to active state when entering suspend/shutdown MIPS: db1235: Don't use MMC_CLKGATE mmc: core: Remove deprecated mmc_suspend|resume_host APIs mmc: mmci: Move away from using deprecated APIs mmc: via-sdmmc: Move away from using deprecated APIs mmc: tmio: Move away from using deprecated APIs mmc: sh_mmcif: Move away from using deprecated APIs mmc: sdricoh_cs: Move away from using deprecated APIs mmc: rtsx: Remove redundant suspend and resume callbacks mmc: wbsd: Move away from using deprecated APIs mmc: pxamci: Remove redundant suspend and resume callbacks ...
| * mmc: mmci: Move away from using deprecated APIsUlf Hansson2013-10-311-13/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | Suspend and resume of cards are being handled from the protocol layer and consequently the mmc_suspend|resume_host APIs are deprecated. This means we can simplify the suspend|resume callbacks by removing the use of the deprecated APIs. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* | ARM: 7834/1: mmc: mmci: Save and restore register contextUlf Hansson2013-09-191-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a corresponding power domain exists for the device and it manages to cut the domain regulator while the device is runtime suspended, the IP loses it's registers context. We restore the context in the .runtime_resume callback from the existing register caches to adapt to this situation. We also want to make sure the registers are in a known state while restoring context in the case when the power domain did not drop the power, since there are restrictions for the order of writing to these registers. To handle this, we clear the registers in the .runtime_suspend callback. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Rickard Andersson <rickard.andersson@stericsson.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 7833/1: mmc: mmci: Adapt to register write restrictionsUlf Hansson2013-09-191-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After a write to the MMCICLOCK register data cannot be written to this register for three feedback clock cycles. Writes to the MMCIPOWER register must be separated by three MCLK cycles. Previously no issues has been observered, but using higher ARM clock frequencies on STE- platforms has triggered this problem. The MMCICLOCK register is written to in .set_ios and for some data transmissions for SDIO. We do not need a delay at the data transmission path, because sending and receiving data will require more than three clock cycles. Then we use a simple logic to only delay in .set_ios and thus we don't affect throughput performance. Signed-off-by: Johan Rudholm <jrudholm@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Rickard Andersson <rickard.andersson@stericsson.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 7832/1: mmc: mmci: Use optional sleep pinctrl stateUlf Hansson2013-09-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By optionally putting the pins into sleep state in the .runtime_suspend callback we can accomplish two things. One is to minimize current leakage from pins and thus save power, second we can prevent the IP from driving pins output in an uncontrolled manner, which may happen if the power domain drops the domain regulator. When returning from idle, entering .runtime_resume callback, the pins are restored to default state. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Rickard Andersson <rickard.andersson@stericsson.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 7831/1: mmc: mmci: Adapt to new pinctrl handlingUlf Hansson2013-09-191-17/+0Star
|/ | | | | | | | | | There is no need for every driver to fetch a pinctrl handle and to select the default state. Instead this is handled by the device driver core, thus we can remove this piece of code from mmci. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7726/1: mmc: mmci: Add card_busy function to improve UHS card supportUlf Hansson2013-05-231-1/+32
| | | | | | | | | | | | | To verify a signal voltage switch at initialization of UHS cards the .card_busy callback is used. For some of the ST-variants, card busy detection on the DAT0 pin is supported. We extend the variant struct with a busy_detect flag to indicate support for it. A corresponding busy detect function, which polls the busy status bit, is then set to the .card_busy callback. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7725/1: mmc: mmci: Cache MMCIDATACTRL registerUlf Hansson2013-05-231-3/+14
| | | | | | | | | | Add a cache variable in the host struct that reflects the current data in the MMCIDATACTRL register. This patch will not introduce any functional change but instead provide an easy option to keep specific bits in the register between each data transfer. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7724/1: mmc: mmci: Support signal voltage switch for UHS cardsUlf Hansson2013-05-231-0/+34
| | | | | | | | | Add .start_signal_voltage_switch callback to be able to support UHS cards. The voltage switch requires the optional vqmmc regulator to exist since the actual voltage switch will be performed directly on it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7721/1: mmc: mmci: Fixup regulator handling for vqmmcUlf Hansson2013-05-231-4/+6
| | | | | | | | | | | | We can not rely on regulator_is_enabled to decide whether to enable|disable the regulator. It would mean that the reference counter for it is not balanced properly. Instead keep track of our internal state by using a new flag in the host struct, so we can take correct decisions. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7713/1: mmc: mmci: Allow MMCI to request channels with information ↵Lee Jones2013-05-231-21/+22
| | | | | | | | | | | | | acquired from DT Currently, if DMA information isn't passed from platform data, then DMA will not be used. This patch allows DMA information obtained though Device Tree to be used as well. Cc: Chris Ball <cjb@laptop.org> Cc: linux-mmc@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7719/1: mmc: mmci: Support for CMD23Ulf Hansson2013-05-231-4/+10
| | | | | | | | | | | | | | Support added for transmission of CMD23 during multi block read or write. In order to activate this feature, MMC_CAP_CMD23 flag needs to be enabled in the capabilities field. Note that CMD23 support is mandatory to support features like reliable write, data tag, context ID, packed command. This patch is based upon a patch from Saugata Das. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7718/1: mmc: mmci: Set actual clock for debug purposeUlf Hansson2013-05-231-0/+6
| | | | | | | | | Update cclk to the acutal used value and copy it to the actual_clock variable in the mmc host for debug purpose. Signed-off-by: Fredrik Soderstedt <fredrik.soderstedt@stericsson.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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