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| * | mtd: nand: pxa3xx: Remove hardcoded mtd nameEzequiel Garcia2013-08-301-4/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no advantage in using a hardcoded name for the mtd device. Instead use the provided by the platform_device. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: pxa3xx: Add a local loop variableEzequiel Garcia2013-08-301-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is just a cosmetic change, to make the code more readable. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: pxa3xx: Use 'length override' in ONFI paramater page readEzequiel Garcia2013-08-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ONFI command 'parameter page read' needs a non-standard length. Therefore, we enable the 'length override' field in NDCB0 and set a non-zero 'length count' in NDCB3. Additionally, the 'spare enable' bit must be disabled for any command that sets a non-zero 'length count' in NDCB3. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: pxa3xx: Support command buffer #3Ezequiel Garcia2013-08-301-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some newer controllers support a fourth command buffer. This additional command buffer allows to set an arbitrary length count, using the NDCB3.NDLENCNT field, to perform non-standard length operations such as the ONFI parameter page read. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: pxa3xx: Allow to set/clear the 'spare enable' fieldEzequiel Garcia2013-08-301-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some commands (such as the ONFI parameter page read) need to clear the 'spare enable' bit. This commit allows to set/clear depending on the prepared command, instead of having it always set. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: pxa3xx: Handle ECC and DMA enable/disable properlyEzequiel Garcia2013-08-301-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When ECC is not selected, the ECC enable bit must be cleared in the NAND control register. Same applies to DMA. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: pxa3xx: Introduce 'marvell,armada370-nand' compatible stringEzequiel Garcia2013-08-301-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver supports NFCv1 (as found in PXA SoC) and NFCv2 (as found in Armada 370/XP SoC). As both controller has a few differences, a way of distinguishing between the two is needed. This commit introduces a new compatible string 'marvell,armada370-nand' and assigns a compatible data of type enum pxa3xx_nand_variant to allow such distinction. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Cc: devicetree@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: gpmi: set the BCH's geometry with the ecc infoHuang Shijie2013-08-301-1/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the nand chip provides us the ECC info, we can use it firstly. The set_geometry_by_ecc_info() will use the ECC info, and calculate the parameters we need. Rename the old code to legacy_set_geometry() which will takes effect when there is no ECC info from the nand chip or we fails in the ECC info case. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: add the ecc info for some full-id nand chipsHuang Shijie2013-08-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2. From these chips' datasheets, we know that: The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte. The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: parse out the ECC info for the full-id nand chipsHuang Shijie2013-08-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Parse out the ECC information for the full-id nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: replace the hardcode with the onfi_feature()Huang Shijie2013-08-301-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses the hardcode to detect the 16-bit bus width. Use the onfi_feature() to replace it. Signed-off-by: Huang Shijie <b32955@freescale.com> [Brian: small fixup] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: get the ECC info from the Extended Parameter PageHuang Shijie2013-08-301-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the ONFI 2.1, the onfi spec adds the Extended Parameter Page to store the ECC info. The onfi spec tells us that if the nand chip's recommended ECC codeword size is not 512 bytes, then the @ecc_bits is 0xff. The host _SHOULD_ then read the Extended ECC information that is part of the extended parameter page to retrieve the ECC requirements for this device. This patch implement the reading of the Extended Parameter Page, and parses the sections for ECC type, and get the ECC info from the ECC section. Tested this patch with Micron MT29F64G08CBABAWP. Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: get the ECC info from the parameter page for ONFI nandHuang Shijie2013-08-301-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the ONFI spec, we can just get the ECC info from the @ecc_bits field of the parameter page. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: atmel_nand: move the sanity check to the beginning of pmecc_enable()Josh Wu2013-08-301-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | It is better to do the sanity check for the parameter before any hardware operation. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: onenand: use dev_get_platdata()Jingoo Han2013-08-303-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: use dev_get_platdata()Jingoo Han2013-08-3018-35/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: maps: use dev_get_platdata()Jingoo Han2013-08-309-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: devices: use dev_get_platdata()Jingoo Han2013-08-303-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: denali: use NAND_CI_CELLTYPE_MSK instead of hardcoded constantAkinobu Mita2013-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use NAND_CI_CELLTYPE_MSK to extract the cell type from nand_chip.cellinfo instead of hardcoded constant. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: gpmi-nand: use more sensible error codes at various placesLothar Waßmann2013-08-301-3/+3
| | | | | | | | | | | | | | | | | | | | | Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: atmel_nand: fix the warning when CONFIG_OF is not definedJosh Wu2013-08-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix following warning: drivers/mtd/nand/atmel_nand.c:2007: warning: 'atmel_nand_nfc_match' defined but not used This patch add '#if defined(CONFIG_OF)' block to guard around the definition of atmel_nand_nfc_match, in order to avoid the warning when the kernel is configured without DT support. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_nandbiterrs: use mtd_test helpersAkinobu Mita2013-08-301-33/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_write() and mtdtest_erase_eraseblock() in mtd_test helpers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Iwo Mergler <Iwo.Mergler@netcommwireless.com.au> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_torturetest: use mtd_test helpersAkinobu Mita2013-08-301-59/+7Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_scan_for_bad_eraseblocks() and mtdtest_erase_good_eraseblocks() in mtd_test helpers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_subpagetest: use mtd_test helpersAkinobu Mita2013-08-301-78/+9Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_scan_for_bad_eraseblocks() and mtdtest_erase_good_eraseblocks() in mtd_test helpers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_stresstest: use mtd_test helpersAkinobu Mita2013-08-301-74/+12Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_read(), mtdtest_write(), mtdtest_erase_eraseblock(), and mtdtest_scan_for_bad_eraseblocks() in mtd_test helpers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_speedtest: use mtd_test helpersAkinobu Mita2013-08-301-144/+36Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_write(), mtdtest_read(), mtdtest_scan_for_bad_eraseblocks(), mtdtest_erase_good_eraseblocks() in mtd_test helpers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_readtest: use mtd_test helpersAkinobu Mita2013-08-301-41/+8Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_read() and mtdtest_scan_for_bad_eraseblocks() in mtd_test helpers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_pagetest: use mtd_test helpersAkinobu Mita2013-08-301-147/+58Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_write(), mtdtest_read(), mtdtest_erase_eraseblock(), mtdtest_scan_for_bad_eraseblocks(), and mtdtest_erase_good_eraseblocks() in mtd_test helpers. [dwmw2: merge later 'remove always true condition' fix] Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: mtd_oobtest: use mtd_test helpersAkinobu Mita2013-08-301-80/+12Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use mtdtest_scan_for_bad_eraseblocks(), mtdtest_erase_good_eraseblocks(), and mtdtest_erase_eraseblock() in mtd_test helpers. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: tests: rename sources in order to link a helper objectAkinobu Mita2013-08-309-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each mtd test module have a single source whose name is the same as the module name. In order to link a single object including helper functions to every test module, this rename these sources to the different names. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: tests: introduce helper functionsAkinobu Mita2013-08-302-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces the helper functions which can be used by several mtd/tests modules. The following three functions are used all over the test modules. - mtdtest_erase_eraseblock() - mtdtest_scan_for_bad_eraseblocks() - mtdtest_erase_good_eraseblocks() The following are wrapper functions for mtd_read() and mtd_write() which can simplify the return value check. - mtdtest_read() - mtdtest_write() All helpers are put into a single .c file and it will be linked to every test module later. The code will actually be copied to every test module, but it is fine for our small test infrastructure. [dwmw2: merge later 'return -EIO when mtdtest_read() failed' fix] Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Vikram Narayanan <vikram186@gmail.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: remove NAND_BBT_SCANEMPTYBrian Norris2013-08-303-30/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND_BBT_SCANEMPTY is a strange, badly-supported option with omap as its single remaining user. NAND_BBT_SCANEMPTY was likely used by accident in omap2[1]. And anyway, omap2 doesn't scan the chip for bad blocks (courtesy of NAND_SKIP_BBTSCAN), and so its use of this option is irrelevant. This patch drops the NAND_BBT_SCANEMPTY option. [1] http://lists.infradead.org/pipermail/linux-mtd/2012-July/042902.html Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Ivan Djelic <ivan.djelic@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: hide in-memory BBT implementation detailsBrian Norris2013-08-302-23/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_base.c shouldn't have to know the implementation details of nand_bbt's in-memory BBT. Specifically, nand_base shouldn't perform the bit masking and shifting to isolate a BBT entry. Instead, just move some of the BBT code into a new nand_markbad_bbt() interface. This interface allows external users (i.e., nand_base) to mark a single block as bad in the BBT. Then nand_bbt will take care of modifying the in-memory BBT and updating the flash-based BBT (if applicable). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: refactor chip->block_markbad interfaceBrian Norris2013-08-305-75/+72Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The chip->block_markbad pointer should really only be responsible for writing a bad block marker for new bad blocks. It should not take care of BBT-related functionality, nor should it handle bookkeeping of bad block stats. This patch refactors the 3 users of the block_markbad interface (plus the default nand_base implementation) so that the common code is kept in nand_block_markbad_lowlevel(). It removes some inconsistencies between the various implementations and should allow for more centralized improvements in the future. Because gpmi-nand no longer needs the nand_update_bbt() function, let's stop exporting it as well. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com> (for gpmi-nand parts) Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: eliminate castBrian Norris2013-08-301-3/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | Just make 'res' an int. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: remove multiplied-by-2 block logicBrian Norris2013-08-301-48/+35Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parent commit 771c568bcf915e708ae819ef9d07d862f7e2da86 ("mtd: nand: add accessors, macros for in-memory BBT") makes the following comment obsolete: /* * Note that numblocks is 2 * (real numblocks) here, see i+=2 * below as it makes shifting and masking less painful */ I don't think it ever could have been "less painful" to have to shift an extra bit (or 2, or 3) at various points in nand_bbt.c (and even outside, since we leak our in-memory format). But now it is certainly more painful, since we have nice macros and functions to retrieve the relevant portions of the BBT. This patch removes any points where the block number is doubled/halved/otherwise-shifted, instead representing the block number in its most natural form: as the actual block number. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: add accessors, macros for in-memory BBTBrian Norris2013-08-301-22/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is an abundance of magic numbers and complicated shifting/masking logic in the in-memory BBT code which makes the code unnecessary complex and hard to read. This patch adds macros to represent the 00b, 01b, 10b, and 11b memory-BBT magic numbers, as well as two accessor functions for reading and marking the memory-BBT bitfield for a given block. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: ofpart: add compatible check for child nodesJosh Wu2013-08-051-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case that the nand device will support some features like Nand Flash Controller, we want to make the sub feature as a sub node of nand device. Use such organization it is easy to enable/disable feature, also it is back compatible and more readable. If the sub-node has a compatible property then it is a driver not partition. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> [ added a missing newline -Brian ] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: atmel_nand: enable Nand Flash Controller (NFC) write via sramJosh Wu2013-08-051-5/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enable writing nand flash via NFC SRAM. It will minimize the CPU overhead. The SRAM write only support ECC_NONE and ECC_HW with PMECC. To enable this NFC write by SRAM feature, you can add a string in dts under NFC driver node. This driver has been tested on SAMA5D3X-EK with JFFS2, YAFFS2, UBIFS and mtd-utils. Here is part of mtd_speedtest (writing test) result, compare with non-NFC writing, it reduces %65 cpu load with loss %12 speed. - commands use to test: # insmod /mnt/mtd_speedtest.ko dev=2 & # top -n 30 -d 1 | grep speedtest - test result: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 mtd_speedtest: testing eraseblock write speed 509 495 root D 1164 0% 7% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 8% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 5% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock write speed is 5194 KiB/s mtd_speedtest: testing page write speed 509 495 root D 1164 0% 32% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 27% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 25% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 30% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page write speed is 5024 KiB/s Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: atmel_nand: enable Nand Flash Controller (NFC) read data via sramJosh Wu2013-08-051-6/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NFC has embedded sram which can use to transfer data. This patch enable reading nand flash via NFC SRAM. It will minimize the CPU overhead. This driver has been tested on SAMA5D3X-EK with JFFS2, YAFFS2, UBIFS and mtd-utils. Here puts the part of mtd_speedtest (read test) result as following: Compare with non-NFC mtd_speedtest result, reading will reduce %45 cpu load with increase %80 speed. - commands use to test: # insmod /mnt/mtd_speedtest.ko dev=2 & # top -n 30 -d 1 | grep speedtest - test result: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 mtd_speedtest: testing eraseblock read speed 509 495 root D 1164 0% 28% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 25% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 26% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock read speed is 9403 KiB/s mtd_speedtest: testing page read speed 509 495 root R 1164 0% 31% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 57% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 53% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 71% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page read speed is 9258 KiB/s Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: atmel_nand: add Nand Flash Controller (NFC) supportJosh Wu2013-08-052-33/+476
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nand Flash Controller (NFC) can handle automatic transfers, sending the commands and address cycles to the NAND Flash. To use NFC in this driver, user needs to add NFC child node in nand flash driver. The NFC child node includes NFC's compatible string and regiters of the address and size of NFC command registers, NFC registers (embedded in HSMC) and NFC SRAM. Also user need to set up the HSMC irq, which use to check whether nfc command is finish or not. This driver has been tested on SAMA5D3X-EK board with JFFS2, YAFFS, UBIFS and mtd-utils. I put the part of the mtd_speedtest result here for your information. >From the mtd_speedtest, we can see the NFC will reduce the %50 of cpu load when writing nand flash. No change when reading. In the meantime, the speed will be slow about %8. - commands use to test: #insmod /mnt/mtd_speedtest.ko dev=2 & #top -n 30 -d 1 | grep speedtest - test result: Before the patch: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 515 495 root R 1164 0% 93% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 98% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 99% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock write speed is 5768 KiB/s mtd_speedtest: testing eraseblock read speed 515 495 root R 1164 0% 92% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 94% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock read speed is 5932 KiB/s mtd_speedtest: testing page write speed 515 495 root R 1164 0% 94% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 98% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 98% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page write speed is 5770 KiB/s mtd_speedtest: testing page read speed 515 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 89% insmod /mnt/mtd_speedtest.ko dev=2 515 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page read speed is 5910 KiB/s After the patch: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 41943040, eraseblock size 131072, page size 2048, count of eraseblocks 320, pages per eraseblock 64, OOB size 64 mtd_speedtest: testing eraseblock write speed 509 495 root D 1164 0% 49% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 50% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 47% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock write speed is 5370 KiB/s mtd_speedtest: testing eraseblock read speed 509 495 root R 1164 0% 92% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 91% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 95% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: eraseblock read speed is 5715 KiB/s mtd_speedtest: testing page write speed 509 495 root D 1164 0% 48% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 47% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root D 1164 0% 50% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page write speed is 5224 KiB/s mtd_speedtest: testing page read speed 509 495 root R 1164 0% 89% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 94% insmod /mnt/mtd_speedtest.ko dev=2 509 495 root R 1164 0% 93% insmod /mnt/mtd_speedtest.ko dev=2 mtd_speedtest: page read speed is 5641 KiB/s Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: atmel_nand: replace pmecc enable code with one function.Josh Wu2013-08-051-15/+26
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: atmel_nand: use devm_xxx gpio kzalloc, gpio and ioremapJean-Christophe PLAGNIOL-VILLARD2013-08-051-115/+65Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this will allow to simply the error and remove path Cc: linux-mtd@lists.infradead.org Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [josh.wu@atmel.com: fix checkpatch warnings and rebase to latest mtd git tree] [josh.wu@atmel.com: replace devm_request_and_ioremap with devm_ioremap_resource] Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nandsim: remove unused ns->geom.oobshiftAkinobu Mita2013-08-051-3/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ns->geom.oobshift holds bits number in OOB size, but OOB size is not always power of two. So it is useless and it actually isn't used in this driver except for just printing the value at module loading. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nandsim: remove unused codeAkinobu Mita2013-08-051-6/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the leftover from commit 831d316b8b80b68dcdd2b3f5ede6d33c2bbf5835 ("mtd: nandsim: remove autoincrement code"). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nandsim: use NS_RAW_OFFSET()Akinobu Mita2013-08-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use NS_RAW_OFFSET() to calculate the page offset in flash RAM image by (row, column) address. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nandsim: simplify NS_RAW_OFFSET()Akinobu Mita2013-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the definision of NS_RAW_OFFSET() by using (ns)->geom.pgszoob which holds the sum of page size and OOB size. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nandsim: use kasprintf()Akinobu Mita2013-08-051-3/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | Use kasprintf() which combines kmalloc and sprintf. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nandsim: convert pages_written[] to bitmapAkinobu Mita2013-08-051-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nandsim.pages_written[] is the array of unsigned char which is indexed by the page number and used for identifying which pages have been written when cache_file is used. Each entry holds 0 (not written) or 1 (written), so it can be converted to bitmap. This reduces the allocation size of pages_written[] by 1/8. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: nand: detect OOB size for Toshiba 24nm raw SLCBrian Norris2013-08-051-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Toshiba NAND datasheets have not been very forthcoming on OOB size information; they do not provide any bitfields in the ID string for spare area. In their 24nm technology flash, however, Toshiba migrated their NAND to have 32 bytes spare per 512 bytes of page area (up from the traditional 16 bytes), as they now require 8-bit ECC or higher. I have discussed this issue directly with Toshiba representatives, and they acknowledge this problem. They recommend detecting these flash based on their technology node as follows: For 24nm Toshiba SLC raw NAND (not BENAND -- Built-in Ecc NAND), there are 32 bytes of spare area for every 512 bytes of in-band data area. We can implement this rule with the following snippet of a device ID decode table, which applies to all their 43nm, 32nm, and 24nm SLC NAND (this table is not fully in the NAND datasheets, but it was provided directly by Toshiba representatives): - ID byte 5, bit[7]: 1 -> BENAND 0 -> raw SLC - ID byte 6, bits[2:0]: 100b -> 43nm 101b -> 32nm 110b -> 24nm 111b -> Reserved I'm also working with Toshiba on including this bitfield description for their 5th and 6th ID bytes in their public data sheets. I will provide the 8-byte ID strings from the two 24nm Toshiba samples I have; their first 6 bytes match the documentation I received from Toshiba: 24nm SLC 1Gbit TC58NVG0S3HTA00 0x98 0xf1 0x80 0x15 0x72 0x16 0x08 0x00 24nm SLC 2Gbit TC58NVG1S3HTA00 0x98 0xda 0x90 0x15 0x76 0x16 0x08 0x00 I have also tested for regressions with: 43nm SLC 4Gbit TC58NVG2S3ETA00 0x98 0xdc 0x90 0x15 0x76 0x14 0x03 0x10 32nm SLC 8Gbit TC58NVG3SOFA00 0x98 0xd3 0x90 0x26 0x76 0x15 0x02 0x08 Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-09-06 01:40:02 +0200