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| * net: ethernet: support of_get_mac_address new ERR_PTR errorPetr Štetiar2019-05-074-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There was NVMEM support added to of_get_mac_address, so it could now return ERR_PTR encoded error values, so we need to adjust all current users of of_get_mac_address to this new fact. While at it, remove superfluous is_valid_ether_addr as the MAC address returned from of_get_mac_address is always valid and checked by is_valid_ether_addr anyway. Fixes: d01f449c008a ("of_net: add NVMEM support to of_get_mac_address") Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: fix less than zero check on a u32 variableColin Ian King2019-05-071-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The signed return from the call to mvpp2_cls_c2_port_flow_index is being assigned to the u32 variable c2.index and then checked for a negative error condition which is always going to be false. Fix this by assigning the return to the int variable index and checking this instead. Addresses-Coverity: ("Unsigned compared against 0") Fixes: 90b509b39ac9 ("net: mvpp2: cls: Add Classification offload support") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Remove set but not used variable 'act'YueHaibing2019-05-051-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c: In function 'mvpp2_cls_c2_build_match': drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c:1159:28: warning: variable 'act' set but not used [-Wunused-but-set-variable] It is never used since introduction in commit 90b509b39ac9 ("net: mvpp2: cls: Add Classification offload support") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Allow dropping packets with classification offloadMaxime Chevallier2019-05-013-9/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces support for the "Drop" action in classification offload. This corresponds to the "-1" action with ethtool -N. This is achieved using the color marking actions available in the C2 engine, which associate a color to a packet. These colors can be either Green, Yellow or Red, Red meaning that the packet should be dropped. Green and Yellow colors are interpreted by the Policer, which isn't supported yet. This method of dropping using the Classifier is different than the already existing early-drop features, such as VLAN filtering and MAC UC/MC filtering, which are performed during the Parsing step, and therefore take precedence over classification actions. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Add Classification offload supportMaxime Chevallier2019-05-014-12/+410
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces basic classification offloading support for the PPv2 controller. The PPv2 classifier has many classification engines, for now we only use the C2 TCAM match engine. This engine allows to perform ternary lookups on 64 bits keys (called Header Extracted Key), that are built by extracting fields from the packet header and concatenating them. At most 4 fields can be extracted for a single lookup. This basic implementation allows to build the HEK from the following fields : - L4 source and destination ports (for UDP and TCP) More fields are to be added in the future. Classification flows are added through the ethtool interface, using the newly introduced flow_rule infrastructure as an internal rule representation, allowing to more easily implement tc flower rules if need be. The internal design for now allocates one range of 4 rules per port due to the internal design of the flow table, which uses 22 sub-flows. When inserting a classification rule, the rule is created in every relevant sub-flow. This low rule-count is a very simple design which reaches quickly the limitations of the flow table ordering, but guarantees that the rule ordering will always be respected. This commit only introduces support for the "steer to rxq" action. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Use a bitfield to represent the flow_typeMaxime Chevallier2019-05-012-69/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of today, the classification code is used only for RSS. We split the incoming traffic into multiple flows, that correspond to the ethtool flow_type parameter. We don't want to use the ethtool flow definitions such as TCP_V4_FLOW, for several reason : - We want to decorrelate the driver code from ethtool as much as possible, so that we can easily use other interfaces such as tc flower, - We want the flow_type to be a bitfield, so that we can match flows embedded into each other, such as TCP4 which is a subset of IP4. This commit does the conversion to the newer type. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Remove extra whitespace in mvpp2_cls_flow_writeMaxime Chevallier2019-05-011-3/+3
| | | | | | | | | | | | | | | | Cosmetic patch removing extra whitespaces when writing the flow_table entries Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvneta: Switch to using devm_alloc_etherdev_mqsRosen Penev2019-04-241-8/+4Star
| | | | | | | | | | | | | | | | | | It allows some of the code to be simplified. Tested on Turris Omnia. Signed-off-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: move skb->xmit_more hint to softnet dataFlorian Westphal2019-04-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two reasons for this. First, the xmit_more flag conceptually doesn't fit into the skb, as xmit_more is not a property related to the skb. Its only a hint to the driver that the stack is about to transmit another packet immediately. Second, it was only done this way to not have to pass another argument to ndo_start_xmit(). We can place xmit_more in the softnet data, next to the device recursion. The recursion counter is already written to on each transmit. The "more" indicator is placed right next to it. Drivers can use the netdev_xmit_more() helper instead of skb->xmit_more to check the "more packets coming" hint. skb->xmit_more is retained (but always 0) to not cause build breakage. This change takes care of the simple s/skb->xmit_more/netdev_xmit_more()/ conversions. Remaining drivers are converted in the next patches. Suggested-by: Eric Dumazet <edumazet@google.com> Signed-off-by: Florian Westphal <fw@strlen.de> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvneta: Add 2500BaseT supportMaxime Chevallier2019-03-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some PHYs will use the 2500BaseX PHY_INTERFACE_MODE when being linked with a partner using 2.5GBaseT. Since we can't autonegotiate this speed between the MAC and the PHY, we need to have the proper comphy support enabled, to make sure we can safely advertise 2.5G and 1G in BaseT and be able to switch between both corresponding PHY interface modes. This is now possible since comphy support was added to this driver. This commit adds the 2500BaseT mode to the list of supported modes when using 2500BaseX, and was tested on a setup with an Armada385 and a 88E2010 PHY, both with and without the comphy node in the DT. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Rework C2 engine macrosMaxime Chevallier2019-03-271-21/+7Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The C2 classification engine has a 256 entry TCAM, used for ternary matches on an 8 byte Header Extracted Key. For now, we compute the various indices for classification and RSS that use this engine thanks to a set of macros. This commit mainly renames the macros used to make it clear that they should be used with the C2 engine, but also make use of the full 256 entries in the engine. For now, the C2 entries are only used for RSS. These entries are put at the end of the TCAM range, in case we want to add higher priority matches later on. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Initialize lookup priorities for all entries in the flowMaxime Chevallier2019-03-271-13/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When classifying a packet pertaining to a given flow, the classifier will issue multiple lookup commands until it finds one with the 'last' bit set. It expects all prorities to be assign continuously (although not necessarily in an ordered fashion) from 0 to the number of lookups. We can initialize this once, and make sure unused lookups are given an empty port map. This avoids having to maintain priorities and the information of which lookup is the last. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Invalidate all C2 entries except the ones we useMaxime Chevallier2019-03-273-0/+30
| | | | | | | | | | | | | | | | C2 TCAM entries can be invalidated to avoid unwanted matches. Make sure all entries are invalidated at init, then validate only the ones we use. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Rename the flow table macrosMaxime Chevallier2019-03-273-15/+14Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Flow Table dictates what lookups will be issued for each flow type. The lookup sequence for each flow is similar, and the index of each lookup is computed by some macros. There are similar mechanisms for the C2 TCAM lookups, so in order to avoid confusion, rename the flow table index computing macros with a common prefix. The only difference in behaviour is that we now use the very first entry in the flow for the RSS lookup (the first entry was previously unused). Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Don't use the sequence attribute for classificationMaxime Chevallier2019-03-272-18/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | The classifier allows to combine multiple lookups in one "sequence" that is counted as a single lookup to an engine, with a single result. We don't actually use that feature, so remove any places where we set this field, so that the classifier doesn't try to interpret these fields. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Rename classifer per-port functionsMaxime Chevallier2019-03-273-10/+9Star
| | | | | | | | | | | | | | | | | | | | This commit renames some of the classifier functions to follow the naming 'mvpp2_port_*' that's used for function that act on a given port. This commit is purely cosmetic. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Move C2 read/write helpers aroundMaxime Chevallier2019-03-271-41/+41
| | | | | | | | | | | | | | | | Move C2 read/write helpers higher in the file to ease future work that rely on these helpers Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Write C2 TCAM data last when writing a C2 entryMaxime Chevallier2019-03-271-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | When writing a C2 entry to hardware, some registers writes will only take effect when the TCAM_DATA4 register is written. This includes all C2 TCAM registers, and the C2 invalidate register. To make sure we always write C2 entries correctly, document that behaviour with a comment, and move TCAM writes to the end of the mvpp2_cls_c2_write helper. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Use iterators to go through the cls_tableMaxime Chevallier2019-03-272-8/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cls_table is a global read-only table containing the different parameters that are used by various tables in the classifier. It describes the links between the Header Parser, the decoding table and the flow_table. There are several possible way we want to iterate over that table, depending on wich classifier engine we want to configure. For the Header Parser, we want to iterate over each entry. For the Decoding table, we want to iterate over each entry having a unique flow_id. Finally, when configuring an ethtool flow, we want to iterate over each entry having a unique flow_id and that has a given flow_type. This commit introduces some iterator to both provide syntactic sugar and also clarify the way we want to iterate over the table. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: debugfs: Allow reading the C2 engine table from debugfsMaxime Chevallier2019-03-271-17/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | PPv2's Classifier uses multiple engines to perform classification. So far, only the C2 engine is used, which has a 256 entries TCAM. So far, we only accessed the relevant entries from the C2 engines, which are the one implementing RSS. To implement and debug ntuple classification offload, beaing able to see the hit count for each C2 entry is helpful, so this commit moves the logic to a dedicated directory allowing to access each entry. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: debugfs: Allow reading the flow table from debugfsMaxime Chevallier2019-03-271-6/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Classifier flow table is the central part of the PPv2 Classifier, since it describes all classification steps performed for each flow. It has 512 entries, shared between all ports, which are divided into sequences that are pointed-to by the decoding table. Being able to see which entries in the flow table were hit is a key point when implementing and debugging classification offload. This commit allows reading each flow table entry's hit count independently, with a clear-on-read behaviour. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: debugfs: Store debugfs entries data in mvpp2 structMaxime Chevallier2019-03-272-72/+26Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current way to store the required private data needed to access various debugfs entries is to alloc them on the fly, share them within the entries that need to access them, and finally have one entry free that data upon closing. This leads to hard to maintain code, and is very error-prone. This commit stores all debugfs related data in the same place, making sure this is allocated only when the debugfs directory is successfully created, so that we don't waste memory when we don't use this feature. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Make the flow definitions constMaxime Chevallier2019-03-273-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | The cls_flow table represent the overall configuration of the classifier, used to match the different traffic classes in the Parsing and Classification engines. This configuration is static, and applies to all PPv2 instances, we must therefore keep it const so that no modifications of this table are performed at runtime. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Rename MVPP2_N_FLOWS to MVPP2_N_PRS_FLOWSMaxime Chevallier2019-03-274-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | The macro definition MVPP2_N_FLOWS is ambiguous because it really represents the number of entries in the Header Parser that are used to identify the classification flows. Rename the macro to clearly state that we represent the number of flows in the Header Parser. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: use Lookup Type in classification enginesMaxime Chevallier2019-03-273-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PPv2 classifier allows to perform multiple lookups on the same engine when classifying a packet. These lookups can match similar parts of a packet header, but perform different actions upon matching. To differentiate these types of lookups, it's possible to specify a Lookup Type in the flow table entries, which will be part of the key for the lookup engines. This commit introduces the use of Lookup Types for C2 matches. Since for now we only perform C2 lookups to enable RSS, we only need one Lookup Type. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Start cls flow entries from beginning of tableMaxime Chevallier2019-03-271-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Classifier flow table has 512 entries, that contains lookups commands executed consecutively for every flow. Since we have 21 different flows, we have to carefully manage the flow table use. As of today, the start index of a lookup sequence is computed directly based in the flow->id. There are 8 reserved flow ids, from 0-7, which don't have any corresponding sequence in the flow table. We can therefore ignore them when computing the index, and make so that the first non-reserved flow point to the very beginning of the flow table. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Suggested-by: Alan Winkowski <walan@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: cls: Add missing MAC_DA field extractionMaxime Chevallier2019-03-271-0/+3
| | | | | | | | | | | | | | | | | | PPv2's classifier supports extracting the MAC Destination Address from the L2 header to perform RSS and flow steering. Add the missing case when setting the Header Extracted Key fields in the flow table. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: mvpp2: Don't use an int to store netdev_features_tMaxime Chevallier2019-03-271-1/+1
| | | | | | | | | | | | | | | | int is not long enough to store all netdev_features, use the correct dedicated type to store them when building the list of dev->features. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | drivers: Remove explicit invocations of mmiowb()Will Deacon2019-04-081-4/+0Star
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | mmiowb() is now implied by spin_unlock() on architectures that require it, so there is no reason to call it from driver code. This patch was generated using coccinelle: @mmiowb@ @@ - mmiowb(); and invoked as: $ for d in drivers include/linux/qed sound; do \ spatch --include-headers --sp-file mmiowb.cocci --dir $d --in-place; done NOTE: mmiowb() has only ever guaranteed ordering in conjunction with spin_unlock(). However, pairing each mmiowb() removal in this patch with the corresponding call to spin_unlock() is not at all trivial, so there is a small chance that this change may regress any drivers incorrectly relying on mmiowb() to order MMIO writes between CPUs using lock-free synchronisation. If you've ended up bisecting to this commit, you can reintroduce the mmiowb() calls using wmb() instead, which should restore the old behaviour on all architectures other than some esoteric ia64 systems. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
* sky2: Disable MSI on Dell Inspiron 1545 and Gateway P-79Kai-Heng Feng2019-03-041-1/+23
| | | | | | | | | | | | | | | | | Some sky2 chips fire IRQ after S3, before the driver is fully resumed: [ 686.804877] do_IRQ: 1.37 No irq handler for vector This is likely a platform bug that device isn't fully quiesced during S3. Use MSI-X, maskable MSI or INTx can prevent this issue from happening. Since MSI-X and maskable MSI are not supported by this device, fallback to use INTx on affected platforms. BugLink: https://bugs.launchpad.net/bugs/1807259 BugLink: https://bugs.launchpad.net/bugs/1809843 Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: set the GMAC, XLG MAC, XPCS and MPCS in reset when a port is downAntoine Tenart2019-03-021-0/+3
| | | | | | | | | | This patch adds calls in the stop() helper to ensure both MACs and both PCS blocks are set in reset when the user manually sets a port down. This is done so that we have the exact same block reset states at boot time and when a port is set down. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: set the XPCS and MPCS in reset when not usedAntoine Tenart2019-03-022-8/+59
| | | | | | | | | | This patch sets both the XPCS and MPCS blocks in reset when they aren't used. This is done both at boot time and when reconfiguring a port mode. The advantage now is that only the PCS used is set out of reset when the port is configured (10GKR uses the MCPS while RXAUI uses the XPCS). Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: reset the MACs when reconfiguring a portAntoine Tenart2019-03-021-0/+3
| | | | | | | | | | This patch makes sure both PPv2 MACs (GMAC + XLG MAC) are set in reset while a port is reconfigured. This is done so that we make sure a MAC is in a reset state when not used, as only one of the two will be set out of reset after the port is configured properly. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: rework the XLG MAC reset handlingAntoine Tenart2019-03-021-9/+18
| | | | | | | | | | | | This patch reworks the way the XLG MAC is set in reset: the XLG MAC is set in reset at probe time and taken out of this state only when used. The idea is to move forward a situation where only the blocks used are taken out of reset. This also has the effect to handle the GMAC and the XLG MAC in a similar way (the GMAC already is set in reset at boot time). Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: force the XLG MAC link up or down when not using in-bandAntoine Tenart2019-03-022-10/+27
| | | | | | | | | | This patch force the XLG MAC link state in the phylink link_up() and link_down() helpers when not using in-band auto-negotiation. This mimics what's already done for the GMAC and follows what's advised in the phylink documentation. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: only update the XLG configuration when neededAntoine Tenart2019-03-021-5/+8
| | | | | | | | | | | This patch improves the XLG configuration function, to only update the XLG configuration register when a change is needed. This helps not writing over and over the same XLG configuration each time phylink request the MAC to be configured. This mimics the GMAC configuration function. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: always disable both MACs when disabling a portAntoine Tenart2019-03-021-4/+4
| | | | | | | | | | | | | | This patch modifies the port_disable() helper to always disable both the GMAC and the XLG MAC when called. At boot time we do not know of a port was enabled in the firmware/bootloader, and if so what mode was used (hence which of the two MACs was used). This also help in implementing a logic where all blocks are disabled when not used, and only enabled regarding the current mode used on a given port. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: some AN fields require the link to be down when updatedAntoine Tenart2019-03-021-1/+11
| | | | | | | | | | | | | The GMAC configuration helper modifies values in the auto-negotiation register. Some of its values require the port to be forced down when modifying their values. This patches fixes the check made on the bit to be updated in this register, so that the port is forced down when needed. This fix cases where some of those parameters were updated, but not taken into account, such as when using RGMII interfaces. Fixes: d14e078f23cc ("net: marvell: mvpp2: only reprogram what is necessary on mac_config") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: fix the computation of the RXQsAntoine Tenart2019-03-022-10/+17
| | | | | | | | | | | | | | | | | | | | | The patch fixes the computation of RXQs being used by the PPv2 driver, which is set depending on the PPv2 engine version and the queue mode used. There are three cases: - PPv2.1: 1 RXQ per CPU. - PPV2.2 with MVPP2_QDIST_MULTI_MODE: 1 RXQ per CPU. - PPv2.2 with MVPP2_QDIST_SINGLE_MODE: 1 RXQ is shared between the CPUs. The PPv2 engine supports a maximum of 32 queues per port. This patch adds a check so that we do not overstep this maximum. It appeared the calculation was broken for PPv2.1 engines since f8c6ba8424b0, as PPv2.1 ports ended up with a single RXQ while they needed 4. This patch fixes it. Fixes: f8c6ba8424b0 ("net: mvpp2: use only one rx queue per port per CPU") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: fix validate for PPv2.1Antoine Tenart2019-03-021-1/+1
| | | | | | | | | | | | The Phylink validate function is the Marvell PPv2 driver makes a check on the GoP id. This is valid an has to be done when using PPv2.2 engines but makes no sense when using PPv2.1. The check done when using an RGMII interface makes sure the GoP id is not 0, but this breaks PPv2.1. Fixes it. Fixes: 0fb628f0f250 ("net: mvpp2: fix phylink handling of invalid PHY modes") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: reconfiguring the port interface is PPv2.2 specificAntoine Tenart2019-03-021-8/+6Star
| | | | | | | | | This patch adds a check on the PPv2 version in-use not to reconfigure the port mode when an interface is updated when using PPv2.1 as the functions called are PPv2.2 specific. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: a port can be disabled even if we use the link IRQAntoine Tenart2019-03-021-7/+0Star
| | | | | | | | | | We had a check in the mvpp2_mac_link_down() function (called by phylink) to avoid disabling the port when link interrupts are used. It turned out the interrupt can still be used with the port disabled. We can thus remove this check. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: fix alignment of MVPP2_GMAC_CONFIG_MII_SPEED definitionAntoine Tenart2019-03-021-1/+1
| | | | | | | | Cosmetic patch fix the alignment of the MVPP2_GMAC_CONFIG_MII_SPEED macro definition. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: update the port documentation regarding the GoPAntoine Tenart2019-03-021-1/+1
| | | | | | | | | The Marvell PPv2 port structure stores the GoP id of a given port. This information is specific to PPv2.2, but cannot be used by PPv2.1. Update its comment to denote this specificity. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: fix a typo in the headerAntoine Tenart2019-03-021-1/+1
| | | | | | | | This cosmetic patch fixes a typo made in a comment in the Marvell PPv2 Ethernet driver header. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: marvell: neta: disable comphy when setting modeMarek Behún2019-03-011-5/+23
| | | | | | | | | | | | | | | | | | | The comphy driver for Armada 3700 by Miquèl Raynal (which is currently in linux-next) does not actually set comphy mode when phy_set_mode_ext is called. The mode is set at next call of phy_power_on. Update the driver to semantics similar to mvpp2: helper mvneta_comphy_init sets comphy mode and powers it on. When mode is to be changed in mvneta_mac_config, first power the comphy off, then call mvneta_comphy_init (which sets the mode to new one). Only do this when new mode is different from old mode. This should also work for Armada 38x, since in that comphy driver methods power_on and power_off are unimplemented. Signed-off-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mvpp2: Add 2.5GBaseT supportMaxime Chevallier2019-02-251-0/+1
| | | | | | | | | | The PPv2 controller is able to support 2.5G speeds, allowing to use 2.5GBASET in conjunction with PHYs that use 2500BASEX as their MII interface when using this mode. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2019-02-241-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Three conflicts, one of which, for marvell10g.c is non-trivial and requires some follow-up from Heiner or someone else. The issue is that Heiner converted the marvell10g driver over to use the generic c45 code as much as possible. However, in 'net' a bug fix appeared which makes sure that a new local mask (MDIO_AN_10GBT_CTRL_ADV_NBT_MASK) with value 0x01e0 is cleared. Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: marvell: mvneta: fix DMA debug warningRussell King2019-02-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting 4.20 on SolidRun Clearfog issues this warning with DMA API debug enabled: WARNING: CPU: 0 PID: 555 at kernel/dma/debug.c:1230 check_sync+0x514/0x5bc mvneta f1070000.ethernet: DMA-API: device driver tries to sync DMA memory it has not allocated [device address=0x000000002dd7dc00] [size=240 bytes] Modules linked in: ahci mv88e6xxx dsa_core xhci_plat_hcd xhci_hcd devlink armada_thermal marvell_cesa des_generic ehci_orion phy_armada38x_comphy mcp3021 spi_orion evbug sfp mdio_i2c ip_tables x_tables CPU: 0 PID: 555 Comm: bridge-network- Not tainted 4.20.0+ #291 Hardware name: Marvell Armada 380/385 (Device Tree) [<c0019638>] (unwind_backtrace) from [<c0014888>] (show_stack+0x10/0x14) [<c0014888>] (show_stack) from [<c07f54e0>] (dump_stack+0x9c/0xd4) [<c07f54e0>] (dump_stack) from [<c00312bc>] (__warn+0xf8/0x124) [<c00312bc>] (__warn) from [<c00313b0>] (warn_slowpath_fmt+0x38/0x48) [<c00313b0>] (warn_slowpath_fmt) from [<c00b0370>] (check_sync+0x514/0x5bc) [<c00b0370>] (check_sync) from [<c00b04f8>] (debug_dma_sync_single_range_for_cpu+0x6c/0x74) [<c00b04f8>] (debug_dma_sync_single_range_for_cpu) from [<c051bd14>] (mvneta_poll+0x298/0xf58) [<c051bd14>] (mvneta_poll) from [<c0656194>] (net_rx_action+0x128/0x424) [<c0656194>] (net_rx_action) from [<c000a230>] (__do_softirq+0xf0/0x540) [<c000a230>] (__do_softirq) from [<c00386e0>] (irq_exit+0x124/0x144) [<c00386e0>] (irq_exit) from [<c009b5e0>] (__handle_domain_irq+0x58/0xb0) [<c009b5e0>] (__handle_domain_irq) from [<c03a63c4>] (gic_handle_irq+0x48/0x98) [<c03a63c4>] (gic_handle_irq) from [<c0009a10>] (__irq_svc+0x70/0x98) ... This appears to be caused by mvneta_rx_hwbm() calling dma_sync_single_range_for_cpu() with the wrong struct device pointer, as the buffer manager device pointer is used to map and unmap the buffer. Fix this. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2019-02-202-2/+7
|\| | | | | | | | | | | | | Two easily resolvable overlapping change conflicts, one in TCP and one in the eBPF verifier. Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-09-21 02:49:30 +0200