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path: root/drivers/net/ethernet/stmicro/stmmac/Makefile
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* net: stmmac: Add OXNAS Glue DriverNeil Armstrong2016-11-031-0/+1
| | | | | | | | Add Synopsys Designware MAC Glue layer for the Oxford Semiconductor OX820. Acked-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2016-10-081-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late DT updates from Arnd Bergmann: "These updates have been kept in a separate branch mostly because they rely on updates to the respective clk drivers to keep the shared header files in sync. - The Renesas r8a7796 (R-Car M3-W) platform gets added, this is an automotive SoC similar to the ⅹ8a7795 chip we already support, but the dts changes rely on a clock driver change that has been merged for v4.9 through the clk tree. - The Amlogic meson-gxbb (S905) platform gains support for a few drivers merged through our tree, in particular the network and usb driver changes are required and included here, and also the clk tree changes. - The Allwinner platforms have seen a large-scale change to their clk drivers and the dts file updates must come after that. This includes the newly added Nextthing GR8 platform, which is derived from sun5i/A13. - Some integrator (arm32) changes rely on clk driver changes. - A single patch for lpc32xx has no such dependency but wasn't added until just before the merge window" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits) ARM: dts: lpc32xx: add device node for IRAM on-chip memory ARM: dts: sun8i: Add accelerometer to polaroid-mid2407pxe03 ARM: dts: sun8i: enable UART1 for iNet D978 Rev2 board ARM: dts: sun8i: add pinmux for UART1 at PG dts: sun8i-h3: add I2C0-2 peripherals to H3 SOC dts: sun8i-h3: add pinmux definitions for I2C0-2 dts: sun8i-h3: associate exposed UARTs on Orange Pi Boards dts: sun8i-h3: split off RTS/CTS for UART1 in seperate pinmux dts: sun8i-h3: add pinmux definitions for UART2-3 ARM: dts: sun9i: a80-optimus: Disable EHCI1 ARM: dts: sun9i: cubieboard4: Add AXP806 PMIC device node and regulators ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulators ARM: dts: sun9i: cubieboard4: Declare AXP809 SW regulator as unused ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unused ARM: dts: sun8i: Add touchscreen node for sun8i-a33-ga10h ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2809pxe04 ARM: dts: sun8i: Add touchscreen node for sun8i-a23-polaroid-mid2407pxe03 ARM: dts: sun8i: Add touchscreen node for sun8i-a23-inet86dz ARM: dts: sun8i: Add touchscreen node for sun8i-a23-gt90h ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes ...
| * net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMACMartin Blumenstingl2016-09-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Ethernet controller available in Meson8b and GXBB SoCs is a Synopsys DesignWare MAC IP core which is already supported by the stmmac driver. In addition to the standard stmmac driver some Meson8b / GXBB specific registers have to be configured for the PHY clocks. These SoC specific registers are called PRG_ETHERNET_ADDR0 and PRG_ETHERNET_ADDR1 in the datasheet. These registers are not backwards compatible with those on Meson 6b, which is why a new glue driver is introduced. This worked for many boards because the bootloader programs the PRG_ETHERNET registers correctly. Additionally the meson6-dwmac driver only sets bit 1 of PRG_ETHERNET_ADDR0 which (according to the datasheet) is only used during reset. Currently all configuration values can be determined automatically, based on the configured phy-mode (which is mandatory for the stmmac driver). If required the tx-delay and the mux clock (so it supports the MPLL2 clock as well) can be made configurable in the future. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* | net: ethernet: dwmac: add Ethernet glue logic for stm32 chipAlexandre TORGUE2016-09-011-0/+1
|/ | | | | | | | | | | | | stm324xx family chips support Synopsys MAC 3.510 IP. This patch adds settings for logical glue logic: -clocks -mode selection MII or RMII. Reviewed-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Tested-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: Add TSE PCS support to dwmac-socfpgaTien Hock Loh2016-07-111-1/+2
| | | | | | | | | This adds support for TSE PCS that uses SGMII adapter when the phy-mode of the dwmac is set to sgmii. Signed-off-by: Tien Hock Loh <thloh@altera.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add GMAC4 core supportAlexandre TORGUE2016-04-031-1/+1
| | | | | | | | | | | This is the initial support for GMAC4 that includes the main callbacks to setup the core module: including Csum, basic filtering, mac address and interrupt (MMC, MTL, PMT) No LPI added. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add DMA support for GMAC 4.xxAlexandre TORGUE2016-04-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMA behavior is linked to descriptor management: -descriptor mechanism (Tx for example, but it is exactly the same for RX): -useful registers: -DMA_CH#_TxDesc_Ring_Len: length of transmit descriptor ring -DMA_CH#_TxDesc_List_Address: start address of the ring -DMA_CH#_TxDesc_Tail_Pointer: address of the last descriptor to send + 1. -DMA_CH#_TxDesc_Current_App_TxDesc: address of the current descriptor -The descriptor Tail Pointer register contains the pointer to the descriptor address (N). The base address and the current descriptor decide the address of the current descriptor that the DMA can process. The descriptors up to one location less than the one indicated by the descriptor tail pointer (N-1) are owned by the DMA. The DMA continues to process the descriptors until the following condition occurs: "current descriptor pointer == Descriptor Tail pointer" Then the DMA goes into suspend mode. The application must perform a write to descriptor tail pointer register and update the tail pointer to have the following condition and to start a new transfer: "current descriptor pointer < Descriptor tail pointer" The DMA automatically wraps around the base address when the end of ring is reached. Up to 8 DMA could be use but currently we only use one (channel0) Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add descriptors function for GMAC 4.xxAlexandre TORGUE2016-04-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of main changes of GMAC 4.xx IP is descriptors management. -descriptors are only used in ring mode. -A descriptor is composed of 4 32bits registers (no more extended descriptors) -descriptor mechanism (Tx for example, but it is exactly the same for RX): -useful registers: -DMA_CH#_TxDesc_Ring_Len: length of transmit descriptor ring -DMA_CH#_TxDesc_List_Address: start address of the ring -DMA_CH#_TxDesc_Tail_Pointer: address of the last descriptor to send + 1. -DMA_CH#_TxDesc_Current_App_TxDesc: address of the current descriptor -The descriptor Tail Pointer register contains the pointer to the descriptor address (N). The base address and the current descriptor decide the address of the current descriptor that the DMA can process. The descriptors up to one location less than the one indicated by the descriptor tail pointer (N-1) are owned by the DMA. The DMA continues to process the descriptors until the following condition occurs: "current descriptor pointer == Descriptor Tail pointer" Then the DMA goes into suspend mode. The application must perform a write to descriptor tail pointer register and update the tail pointer to have the following condition and to start a new transfer: "current descriptor pointer < Descriptor tail pointer" The DMA automatically wraps around the base address when the end of ring is reached. -New features are available on IP: -TSO (TCP Segmentation Offload) for TX only -Split header: to have header and payload in 2 different buffers Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add ipq806x glue layerMathieu Olivari2015-05-311-0/+1
| | | | | | | | | | | The ethernet controller available in IPQ806x is a Synopsys DesignWare Gigabit MAC IP core, already supported by the stmmac driver. This glue layer implements some platform specific settings required to get the controller working on an IPQ806x based platform. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: convert dwmac-sunxi to platform driverJoachim Eastwood2015-05-151-1/+2
| | | | | | | | Convert platform glue layer into a proper platform driver and add it to the build system. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: convert dwmac-sti to platform driverJoachim Eastwood2015-05-151-1/+1
| | | | | | | | Convert platform glue layer into a proper platform driver and add it to the build system. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: convert dwmac-socfpga to platform driverJoachim Eastwood2015-05-151-1/+2
| | | | | | | | Convert platform glue layer into a proper platform driver and add it to the build system. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: convert dwmac-rk to platform driverJoachim Eastwood2015-05-151-1/+2
| | | | | | | | Convert platform glue layer into a proper platform driver and add it to the build system. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: convert dwmac-meson to platform driverJoachim Eastwood2015-05-151-1/+2
| | | | | | | | Convert platform glue layer into a proper platform driver and add it to the build system. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: convert dwmac-lpc18xx to a platform driverJoachim Eastwood2015-05-151-1/+1
| | | | | | | | Convert platform glue layer into a proper platform driver and add it to the build system. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add a generic dwmac driverJoachim Eastwood2015-05-151-1/+3
| | | | | | | | | | Create a new driver around the generic device tree match strings in the stmmac platform code. This driver is intended to be used by all platforms that doesn't require any platform specific code to function or is using platform data. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add dwmac glue for NXP 18xx/43xx familyJoachim Eastwood2015-05-151-1/+2
| | | | | | | | | Add support for Ethernet on NXP LPC18xx and LPC43xx using the dwmac driver. This glue is required to setup phy interface mode, MII or RMII, on the SoC. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* GMAC: add driver for Rockchip RK3288 SoCs integrated GMACRoger Chen2015-01-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This driver is based on stmmac driver. changes since v2: - use tab instead of space for macros - use HIWORD_UPDATE macro for GMAC_CLK_RX_DL_CFG and GMAC_CLK_TX_DL_CFG - remove drive-strength setting in the driver and set it in the pinctrl settings - use dev_err instead of pr_err - remove clock names's macros, just use the real name of the clock - use devm_clk_get() instead of clk_get() - remove clk_set_parent(bsp_priv->clk_mac, bsp_priv->clk_mac_pll) - remove gpio setting for LDO, just use regulator API - remove phy reset using gpio in the glue layer, it has been handled in the stmmac driver - remove handling phy interrupt (mii interrupt) changes since v1: - use BIT() to set register - combine two remap_write() operations into one for the same register - use macros for register value setting - remove grf fail check in rk_gmac_setup() and save all the check in set_rgmii_speed() - remove .tx_coe=1 in rk_gmac_data Signed-off-by: Roger Chen <roger.chen@rock-chips.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: split to core library and probe driversAndy Shevchenko2014-11-111-6/+9
| | | | | | | | | | | | | Instead of registering the platform and PCI drivers in one module let's move necessary bits to where it belongs. During this procedure we convert the module registration part to use module_*_driver() macros which makes code simplier. >From now on the driver consists three parts: core library, PCI, and platform drivers. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: remove specific SoC Koption from platform.Giuseppe CAVALLARO2014-11-051-5/+3Star
| | | | | | | | | | | This patch removes all the Koptions added to build the glue-logic files for all different architectures: DWMAC_MESON, DWMAC_SUNXI, DWMAC_STI ... Nowadays the stmmac needs to be compiled on several platforms; in some case it very convenient to guarantee that its build is always completed with success on all the branches where the driver is present. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: stmmac: add Amlogic Meson glue layerBeniamino Galvani2014-09-261-0/+1
| | | | | | | | | | | | The Ethernet controller available in Meson6 and Meson8 SoCs is a Synopsys DesignWare MAC IP core, already supported by the stmmac driver. This glue layer implements some platform-specific settings needed by the Amlogic variant. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: stmmac: Add SOCFPGA glue driverDinh Nguyen2014-03-281-0/+1
| | | | | | | | | | | Like the STi and sunxi series SOCs, Altera's SOCFPGA also needs a glue layer on top of the Synopsys gmac IP. This patch adds the platform driver for the glue layer which configures the IP before the generic STMMAC driver takes over. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: stmmac:sti: Add STi SOC glue driver.Srinivas Kandagatla2014-02-131-0/+1
| | | | | | | | | | | | STi series SOCs have a glue layer on top of the synopsis gmac IP, this glue layer needs to be configured before the gmac driver starts using the IP. This patch adds a support to this glue layer which is configured via stmmac setup, init, exit callbacks. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: stmmac: sunxi platform extensions for GMAC in Allwinner A20 SoC'sChen-Yu Tsai2014-01-201-0/+1
| | | | | | | | | | | | | | | The Allwinner A20 has an ethernet controller that seems to be an early version of Synopsys DesignWare MAC 10/100/1000 Universal, which is supported by the stmmac driver. Allwinner's GMAC requires setting additional registers in the SoC's clock control unit. The exact version of the DWMAC IP that Allwinner uses is unknown, thus the exact feature set is unknown. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add the support for PTP hw clock driverRayagond Kokatanur2013-03-261-1/+1
| | | | | | | | | | | | This patch implements PHC (ptp hardware clock) driver for stmmac driver to support 1588 PTP. V2: added support for FINE method, reduced loop delay and review spinlock. Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add IEEE PTPv1 and PTPv2 support.Rayagond Kokatanur2013-03-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enhances the stmmac driver to support IEEE 1588-2002 PTP (Precision Time Protocol) version 1 and IEEE 1588-2008 PPT version 2. Precision Time Protocol(PTP),which enables precise synchronization of clocks in measurement and control systems implemented with technologies such as network communication,local computing, & distributed objects. Both PTPv1 and PTPv2 is selected at run-time using the HW capability register. The PTPv1 TimeStamp support can be used on chips that have the normal descriptor structures and PTPv2 TimeStamp support can be used on chips that have the Extended descriptors(DES4-5-6-7). All such sanity checks are done and verified by using HW capability register. V2: in this version the ethtool support has been included in this patch; Koptions have been completely removed (previously added to select PTP and PTPv2). PTPv1 and PTPv2 is now added in a single patch instead of two patches. get_timestamp() and get_systemtime() L/H have been combined into single APIs. Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: reorganize chain/ring modes removing KoptionsGiuseppe CAVALLARO2013-03-261-4/+2Star
| | | | | | | | | | | | | | Previously we had two Koptions to decide if the stmmac had to use either a ring or a chain to manage its descriptors. This patch removes the Kernel configuration options and it allow us to use the chain mode by passing a module option. Ring mode continues to be the default. Also with this patch, it will be easier to validate the driver built and guarantee that all the two modes always compile fine. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: remove dead code for STMMAC_TIMER supportGiuseppe CAVALLARO2012-11-261-1/+0Star
| | | | | | | | | | The TIMER option is not longer supported and this code can be considered dead for this driver in the new kernel series. In fact, It was not updated at all and never used. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add the experimental PCI supportGiuseppe CAVALLARO2011-12-211-0/+2
| | | | | | | | | | | | | This patch adds the PCI support (as EXPERIMENTAL) this has been also tested on XLINX XC2V3000 FF1152AMT0221 D1215994A VIRTEX FPGA board. To support the PCI bus the main part has been reworked and both the platform and the PCI specific parts have been moved into different files. Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add CHAINED descriptor mode support (V4)Giuseppe CAVALLARO2011-10-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch enhances the STMMAC driver to support CHAINED mode of descriptor. STMMAC supports DMA descriptor to operate both in dual buffer(RING) and linked-list(CHAINED) mode. In RING mode (default) each descriptor points to two data buffer pointers whereas in CHAINED mode they point to only one data buffer pointer. In CHAINED mode each descriptor will have pointer to next descriptor in the list, hence creating the explicit chaining in the descriptor itself, whereas such explicit chaining is not possible in RING mode. First version of this work has been done by Rayagond. Then the patch has been reworked avoiding ifdef inside the C code. A new header file has been added to define all the functions needed for managing enhanced and normal descriptors. In fact, these have to be specialized according to the ring/chain usage. Two new C files have been also added to implement the helper routines needed to manage: jumbo frames, chain and ring setup (i.e. desc3). Signed-off-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: add MMC support exported via ethtool (v3)Giuseppe CAVALLARO2011-09-151-1/+2
| | | | | | | | | | | | | | This patch adds the MMC management counters support. MMC module is an extension of the register address space and all the hardware counters can be accessed via ethtoo -S ethX. Note that, the MMC interrupts remain masked and the logic to handle this kind of interrupt will be added later (if actually useful). Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* stmmac: Move the STMicroelectronics driverJeff Kirsher2011-08-121-0/+5
Move the STMicroelectronics driver into driver/net/ethernet/stmicro/ and make the necessary Kconfig and Makefile changes. CC: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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