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path: root/drivers/net/ethernet/ti/davinci_cpdma.h
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* net: ethernet: ti: davinci_cpdma: add set rate for a channelIvan Khoronzhuk2016-11-301-0/+5
| | | | | | | | | | | | | | | The cpdma has 8 rate limited tx channels. This patch adds ability for cpdma driver to use 8 tx h/w shapers. If at least one channel is not rate limited then it must have higher number, this is because the rate limited channels have to have higher priority then not rate limited channels. The channel priority is set in low-hi direction already, so that when a new channel is added with ethtool and it doesn't have rate yet, it cannot affect on rate limited channels. It can be useful for TSN streams and just in cases when h/w rate limited channels are needed. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: ti: davinci_cpdma: add weight function for channelsIvan Khoronzhuk2016-11-301-0/+1
| | | | | | | | | | The weight of a channel is needed to split descriptors between channels. The weight can depend on maximum rate of channels, maximum rate of an interface or other reasons. The channel weight is in percentage and is independent for rx and tx channels. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: ti: davinci_cpdma: move cpdma channel struct macroses to ↵Ivan Khoronzhuk2016-08-231-8/+1Star
| | | | | | | | | | | | | internals Keep the driver internals in C file. Currently it's not required for drivers to know rx or tx a channel is, except create function. So correct "channel create" function, and use all channel struct macroses only for internal use. Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: ti: cpsw: add multi queue supportIvan Khoronzhuk2016-08-231-0/+2
| | | | | | | | | | | | | | | | | | | | | The cpsw h/w supports up to 8 tx and 8 rx channels. This patch adds multi-queue support to the driver only, shaper configuration will be added with separate patch series. Default shaper mode, as before, priority mode, but with corrected priority order, 0 - is highest priority, 7 - lowest. The poll function handles all unprocessed channels, till all of them are free, beginning from hi priority channel. In dual_emac mode the channels are shared between two network devices, as it's with single-queue default mode. The statistic for every channel can be read with: $ ethtool -S ethX Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: ti: davinci_cpdma: split descs num between all channelsIvan Khoronzhuk2016-08-231-1/+1
| | | | | | | | | | | | Tx channels share same pool of descriptors. Thus one channel can block another if pool is emptied by one. But, the shaper should decide which channel is allowed to send packets. To avoid such impact of one channel on another, let every channel to have its own piece of pool. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: davinci_cpdma: remove excessive dump of register values to kernel logUwe Kleine-König2016-07-261-2/+0Star
| | | | | | | | | | | | Such a big dump of register values is hardly useful on a production system. Another downside of the now removed functions is that calling emac_dump_regs resulted in at least 87 calls to dev_info while holding a spinlock and having irqs off which is a big source of latency. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: ti: cpsw: remove rx_descs propertyIvan Khoronzhuk2016-06-181-0/+1
| | | | | | | | | | | | | | | | There is no reason in rx_descs property because davinici_cpdma driver splits pool of descriptors equally between tx and rx channels. That is, if number of descriptors 256, 128 of them are for rx channels. While receiving, the descriptor is freed to the pool and then allocated with new skb. And if in DT the "rx_descs" is set to 64, then 128 - 64 = 64 descriptors are always in the pool and cannot be used, for tx, for instance. It's not correct resource usage, better to set it to half of pool, then the rx pool can be used in full. It will not have any impact on performance, as anyway, the "redundant" descriptors were unused. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* net/davinci_cpdma: remove unused argument in cpdma_chan_submit()Sebastian Siewior2013-04-251-1/+1
| | | | | | | | | | The gfp_mask argument is not used in cpdma_chan_submit() and always set to GFP_KERNEL even in atomic sections. This patch drops it since it is unused. Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* drivers: net: davinci_cpdma: acknowledge interrupt properlyMugunthan V N2013-02-181-1/+6
| | | | | | | | | | | CPDMA interrupts are not properly acknowledged which leads to interrupt storm, only cpdma interrupt 0 is acknowledged in Davinci CPDMA driver. Changed cpdma_ctlr_eoi api to acknowledge 1 and 2 interrupts which are used for rx and tx respectively. Reported-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* driver: net: ethernet: davinci_cpdma: add support for directed packet and ↵Mugunthan V N2013-02-121-1/+3
| | | | | | | | | | source port detection * Introduced parameter to add port number for directed packet in cpdma_chan_submit * Source port detection macro with DMA descriptor status Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: ethernet: davinci_cpdma: Add boundary for rx and tx descriptorsMugunthan V N2013-01-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When there is heavy transmission traffic in the CPDMA, then Rx descriptors memory is also utilized as tx desc memory looses all rx descriptors and the driver stops working then. This patch adds boundary for tx and rx descriptors in bd ram dividing the descriptor memory to ensure that during heavy transmission tx doesn't use rx descriptors. This patch is already applied to davinci_emac driver, since CPSW and davici_dmac shares the same CPDMA, moving the boundry seperation from Davinci EMAC driver to CPDMA driver which was done in the following commit commit 86d8c07ff2448eb4e860e50f34ef6ee78e45c40c Author: Sascha Hauer <s.hauer@pengutronix.de> Date: Tue Jan 3 05:27:47 2012 +0000 net/davinci: do not use all descriptors for tx packets The driver uses a shared pool for both rx and tx descriptors. During open it queues fixed number of 128 descriptors for receive packets. For each received packet it tries to queue another descriptor. If this fails the descriptor is lost for rx. The driver has no limitation on tx descriptors to use, so it can happen during a nmap / ping -f attack that the driver allocates all descriptors for tx and looses all rx descriptors. The driver stops working then. To fix this limit the number of tx descriptors used to half of the descriptors available, the rx path uses the other half. Tested on a custom board using nmap / ping -f to the board from two different hosts. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* davinci*/tlan/cpmac: Move the Texas Instruments (TI) driversJeff Kirsher2011-08-121-0/+109
Move the Texas Instruments drivers to drivers/net/ethernet/ti/ and make the necessary Kconfig and Makefile changes. CC: Sriram <srk@ti.com> CC: Vinay Hegde <vinay.hegde@ti.com> CC: Cyril Chemparathy <cyril@ti.com> CC: Samuel Chessman <chessman@tux.org> CC: <torben.mathiasen@compaq.com> CC: Eugene Konev <ejka@imfi.kspu.ru> CC: Florian Fainelli <florian@openwrt.org> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>