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* pinctrl: sh-pfc: Remove obsolete r8a7778 platform_device_id entryGeert Uytterhoeven2015-10-201-3/+0Star
| | | | | | | | | | | | Since the removal of the r8a7778 legacy SoC code in commit 4baadb9e05c68962 ("ARM: shmobile: r8a7778: remove obsolete setup code"), r8a7778 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Remove obsolete r8a7779 platform_device_id entryGeert Uytterhoeven2015-10-201-3/+0Star
| | | | | | | | | | | | Since the removal of the r8a7779 legacy SoC code in commit c99cd90d98a98aa1 ("ARM: shmobile: r8a7779: Remove legacy SoC code"), r8a7779 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Rename .gpio_data[] to .pinmux_data[]Geert Uytterhoeven2015-10-201-2/+2
| | | | | | | | | | | The sh_pfc_soc_info.gpio_data[] array contains not only GPIO data, but also various other pinmux-related data (functions and marks). Every single driver already calls its local array pinmux_data[]. Hence rename the sh_pfc_soc_info member to "pinmux_data". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* pinctrl: sh-pfc: Initial R8A7795 PFC supportTakeshi Kihara2015-10-021-0/+6
| | | | | | | | | | Add PFC base support for the R8A7795 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Morimoto-san: updated] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: Remove obsolete r8a7740 platform_device_id entryGeert Uytterhoeven2015-07-161-3/+0Star
| | | | | | | | | | | | | Since the removal of the r8a7740 legacy SoC code in commit 44d88c754e57a6d9 ("ARM: shmobile: Remove legacy SoC code for R-Mobile A1"), r8a7740 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Remove obsolete sh73a0 platform_device_id entryGeert Uytterhoeven2015-07-161-3/+0Star
| | | | | | | | | | | | | Since the removal of the sh73a0 legacy SoC code in commit 9a9863987bf7307f ("ARM: shmobile: Remove legacy SoC code for SH-Mobile AG5"), sh73a0 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Convert to platform_get_*()Geert Uytterhoeven2015-07-161-25/+21Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the pin function controller (which can be a GPIO controller) is instantiated before the interrupt controllers, due to the ordering in the DTS, the irq domains for the interrupt controllers referenced by its "interrupts-extended" property cannot be found yet: irq: no irq domain found for /interrupt-controller@e61c0000 ! As the sh-pfc driver accesses the platform device's resources directly, it cannot find the (optional) IRQ resources, and thinks no interrupts are available. This may lead to failures later, when GPIOs are used as interupts: gpio-keys keyboard: Unable to claim irq 0; error -22 gpio-keys: probe of keyboard failed with error -22 To fix this, add support for deferred probing to sh-pfc, by converting the driver from direct platform device resource access to using the platform_get_resource() and platform_get_irq() helpers. Note that while this fixes the root cause worked around by commit e4ba0a9bddff3ba5 ("ARM: shmobile: r8a73a4: Move pfc node to work around probe ordering bug"), I strongly recommend against reverting the workaround now, as this would lead to lots of probe deferrals in drivers relying on pinctrl. This may be reconsidered once the DT code starts taking into account phandle dependencies during device instantation. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: add R8A7794 PFC supportHisashi Nakamura2015-06-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PFC support for the R8A7794 SoC including pin groups for some on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF... Sergei: squashed together several patches, fixed the MLB_CLK typo, added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin group names, removed stray new line and fixed typos in the comments in the pinmux_config_regs[] initializer, removed the platform device ID, took into account limited number of signals in the GPIO1/5/6 controllers, added reasonable and removed unreasonable copyrights, modified the bindings document, renamed, added changelog. Changes in version 5: - resolved rejects, refreshed the patch; - added Laurent Pinchart's ACK. Changes in version 4: - reused the PORT_GP_26() macro to #define PORT_GP_28(). Changes in version 3: - removed the platform device ID; - added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the CPU_ALL_PORT() macro. Changes in version 2: - rebased the patch. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Add r8a7793 supportUlrich Hecht2015-05-121-0/+6
| | | | | | | | | | Regarding pin control, r8a7791 and r8a7793 are identical, so it is sufficient to add an sh_pfc_soc_info structure to enable r8a7793 support. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Remove r8a73a4 platform_device_id entryGeert Uytterhoeven2015-05-121-3/+0Star
| | | | | | | | | | | | | As of commit 9d07d414d4c33d86 ("ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform"), r8a73a4 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Remove r8a7790 platform_device_id entryGeert Uytterhoeven2015-03-181-3/+0Star
| | | | | | | | | | The r8a7790 platform is now DT-only, the driver doesn't need to match platform devices by name anymore. Remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Remove emev2 platform_device_id entryGeert Uytterhoeven2015-03-181-3/+0Star
| | | | | | | | | | The emev2 platform is now DT-only, the driver doesn't need to match platform devices by name anymore. Remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Use u32 to store register addressesGeert Uytterhoeven2015-03-181-3/+3
| | | | | | | | | | | | | | | Currently all PFC registers lie in low 32-bit address space. Hence use u32 instead of unsigned long to store PFC register addresses in pinctrl tables. All calculations of virtual addresses use a phys_addr_t intermediate, so we know where to add an offset if the 32-bit assumption ever becomes false. While this doesn't impact 32-bit builds, it would save ca. 7 KiB on a 64-bit shmobile_defconfig kernel. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Use unsigned int for register/field widths and offsetsGeert Uytterhoeven2015-03-181-30/+29Star
| | | | | | | | | | | | | | As register and field widths and offsets are in the range 1..32, use unsigned int (mostly replacing unsigned long) to store them in local variables and for passing them around. Move to one variable per line, move variables to the beginning of the block where they are used, and drop superfluous initializations while we are at it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Store register/field widths in u8 instead of unsigned longGeert Uytterhoeven2015-03-181-1/+1
| | | | | | | | | | | | Register and field widths are in the range 1..32. Storing them in the pinctrl data in (arrays of) unsigned long wastes space. This decreases the size of a (32-bit) shmobile_defconfig kernel supporting 7 SoCs by 26460 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Use u32 to store register dataGeert Uytterhoeven2015-03-181-12/+13
| | | | | | | | | | | | As PFC registers are either 8, 16, or 32 bits wide, use u32 (mostly replacing unsigned long) to store (parts of) register values and masks. Switch the shadow register operations from {set,clear}_bit() to plain C bit operations, as the former can operate on long data only. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Remove r8a7791 platform_device_id entryLaurent Pinchart2015-03-091-3/+0Star
| | | | | | | | | | | The r8a7791 platform is now DT-only, the driver doesn't need to match platform devices by name anymore. Remove the corresponding platform_device_id entry. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: sh7372: Remove PFC supportMagnus Damm2015-01-291-9/+0Star
| | | | | | | | | Remove sh7372 PFC support as part of the sh7372 and Mackerel legacy code removal. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Add emev2 pinmux supportNiklas Söderlund2015-01-271-0/+9
| | | | | | | | | Add PFC support for the EMMA Mobile EV2 SoC including pin groups for on-chip devices. Signed-off-by: Niklas Söderlund <niso@kth.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: drop owner assignment from platform_driversWolfram Sang2014-10-201-1/+0Star
| | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* pinctrl: sh-pfc: sh73a0: Remove unnecessary SoC data allocationLaurent Pinchart2014-09-231-9/+1Star
| | | | | | | | | | The SoC data structure allocated at init time only holds a regulator pointer that is only used in the init function. Replace it with a local variable and get rid of the SoC data structure allocation altogether. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Support GPIO to IRQ mapping specified IRQ resourcesLaurent Pinchart2013-12-121-16/+53
| | | | | | | | | | | | | | | | | | On non-DT platforms IRQ controllers associated with the GPIOs have a fixed IRQ base value known at compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values are dynamic in that case. Fix this by specifying IRQs associated with GPIOs in IRQ resources, populated automatically from the device tree. When IRQ resources are specified the driver requires one IRQ resource per GPIO able to generate an interrupt, and uses the translation table to compute the IRQ resource offset instead of the IRQ number. Cc: devicetree@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Rename sh_pfc window field to windowsLaurent Pinchart2013-12-121-9/+10
| | | | | | | | There's more than one window, name the field windows. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Turn unsigned indices into unsigned intLaurent Pinchart2013-12-121-4/+4
| | | | | | | | Some indices take positive values only, make them unsigned. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: r8a7791 PFC supportHisashi Nakamura2013-10-271-0/+9
| | | | | | | | | | | | | | | | Add PFC support for the r8a7791 SoC V2 including pin groups for on-chip devices such as MSIOF, SCIF, USB, MMC, SDHI, DU. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com> Signed-off-by: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com> Signed-off-by: Nobuyuki HIRAI <nobuyuki.hirai.xe@renesas.com> Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> [damm@opensource.se: Forward ported to upstream, minor fixes] Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* pinctrl: sh-pfc: remove unnecessary platform_set_drvdata()Jingoo Han2013-08-281-2/+0Star
| | | | | | | | | | The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Support pins not associated with a GPIO portLaurent Pinchart2013-07-291-7/+15
| | | | | | | | | | | | | Pins with selectable functions but without a GPIO port can't be named PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in the pinmux pins array, naming them with the PIN_ prefix followed by the pin physical position. In order to make sure not to register those pins as GPIOs, add a SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* sh-pfc: Compute pin ranges automaticallyLaurent Pinchart2013-07-291-8/+62
| | | | | | | | | Remove the manually specified ranges from PFC SoC data and compute the ranges automatically. This prevents ranges from being out-of-sync with pins definitions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* sh-pfc: Replace pinmux_enum_id typedef with u16Laurent Pinchart2013-07-291-7/+6Star
| | | | | | | | | | The typedef only conceals the real variable type without bringing any additional value (see Documentation/CodingStyle, section 5.b). Moreover, it polutes the pinmux namespace. Replace it with the integer type it used to hide. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* sh-pfc: Remove unused input_pd and input_pu rangesLaurent Pinchart2013-07-291-8/+0Star
| | | | | | | The ranges are not used anymore, remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* Merge tag 'pinctrl-for-v3.11-1' of ↵Linus Torvalds2013-07-031-2/+63
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: - A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. * tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe() pinctrl: remove bindings for pinconf options needing more thought pinctrl: remove slew-rate parameter from tz1090 pinctrl: set unit for debounce time pinconfig to usec pinctrl: more clarifications for generic pull configs pinctrl: rip out the direct pinconf API pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver pinctrl-tz1090: add TZ1090 pinctrl driver pinctrl: samsung: Staticize drvdata_list pinctrl: rockchip: Add missing irq_gc_unlock() call before return error pinctrl: abx500: rework error path pinctrl: abx500: suppress hardcoded value pinctrl: abx500: factorize code pinctrl: abx500: fix abx500_gpio_get() pinctrl: abx500: fix abx500_pin_config_set() pinctrl: abx500: Add device tree support sh-pfc: Guard DT parsing with #ifdef CONFIG_OF pinctrl: add Intel BayTrail GPIO/pinctrl support pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc pinctrl: Staticize local symbols ... Conflicts: drivers/net/ethernet/ti/davinci_mdio.c drivers/pinctrl/Makefile
| * sh-pfc: Add DT supportLaurent Pinchart2013-06-181-1/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | Support device instantiation through the device tree. The compatible property is used to select the SoC pinmux information. Set the gpio_chip device field to the PFC device to enable automatic GPIO OF support. Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * sh-pfc: Remove support for platform dataLaurent Pinchart2013-06-181-2/+1Star
| | | | | | | | | | | | | | | | Platform data isn't used, support can thus be removed. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | sh-pfc: Add support for SoC-specific initializationLaurent Pinchart2013-06-051-1/+15
| | | | | | | | | | | | | | | | | | Add two optional init and exit SoC operations and call them from the core at probe and remove time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | sh-pfc: Add r8a7778 pinmux supportKuninori Morimoto2013-06-041-0/+3
| | | | | | | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms@verge.net.au>
* | sh-pfc: Initial r8a7790 PFC supportKoji Matsuoka2013-06-041-0/+3
|/ | | | | | | | | | | | | | | | Add initial PFC support for the r8a7790 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors is Koji Matsuoka-san, thanks for him and his team for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: Add r8a73a4 pinmux supportMagnus Damm2013-04-031-0/+3
| | | | | | | | | | | | | | | | | | Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: Configure pins as GPIOs at request time when handled externallyLaurent Pinchart2013-04-031-21/+16Star
| | | | | | | | | When a GPIO is handled by a separate driver the pinmux gpio_set_direction() handler won't be called. The pin mux type then need to be configured to GPIO at request time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: Fix compiler warning when BUG()Laurent Pinchart2013-04-021-0/+1
| | | | | | | | | The sh_pfc_phys_to_virt() function ends with a BUG() statement without a return. When CONFIG_BUG isn't set the function will thus have no return value. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: Convert message printing from pr_* to dev_*Laurent Pinchart2013-03-151-7/+7
| | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Use proper error codesLaurent Pinchart2013-03-151-9/+10
| | | | | | | Return proper error codes instead of -1, and propagate the error codes. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Constify all SoC dataLaurent Pinchart2013-03-151-9/+10
| | | | | | | None of the SoC data need to be modified. Constify it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Remove configuration dry-run and freeLaurent Pinchart2013-03-151-43/+7Star
| | | | | | | | | | | The purpose of the dry-run is to ensure that a pin about to be configured isn't in use. However, the current implementation is a no-op. This proves that the dry-run isn't essential. Remove it. Freeing configuration then becomes a no-op as well. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Don't modify sh_pfc_pin SoC dataLaurent Pinchart2013-03-151-10/+4Star
| | | | | | | | | | | The sh_pfc_pin structure supplied in SoC data contains information about pin configuration and name. It's abused to store GPIO data registers information and pin config type. Move those fields out of the pinmux_data_reg structure into the new sh_pfc_gpio_pin and sh_pfc_pin_config structures. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Drop unused support for 1:1 physical to virtual memory mappingsLaurent Pinchart2013-03-151-9/+6Star
| | | | | | | | | Now that all PFC platform devices provide memory resources support for registers without an associated memory resource isn't used anymore. Drop it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Don't map data registers individuallyLaurent Pinchart2013-03-151-1/+2
| | | | | | | | | | All data registers are located in the same memory resource. Locate the mapped resource at initializat time and use it directly instead of computing a mapped address for each register. This gets rid of the mapped_reg field of the pinmux_data_reg structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Move GPIO registers access functions to gpio.cLaurent Pinchart2013-03-151-105/+5Star
| | | | | | | | | | Move the sh_pfc_setup_data_regs(), sh_pfc_setup_data_reg(), sh_pfc_get_data_reg(), sh_pfc_read_bit() and sh_pfc_write_bit() function to gpio.c as they belong to the GPIO implementation. Inline sh_pfc_read_bit() and sh_pfc_write_bit() in their only call location. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Add support for sparse pin numbersLaurent Pinchart2013-03-151-1/+18
| | | | | | | | | | | | | The PFC driver assumes that the value of the GPIO_PORTxxx enumeration names are equal to the port number. This isn't true when the port number space is sparse, as with the SH73A0. Fix the issue by adding support for pin numbers ranges specified through SoC data. When no range is specified the driver considers that the PFC implements a single contiguous range for all pins. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Add function to retrieve a pin instance from its pin numberLaurent Pinchart2013-03-151-1/+6
| | | | | | | | This prepares support for sparse pin numbering. The function currently just performs and indexed lookup in the pins array. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Simplify the sh_pfc_gpio_is_pin() logicLaurent Pinchart2013-03-151-20/+9Star
| | | | | | | | The function is guaranteed to be called with a gpio number smaller than nr_pins. The condition can the be simplified, and the function inlined. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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