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* soc: ti: QMSS: Fix usage of irq_set_affinity_hintMarc Zyngier2018-11-023-14/+22
| | | | | | | | | | | | | | | | | | | The Keystone QMSS driver is pretty damaged, in the sense that it does things like this: irq_set_affinity_hint(irq, to_cpumask(&cpu_map)); where cpu_map is a local variable. As we leave the function, this will point to nowhere-land, and things will end-up badly. Instead, let's use a proper cpumask that gets allocated, giving the driver a chance to actually work with things like irqbalance as well as have a hypothetical 64bit future. Cc: stable@vger.kernel.org Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2018-10-2949-564/+1590
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "The most noteworthy SoC driver changes this time include: - The TEE subsystem gains an in-kernel interface to access the TEE from device drivers. - The reset controller subsystem gains a driver for the Qualcomm Snapdragon 845 Power Domain Controller. - The Xilinx Zynq platform now has a firmware interface for its platform management unit. This contains a firmware "ioctl" interface that was a little controversial at first, but the version we merged solved that by not exposing arbitrary firmware calls to user space. - The Amlogic Meson platform gains a "canvas" driver that is used for video processing and shared between different high-level drivers. The rest is more of the usual, mostly related to SoC specific power management support and core drivers in drivers/soc: - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new features related to power and reset control. - The Mediatek mt8183 and mt6765 SoC platforms gain support for their respective power management chips. - A new driver for NXP i.MX8, which need a firmware interface for power management. - The SCPI firmware interface now contains support estimating power usage of performance states - The NVIDIA Tegra "pmc" driver gains a few new features, in particular a pinctrl interface for configuring the pads. - Lots of small changes for Qualcomm, in particular the "smem" device driver. - Some cleanups for the TI OMAP series related to their sysc controller. Additional cleanups and bugfixes in SoC specific drivers include the Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits) firmware: tegra: bpmp: Implement suspend/resume support drivers: clk: Add ZynqMP clock driver dt-bindings: clock: Add bindings for ZynqMP clock driver firmware: xilinx: Add zynqmp IOCTL API for device control Documentation: xilinx: Add documentation for eemi APIs MAINTAINERS: imx: include drivers/firmware/imx path firmware: imx: add misc svc support firmware: imx: add SCU firmware driver support reset: Fix potential use-after-free in __of_reset_control_get() dt-bindings: arm: fsl: add scu binding doc soc: fsl: qbman: add interrupt coalesce changing APIs soc: fsl: bman_portals: defer probe after bman's probe soc: fsl: qbman: Use last response to determine valid bit soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers soc: fsl: qbman: Check if CPU is offline when initializing portals reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: Grammar s/more then once/more than once/ bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS ...
| * Merge tag 'soc-fsl-next-v4.20-2' of ↵Arnd Bergmann2018-10-089-16/+120
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers NXP/FSL SoC drivers updates for v4.20 take 2 - Update qbman driver to better work with CPU hotplug - Add Kconfig dependency of 64-bit DMA addressing for qbman driver - Use last reponse to determine valid bit for qbman driver - Defer bman_portals probe if bman is not probed - Add interrupt coalescing APIs to qbman driver * tag 'soc-fsl-next-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qbman: add interrupt coalesce changing APIs soc: fsl: bman_portals: defer probe after bman's probe soc: fsl: qbman: Use last response to determine valid bit soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers soc: fsl: qbman: Check if CPU is offline when initializing portals soc: fsl: qman_portals: defer probe after qman's probe soc: fsl: qbman: add APIs to retrieve the probing status soc: fsl: qe: Fix copy/paste bug in ucc_get_tdm_sync_shift() soc: fsl: qbman: qman: avoid allocating from non existing gen_pool Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * soc: fsl: qbman: add interrupt coalesce changing APIsMadalin Bucur2018-10-051-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | Add the APIs required to control the QMan portal interrupt coalescing settings. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: bman_portals: defer probe after bman's probeLaurentiu Tudor2018-10-051-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A crash in bman portal probing could not be triggered (as is the case with qman portals) but it does make calls [1] into the bman driver so lets make sure the bman portal probing happens after bman's. [1] bman_p_irqsource_add() (in bman) called by: init_pcfg() called by: bman_portal_probe() Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qbman: Use last response to determine valid bitRoy Pledge2018-10-051-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the last valid response when determining what valid bit to use next for management commands. This is needed in the case that the portal was previously used by other software like a bootloader or if the kernel is restarted without a hardware reset. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBManRoy Pledge2018-10-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QBMan block is memory mapped on SoCs above a 32 bit (4 Gigabyte) boundary so enabling 64 bit DMA addressing is needed for QBMan to be usuable. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlersMadalin Bucur2018-10-052-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | The existing code sets portal IRQ affinity to CPU 0 in the offline hotplug handler. If CPU 0 is offline this is invalid. Use a different online CPU instead. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qbman: Check if CPU is offline when initializing portalsRoy Pledge2018-10-053-8/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the CPU to affine the portal interrupt is offline at boot time affine the portal interrupt to another online CPU. If the CPU is later brought online the hotplug handler will correctly adjust the affinity. Moved common code in a function. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * Merge tag 'soc-fsl-fix-v4.19-2' into HEADLi Yang2018-10-055-1/+34
| | |\ | | | | | | | | | | | | | | | | | | | | NXP/FSL SoC driver fixes for v4.19 round 2 - Fix crash of qman_portal by deferring its probe if qman is not probed
| * | \ Merge tag 'imx-drivers-4.20' of ↵Arnd Bergmann2018-10-022-60/+66
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers i.MX drivers update for 4.20: - A couple of patches from Anson to update variable and macro naming in GPCv2 driver, as a preparation of reusing the driver on i.MX8. - Switch GPC/GPCv2 drivers to use SPDX identifier for licence claiming. - Clean up the unnecessary DT node name NULL pointer checking from imx-weim driver, since it can never be NULL at all. - A couple of improvements on GPC driver from Sven Schmitt to correct PDN register and use GPC_PGC_DOMAIN_* indexes for consistency. * tag 'imx-drivers-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: gpcv2: Switch to SPDX identifier soc: imx: gpc: Switch to SPDX identifier bus: imx-weim: drop unnecessary DT node name NULL check soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platforms soc: imx: gpc: use GPC_PGC_DOMAIN_* indexes soc: imx: gpc: fix PDN delay Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | soc: imx: gpcv2: Switch to SPDX identifierFabio Estevam2018-10-011-7/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpc: Switch to SPDX identifierFabio Estevam2018-10-011-7/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpcv2: make pgc driver more generic for other i.MX platformsAnson Huang2018-10-011-29/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they can reuse gpcv2 pgc driver for power domain control, this patch renames all functions and structure definitions started with "imx7" to "imx", and use .data in imx_gpcv2_dt_ids[] to pass platform specific power domain data for power domain driver, thus make gpcv2 pgc driver more generic for i.MX platforms. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platformsAnson Huang2018-10-011-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7 cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53 cores, so let's use A_CORE instread of A7 to avoid confusion. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpc: use GPC_PGC_DOMAIN_* indexesSven Schmitt2018-09-031-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use GPC_PGC_DOMAIN_* indexes consistent. Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpc: fix PDN delaySven Schmitt2018-09-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imx6_pm_domain_power_off() reads iso and iso2sw from GPC_PGC_PUPSCR_OFFS which stores the power up delays. So use GPC_PGC_PDNSCR_OFFS for the correct delays. Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | | Merge tag 'qcom-drivers-for-4.20' of ↵Arnd Bergmann2018-10-029-145/+183
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Qualcomm ARM Based Driver Updates for v4.20 * Refactor of SCM compatibles and clock requirements * SMEM cleanup * Add LLCC EDAC driver * Fixes for GENI clocks and macros * Fix includes for llcc-slice and smem * String overflow fixes for APR and wcnss_ctrl * Fixup for COMPILE_TEST of qcom driver Kconfigs * Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p * Add SCM dependencies to SPM and rmtfs-mem * tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (38 commits) soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get() soc: qcom: geni: Make version macros simpler dt-bindings: firmware: scm: Add MSM8998 and SDM845 firmware: qcom: scm: Refactor clock handling dt-bindings: firmware: scm: Refactor compatibles and clocks soc: qcom: smem: a few last cleanups soc: qcom: smem: verify partition host ids match soc: qcom: smem: small change in global entry loop soc: qcom: smem: verify partition offset_free_uncached soc: qcom: smem: verify partition header size soc: qcom: smem: introduce qcom_smem_partition_header() soc: qcom: smem: require order of host ids to match soc: qcom: smem: verify both host ids in partition header soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions() soc: qcom: smem: always ignore partitions with 0 offset or size soc: qcom: smem: initialize region struct only when successful soc: qcom: smem: rename variable in qcom_smem_get_global() drivers: qcom: rpmh-rsc: clear wait_for_compl after use soc: qcom: rmtfs-mem: Validate that scm is available ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | soc: qcom: smem: a few last cleanupsAlex Elder2018-09-131-9/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains several small cleanups: - In qcom_smem_enumerate_partitions(), change the "local_host" argument to have 16 bit unsigned type - Also in qcom_smem_enumerate_partitions(), change the type of the "host0" and "host1" local variables to be u16 - Fix error messages reporting host ids to use the right format specifier - Shorten the error messages as well, to fit on one line - Add a compile-time check to ensure the local host value passed to qcom_smem_enumerate_partitions() is in range Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: verify partition host ids matchAlex Elder2018-09-131-21/+15Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add verification in qcom_smem_partition_header() that the host ids found in a partition's header structure match those in its partition table entry. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: small change in global entry loopAlex Elder2018-09-131-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the logic in the loop that finds that global host entry in the partition table not require the host0 and host1 local variables. The next patch will remove them. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: verify partition offset_free_uncachedAlex Elder2018-09-131-14/+7Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add verification in qcom_smem_partition_header() that the offset_free_uncached field in a partition's header structure does not exceed the partition's size. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: verify partition header sizeAlex Elder2018-09-131-11/+8Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add verification in qcom_smem_partition_header() that the size in a partition's header structure matches the size in its partition table entry. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: introduce qcom_smem_partition_header()Alex Elder2018-09-131-14/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create a new function qcom_smem_partition_header() to encapsulate validating locating a partition header and validating information found within it. This will be built up over a few commits to make it more obvious how the common function is replacing duplicated code elsewhere. Initially it just verifies the header has the right magic number. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: require order of host ids to matchAlex Elder2018-09-131-8/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In qcom_smem_enumerate_partitions(), we find all partitions that have a given local host id in either its host0 or its host1 field in the partition table entry. We then verify that the header structure at the start of each partition also contains the same two host ids as is found in the table of contents. There is no requirement that the order of the two host ids be the same in the table of contents and in the partition header. This patch changes that, requiring host0 to in the partition table entry to equal host0 in the partition header structure (and similar for the host1 values). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: verify both host ids in partition headerAlex Elder2018-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The global partition is indicated by having both host values in its table of contents entry equal SMEM_GLOBAL_HOST=0xfffe. In qcom_smem_set_global_partition(), we check whether the header structure at the beginning of the partition contains that host value, but the check only verifies *one* of them. Change the check so the partition header must have SMEM_GLOBAL_HOST for *both* its host fields. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions()Alex Elder2018-09-131-4/+3Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Combine the code that checks whether a partition table entry is associated with the local host with the assignment of the remote host id value. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: always ignore partitions with 0 offset or sizeAlex Elder2018-09-131-13/+10Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In qcom_smem_enumerate_partitions(), any partition table entry having a zero offset or size field is ignored. Move those checks earlier in the loop, because there's no sense in examining the host fields for those entries. Add the same checks in qcom_smem_set_global_partition(), so the scan for the global partition skips over these invalid entries. This allows a later check for zero size or offset once the global entry is found to be eliminated. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: initialize region struct only when successfulAlex Elder2018-09-131-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hold off initializing anything for the array entry representing a memory region in qcom_smem_map_memory() until we know we've successfully mapped it. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: rename variable in qcom_smem_get_global()Alex Elder2018-09-131-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the variable "area" to be "region" in qcom_smem_get_global(), so its name better matches its type. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | drivers: qcom: rpmh-rsc: clear wait_for_compl after useLina Iyer2018-09-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wait_for_compl register ensures the request sequence is maintained when sending requests from the TCS. Clear the register after sending active request and during invalidate of the sleep and wake TCS. Reported-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: rmtfs-mem: Validate that scm is availableBjorn Andersson2018-09-131-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The scm device must be present in order for the rmtfs driver to configure memory permissions for the rmtfs memory region, so check that it is probed before continuing. Cc: stable@vger.kernel.org Fixes: fa65f8045137 ("soc: qcom: rmtfs-mem: Add support for assigning memory to remote") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: spm: add SCM probe dependencyFelix Fietkau2018-09-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for SCM availability before attempting to use SPM. SPM probe will fail otherwise. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: Allow COMPILE_TEST of qcom SoC KconfigsNiklas Cassel2018-09-131-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit cab673583d96 ("soc: Unconditionally include qcom Makefile"), we unconditionally include the soc/qcom/Makefile. This opens up the possibility to compile test the code even when building for other architectures. Allow COMPILE_TEST for all qcom SoC Kconfigs, except for two Kconfigs that depend on QCOM_SCM, since that triggers lots of build errors in qcom_scm. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: apr: Avoid string overflowNiklas Cassel2018-09-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'adev->name' is used as a NUL-terminated string, but using strncpy() with the length equal to the buffer size may result in lack of the termination: In function 'apr_add_device', inlined from 'of_register_apr_devices' at drivers//soc/qcom/apr.c:264:7, inlined from 'apr_probe' at drivers//soc/qcom/apr.c:290:2: drivers//soc/qcom/apr.c:222:3: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation] strncpy(adev->name, np->name, APR_NAME_SIZE); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ This changes it to use the safer strscpy() instead. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: wcnss_ctrl: Avoid string overflowNiklas Cassel2018-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'chinfo.name' is used as a NUL-terminated string, but using strncpy() with the length equal to the buffer size may result in lack of the termination: drivers//soc/qcom/wcnss_ctrl.c: In function 'qcom_wcnss_open_channel': drivers//soc/qcom/wcnss_ctrl.c:284:2: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation] strncpy(chinfo.name, name, sizeof(chinfo.name)); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ This changes it to use the safer strscpy() instead. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: Remove depends on OF from QCOM_RPMHNiklas Cassel2018-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QCOM_RPHM already selects ARM64, which always selects OF. Additionally, the rpmh driver only uses linux/of.h, which has dummy definitions for all functions, in order for code to to be able to build without CONFIG_OF set. Remove the superfluous depends on OF. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: Remove bogus depends on OF from QCOM_SMD_RPMNiklas Cassel2018-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QCOM_SMD_RPM builds perfectly fine without CONFIG_OF set. Remove the bogus depends on OF. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smsm: Add select IRQ_DOMAINNiklas Cassel2018-09-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN. This is needed in order to be able to remove the depends on ARCH_QCOM. drivers/soc/qcom/smsm.c: In function ‘smsm_inbound_entry’: drivers/soc/qcom/smsm.c:411:18: error: implicit declaration of function ‘irq_domain_add_linear’ entry->domain = irq_domain_add_linear(node, 32, &smsm_irq_ops, entry); ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smp2p: Add select IRQ_DOMAINNiklas Cassel2018-09-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN. This is needed in order to be able to remove the depends on ARCH_QCOM. drivers/soc/qcom/smp2p.c: In function ‘qcom_smp2p_inbound_entry’: drivers/soc/qcom/smp2p.c:317:18: error: implicit declaration of function ‘irq_domain_add_linear’ entry->domain = irq_domain_add_linear(node, 32, &smp2p_irq_ops, entry); ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: llcc-slice: Add missing include of sizes.hNiklas Cassel2018-09-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing include of sizes.h. drivers/soc/qcom/llcc-slice.c: In function ‘llcc_update_act_ctrl’: drivers/soc/qcom/llcc-slice.c:41:44: error: ‘SZ_4K’ undeclared #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K) ^~~~~ Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: smem: Add missing include of sizes.hNiklas Cassel2018-09-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing include of sizes.h. drivers/soc/qcom/smem.c: In function ‘qcom_smem_get_ptable’: drivers/soc/qcom/smem.c:666:64: error: ‘SZ_4K’ undeclared ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K; ^~~~~ Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: apr: fix spelling mistake: "paket" -> "packet"Colin Ian King2018-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial fix to spelling mistake in dev_err message text Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: geni: geni_se_clk_freq_match() should always accept multiplesDouglas Anderson2018-09-131-15/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The geni_se_clk_freq_match() has some strange semantics. Specifically it is defined with two modes: 1. It can find a clock that's an exact multiple of the requested rate 2. It can find a non-exact match but it can't handle multiples then ...but callers should always be able to handle a clock that is a multiple of the requested clock so mode #2 doesn't really make sense. Let's change the semantics so that the non-exact match can also accept multiples and then change the code to handle that. The only caller of this code is the unlanded SPI driver [1] which currently passes "exact = True", thus it should be safe to change the semantics in this way. ...and, in fact, the SPI driver should likely be modified to pass "exact = False" (with the new semantics) since that will allow it to work with SPI devices that request a clock rate that doesn't exactly match a rate we can make. [1] https://lkml.kernel.org/r/1535107336-2214-1-git-send-email-dkota@codeaurora.org Fixes: eddac5af0654 ("soc: qcom: Add GENI based QUP Wrapper driver") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()Douglas Anderson2018-09-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function clk_round_rate() is defined to return a "long", not an "unsigned long". That's because it might return a negative error code. Change the call in geni_se_clk_tbl_get() to check for errors. While we're at it, get rid of a useless init of "freq". NOTE: overall the idea that we should iterate over clk_round_rate() to try to reconstruct a table already present in the clock driver is questionable. Specifically: - This method relies on "clk_round_rate()" rounding up. - This method only works if the table is sorted and has no duplicates. ...this patch doesn't try to fix those problems, it just makes the error handling more correct. Fixes: eddac5af0654 ("soc: qcom: Add GENI based QUP Wrapper driver") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: Add support to register LLCC EDAC driverVenkata Narendra Kumar Gutta2018-09-131-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cache error reporting controller detects and reports single and double bit errors on Last Level Cache Controller (LLCC) cache. Add required support to register LLCC EDAC driver as platform driver, from LLCC driver. Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | | soc: qcom: Add broadcast base for Last Level Cache Controller (LLCC)Venkata Narendra Kumar Gutta2018-09-131-22/+33
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, broadcast base is set to end of the LLCC banks, which may not be correct always. As the number of banks may vary for each chipset and the broadcast base could be at a different address as well. This info depends on the chipset, so get the broadcast base info from the device tree (DT). Add broadcast base in LLCC driver and use this for broadcast writes. Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| * | | | Merge tag 'actions-drivers+s900-sps-for-4.20' of ↵Arnd Bergmann2018-10-024-11/+63
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers Actions Semi SoC drivers for v4.20 #2 The SPS power domain driver is extended for S900 SoC. This required merging a topic branch for the new bindings header. * tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions: soc: actions: sps: Add S900 power domains dt-bindings: power: Add Actions Semi S900 SPS soc: actions: Update SPS help text for S700 soc: actions: Convert to SPDX license identifiers Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | soc: actions: sps: Add S900 power domainsManivannan Sadhasivam2018-09-302-1/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add power domains for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [AF: Update Kconfig help text] Signed-off-by: Andreas Färber <afaerber@suse.de>
| | * | | | soc: actions: Update SPS help text for S700Andreas Färber2018-09-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3ad85b08f7789d51e6aad0f535296d1c31e319b9 (soc: actions: sps: Add S700) added S700 support to the SPS driver but forget to update Kconfig help. Add missing S700 mention, in preparation for further SoCs. Fixes: 3ad85b08f778 ("soc: actions: sps: Add S700") Reported-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>