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path: root/drivers/spi/spi-pxa2xx.c
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* spi: pxa2xx: Add support for Intel Broxton B-StepJarkko Nikula2016-03-021-1/+5
| | | | | | | | | Add support for third Intel Broxton variant and update comment for A-Step variant. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Steve Sakoman <steve.sakoman@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Remove unused DMA buffer mappingsJarkko Nikula2016-02-201-2/+0Star
| | | | | | | | | Only legacy PXA DMA implementation was using these rx_dma and tx_dma DMA addresses so they are not needed after commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Add support for both chip selects on Intel BraswellMika Westerberg2016-02-091-1/+20
| | | | | | | | | | | | | | | Intel Braswell LPSS SPI controller actually has two chip selects and there is no capabilities register where this could be found out. These two chip selects are controlled by bits which are in slightly differrent location than Broxton has. Braswell Windows driver also starts chip select (ACPI DeviceSelection) numbering from 1 so translate it to be suitable for Linux as well. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Move chip select control bits into lpss_config structureMika Westerberg2016-02-091-24/+40
| | | | | | | | | | | | | | | Some Intel LPSS SPI controllers, like the one in Braswell has these bits in a different location so move these bits to be part of the LPSS configuration. Since not all LPSS SPI controllers support multiple native chip selects we refactor selecting chip select to its own function and check control->cs_sel_mask before switching to another chip select. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Translate ACPI DeviceSelection to Linux chip select on BaytrailMika Westerberg2016-02-091-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Windows Baytrail SPI host controller driver uses 1 as the first (and only) value for ACPI DeviceSelection like can be seen in DSDT taken from Lenovo Thinkpad 10: Device (FPNT) { ... Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Name (UBUF, ResourceTemplate () { SpiSerialBus (0x0001, // DeviceSelection PolarityLow, FourWireMode, 0x08, ControllerInitiated, 0x007A1200, ClockPolarityLow, ClockPhaseFirst, "\\_SB.SPI1", 0x00, ResourceConsumer,,) This will fail to enumerate in Linux with following error: [ 0.241296] pxa2xx-spi 80860F0E:00: cs1 >= max 1 [ 0.241312] spi_master spi32766: failed to add SPI device VFSI6101:00 from ACPI To make the Linux SPI core successfully enumerate the device we provide a custom version of ->fw_translate_cs() that translates DeviceSelection correctly. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Fix too early chipselect deassertJarkko Nikula2016-02-041-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | There is a chance that chipselect is deasserted too early while the last clock cycle is still running. Protocol analyzers will see this as a failed last byte. This is more likely to occur with slow bitrates, for instance at 25 kbps. Reason for this is when using SPI mode 0 that both SPI host controller and SPI slave will drive the data lines at the falling edge of clock signal and sample at the rising edge. Receive FIFO gets the last bit now at the rising edge and code sees transfer to be finished either by the interrupt in PIO mode or by the DMA completion in DMA mode. The SSP Time Out register SSTO should take care of delaying the completion but it does not seems to have effect at least on Intel Skylake and Broxton even when using long enough values. Depending on timing code may get into point where chipselect is deasserted while the last clock cycle is still running at its second half cycle. Fix this by adding a wait loop in giveback() that waits until SSP becomes idle before deasserting the chipselect. Reported-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Update comment in int_transfer_complete()Jarkko Nikula2016-02-041-1/+1
| | | | | | | | The register writes here actually don't stop the SSP but clean and disable interrupts and set the receive FIFO inactivity timeout to zero. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Print actual DMA/PIO transfer mode in debug messagesJarkko Nikula2016-01-271-13/+13
| | | | | | | | | | | | | | Transfer debug messages don't actually show is the transfer really using DMA. Driver may fall back to PIO in case transfer size is not within the certain limits or fails to map DMA buffers but debug messages don't reveal that. Move these debug messages further in pump_transfers() where the actual transfer mode is known and use drv_data->dma_mapped flag instead of chip->enable_dma for printing the mode. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Remove redundant call to lpss_ssp_setup() in probeMika Westerberg2015-11-201-3/+0Star
| | | | | | | | | | | | | | | Commit 8b136baa5892 ("spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals") added a block where lpss_ssp_setup() gets called again for Intel LPSS SPI host controllers before checking number of chip selects from the capabilities register. There is no point in calling the function twice in probe so remove the first call. Reported-by: Aaron Lu <aaron.lu@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
*-. Merge remote-tracking branches 'spi/topic/omap-100k', ↵Mark Brown2015-11-041-99/+158
|\ \ | | | | | | | | | 'spi/topic/omap-uwire', 'spi/topic/owner', 'spi/topic/pxa' and 'spi/topic/pxa2xx' into spi-next
| | * spi: pxa2xx: Rework self-initiated platform data creation for non-ACPIJarkko Nikula2015-10-301-12/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend the pxa2xx_spi_acpi_get_pdata() so that it can create platform data also on platforms that do not support ACPI or if CONFIG_ACPI is not set. Now it is expected that "pxa2xx-spi" platform device is either created with explicit platform data or has an ACPI companion device. However there is only little in pxa2xx_spi_acpi_get_pdata() that is really dependent on ACPI companion and it can be reworked to cover also cases where "pxa2xx-spi" device doesn't have ACPI companion and is created without platform data. Do this by renaming the pxa2xx_spi_acpi_get_pdata(), moving it outside of CONFIG_ACPI test and changing a few runtime tests there to support non-ACPI case. Only port/bus ID setting based on ACPI _UID is dependent on ACPI and is moved to own function inside CONFIG_ACPI. Purpose of this to support non-ACPI case for those PCI enumerated compound devices that integrate both LPSS SPI host controller and integrated DMA engine under the same PCI ID and which are registered in MFD layer instead of in spi-pxa2xx-pci.c. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Add support for Intel BroxtonJarkko Nikula2015-10-301-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | LPSS SPI in Intel Broxton is otherwise the same than in Intel Sunrisepoint but it supports up to four chip selects per port and has different FIFO thresholds. Patch adds support for two Broxton SoC variants. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signalsJarkko Nikula2015-10-301-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI capabilities register located in private registers space of newer Intel LPSS SPI host controllers tell in register bits 12:9 which chip select signals are enabled. Use that information for detecting the number of chip selects. For simplicity we assume chip selects are enabled one after another without disabled chip selects between. For instance CS0 | CS1 | CS2 but not CS0 | CS1 | CS3. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Add output control for multiple Intel LPSS chip selectsJarkko Nikula2015-10-301-3/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel LPSS SPI host controllers in upcoming Intel platforms can have up to 4 chip selects per port. Extend chip select control in lpss_ssp_cs_control() by adding a code that selects the active chip select output prior to changing the state. Detection for number of enabled chip select signals will be added by another patch. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Use LPSS prefix for defines that are Intel LPSS specificJarkko Nikula2015-10-301-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename a few defines that are specific to Intel LPSS SPI private registers with LPSS prefix. It makes easier to distinguish them from common defines. Suggested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Align a few definesJarkko Nikula2015-10-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add more indentation to define lines for making them aligned with the longest one. They would look messy after adding more long defines. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip selectJarkko Nikula2015-10-231-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for configuring the chip select polarities. Touch only chip select SW mode and state bits when enabling the software chip select control in order to not clear any other bits in the register. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Convert unique ID string of ACPI device as unsigned integerJarkko Nikula2015-10-231-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Andy noticed numeric unique device ID is unsigned integer so convert it using kstrtouint(). Actually integer in ACPI 2.0 and later is 64 bits litte-endian unsigned integer but quite certainly having so big value here would mean something extra than just the SPI bus number so it won't hurt to assume only lower 32 bits carry the bus number for now. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: derive struct chip_data from struct drv_dataAndy Shevchenko2015-10-231-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we call pxa2xx_ssp_get_clk_div() from pump_transfers() we may derive pointer to struct chip_data from struct drv_data like it's done in the rest of the functions. This will make it less errorprone. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: move debug messages to pump_transfer()Andy Shevchenko2015-10-231-17/+11Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The speed can be changed from transfer to transfer, that's why the messages do not depict the actual values during ->setup(). Move debug messages from ->setup() to pump_transfers(). Get rid of leftovers as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: choose closest lower speedAndy Shevchenko2015-10-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per discussion [1] the best choice is to set closest speed which is not going over the asked one. Do the same approach for Intel Quark boards. [1] http://www.spinics.net/lists/linux-spi/msg03389.html Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Remove empty function pxa2xx_spi_dma_resume()Mika Westerberg2015-10-011-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | This was leftover from the legacy pxa2xx DMA implementation and not needed anymore so remove it. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Use ACPI_COMPANION() instead of acpi_bus_get_device()Jarkko Nikula2015-09-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Get pointer to the struct acpi_device by using ACPI_COMPANION() macro. This is more efficient than using ACPI_HANDLE() and acpi_bus_get_device(). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Set the max_speed_hz of the masterJarkko Nikula2015-09-251-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Carry input clock of the controller in max_speed_hz of struct spi_master instead of in own driver data. They mean the same thing and more over now the max_speed_hz is not even set here. As an added bonus this allows SPI core to validate that transfer speed is not beyond the maximum input clock. This is not a problem in spi-pxa2xx as the driver doesn't use transfer speed parameter directly but via input clock divider calculation which will top at divide by one. However it's better to validate speed before passing it here. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Remove cr0 variable from struct chip_dataJarkko Nikula2015-09-171-6/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There hasn't been need to carry chip->cr0 after SPI core started to validate speed_hz and bits_per_word transfer parameters. That effectively caused that pump_transfers() always recalculated it and practically chip->cr0 is used locally in setup() for debug prints only. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Remove if statement that is always true in pump_transfers()Jarkko Nikula2015-09-171-39/+37Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is continuation to previous commit by separating unindentation from variable removal done in previous commit. As said SPI core have validated both the speed_hz and bits_per_word and the if statement here evaluates always to true. Remove the test and unindent the code block accordingly. While at it remove also needless "cr0 = chip->cr0" as cr0 will be overwritten anyway and fix block comment style. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Remove two variables from struct chip_dataJarkko Nikula2015-09-171-10/+2Star
| |/ | | | | | | | | | | | | | | | | | | | | | | There is no need to carry spi->max_speed_hz and spi->bits_per_word from setup() in "struct chip_data" since pump_transfers() will anyway take the transfer parameters from "struct spi_transfer". This is since SPI core validates both bits_per_word and speed_hz transfer parameters and defaults to spi->bits_per_word and spi->max_speed_hz in case these per transfer parameters are not set. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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| \
*-. \ Merge remote-tracking branches 'spi/fix/atmel', 'spi/fix/bcm2835', ↵Mark Brown2015-09-221-0/+4
|\ \ \ | |_|/ |/| | | | | 'spi/fix/doc', 'spi/fix/mediatek', 'spi/fix/meson', 'spi/fix/mtk' and 'spi/fix/pxa2xx' into spi-linus
| | * spi: spi-pxa2xx: Check status register to determine if SSSR_TINT is disabledTan, Jui Nee2015-09-021-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Intel Baytrail, there is case when interrupt handler get called, no SPI message is captured. The RX FIFO is indeed empty when RX timeout pending interrupt (SSSR_TINT) happens. Use the BIOS version where both HSUART and SPI are on the same IRQ. Both drivers are using IRQF_SHARED when calling the request_irq function. When running two separate and independent SPI and HSUART application that generate data traffic on both components, user will see messages like below on the console: pxa2xx-spi pxa2xx-spi.0: bad message state in interrupt handler This commit will fix this by first checking Receiver Time-out Interrupt, if it is disabled, ignore the request and return without servicing. Signed-off-by: Tan, Jui Nee <jui.nee.tan@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* | spi: spi-pxa2xx: Remove unused legacy null dma buffer and allocation for itJarkko Nikula2015-08-051-3/+1Star
| | | | | | | | | | | | | | | | Remove null_dma_buf variable and extra allocation for it. It is not needed since commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: pxa2xx: Add terminating entry for pxa2xx_spi_pci_compound_matchAxel Lin2015-08-041-0/+1
| | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-pxa2xx: Remove unused legacy PXA DMA API channel numbersJarkko Nikula2015-08-031-2/+0Star
| | | | | | | | | | | | | | | | These became unused by the commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: pxa2xx: Add support for Intel SunrisepointJarkko Nikula2015-07-311-4/+55
|/ | | | | | | | | | | | | | | | | | | | | Major difference in LPSS SPI between Intel Sunrisepoint PCH and earlier platforms is an integrated DMA (iDMA) engine. iDMA is an IP that is private for each LPSS host controller (UART/SPI/I2C). Other differences are private register space offset, a few private registers that are in different location and FIFO thresholds. Intel Sunrisepoint LPSS SPI and iDMA devices are probed and registered in MFD layer as platform devices. Here these compound devices are detected by matching against known PCI IDs. This allows us to share pxa2xx_spi_acpi_get_pdata() for setting up the platform data instead of duplicating it in MFD part. This patch adds configuration for Intel Sunrisepoint LPSS SPI, above detection and DMA filter function that picks the DMA channel only from an associated iDMA block. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Constify ACPI device idsMathias Krause2015-06-151-1/+1
| | | | | | | | Constify the ACPI device ID array, it doesn't need to be writable at runtime. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Make LPSS SPI general register optionalJarkko Nikula2015-06-051-3/+7
| | | | | | | | | General register located in LPSS SPI private register space is not found in upcoming Intel LPSS platforms. Access it conditionally depending is it defined in configuration. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Prepare for new Intel LPSS SPI typeJarkko Nikula2015-06-051-48/+59
| | | | | | | | | | | | | | Some of the Intel LPSS SPI properties will be different in upcoming platforms compared to existing Lynxpoint and BayTrail/Braswell. LPSS SPI private registers will be at different offset and there will be changes in individual registers and default FIFO thresholds too. Add configuration for these differences and use them in runtime based on LPSS SSP type. With this change private registers offset autodetection becomes needless. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Differentiate Intel LPSS typesJarkko Nikula2015-06-051-14/+30
| | | | | | | | | | | | | Intel LPSS SPI properties differ between between platforms. Now private registers offset 0x400 or 0x800 is autodetected but there is need to support also other offset and handle a few other differences. Prepare for that by splitting the LPSS_SSP type into compatible hardware types and set it now based on PCI or ACPI ID. That type will be used to set properties that differ between current and upcoming platforms. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: missing break in pxa2xx_ssp_get_clk_div()Dan Carpenter2015-03-311-0/+2
| | | | | | | | | | We refactored this code but accidentally left out a break statement so QUARK_X1000_SSP isn't handled correctly. Fixes: 025ffe88ee60 ('spi: pxa2xx: shift clk_div in one place') Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: replace ugly table by approximationAndy Shevchenko2015-03-251-62/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Quark SoC data sheet describes the baud rate setting using fractional divider. The subset of possible values represented by a table suggests that the divisor has one block that could divide by 5. This explains the number of the beast in some cases in the table. Thus, in this particular case the divisor can be evaluated as 5^i * 2^j * 2 * k, where i = [0, 1] j = [0, 23] k = [1, 256] There are few cases as mentioned in the data sheet, i.e. better form of the clock signal will be in case if DDS_CLK_RATE either 2^n or 2/5. It's also possible to use any value that is less or equal to 0x33333 (1/5/16 = 1/80). All three cases are compared to each other and the one that suits better is chosen by the approximation algorithm. Anyone can play with the script [1] that represents the algorithm. [1] https://gist.github.com/06b084488b3629898121 Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: shift clk_div in one placeAndy Shevchenko2015-03-241-5/+5
| | | | | | | | | | This patch refactors ssp_get_clk_div() and pxa2xx_ssp_get_clk_div() to align clk_div calculations, i.e. ssp_get_clk_div() and quark_x1000_set_clk_regvals() will return plain clk_div and it will be shifted to proper position in pxa2xx_ssp_get_clk_div(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: pxa2xx: Remove needless includesJarkko Nikula2015-03-231-4/+0Star
| | | | | | | | | These asm/io.h, asm/irq.h and asm/delay.h are needless since they are already included by linux/io.h via drivers/spi/spi-pxa2xx.h, linux/interrupt.h and linux/delay.h. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
*-. Merge remote-tracking branches 'spi/topic/orion', 'spi/topic/pxa2xx', ↵Mark Brown2015-02-081-114/+89Star
|\ \ | | | | | | | | | 'spi/topic/qup', 'spi/topic/rockchip' and 'spi/topic/samsung' into spi-next
| | * spi: pxa2xx: Fix unconditional call of lpss_ssp_setup in pxa2xx_spi_resumeJarkko Nikula2015-01-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Commit 7566bcc76b15 ("spi: pxa2xx: Move is_lpss_ssp() tests to caller") did not check LPSS before calling lpss_ssp_setup() in pxa2xx_spi_resume(). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Cleanup register access macrosJarkko Nikula2014-12-221-102/+81Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently SSP registers are accessed by having an own read and write macros for each register. For instance read_SSSR(iobase) and write_SSSR(iobase). In my opinion this hurts readability and requires new macros to be defined for each new added register. Let's define and use instead common pxa2xx_spi_read() and pxa2xx_spi_write() accessors. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Move is_lpss_ssp() tests to callerJarkko Nikula2014-12-221-9/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | Move is_lpss_ssp() tests from functions to caller. Although this aims to improve readability it also saves a few code bytes on x86. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: pxa2xx: Remove unused defineJarkko Nikula2014-12-221-2/+0Star
| |/ | | | | | | | | Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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*---. | Merge remote-tracking branches 'spi/topic/falcon', 'spi/topic/fsf', ↵Mark Brown2015-02-081-4/+0Star
|\ \ \| | | | | | | | | | | | | 'spi/topic/fsl', 'spi/topic/fsl-dspi' and 'spi/topic/gpio' into spi-next
| | * | spi: Remove FSF mailing addressesJarkko Nikula2014-12-221-4/+0Star
| | |/ | | | | | | | | | | | | Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | / spi/pxa2xx: Clear cur_chip pointer before starting next messageMika Westerberg2014-12-291-1/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once the current message is finished, the driver notifies SPI core about this by calling spi_finalize_current_message(). This function queues next message to be transferred. If there are more messages in the queue, it is possible that the driver is asked to transfer the next message at this point. When spi_finalize_current_message() returns the driver clears the drv_data->cur_chip pointer to NULL. The problem is that if the driver already started the next message clearing drv_data->cur_chip will cause NULL pointer dereference which crashes the kernel like: BUG: unable to handle kernel NULL pointer dereference at 0000000000000048 IP: [<ffffffffa0022bc8>] cs_deassert+0x18/0x70 [spi_pxa2xx_platform] PGD 78bb8067 PUD 37712067 PMD 0 Oops: 0000 [#1] SMP Modules linked in: CPU: 1 PID: 11 Comm: ksoftirqd/1 Tainted: G O 3.18.0-rc4-mjo #5 Hardware name: Intel Corp. VALLEYVIEW B3 PLATFORM/NOTEBOOK, BIOS MNW2CRB1.X64.0071.R30.1408131301 08/13/2014 task: ffff880077f9f290 ti: ffff88007a820000 task.ti: ffff88007a820000 RIP: 0010:[<ffffffffa0022bc8>] [<ffffffffa0022bc8>] cs_deassert+0x18/0x70 [spi_pxa2xx_platform] RSP: 0018:ffff88007a823d08 EFLAGS: 00010202 RAX: 0000000000000008 RBX: ffff8800379a4430 RCX: 0000000000000026 RDX: 0000000000000000 RSI: 0000000000000246 RDI: ffff8800379a4430 RBP: ffff88007a823d18 R08: 00000000ffffffff R09: 000000007a9bc65a R10: 000000000000028f R11: 0000000000000005 R12: ffff880070123e98 R13: ffff880070123de8 R14: 0000000000000100 R15: ffffc90004888000 FS: 0000000000000000(0000) GS:ffff880079a80000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 0000000000000048 CR3: 000000007029b000 CR4: 00000000001007e0 Stack: ffff88007a823d58 ffff8800379a4430 ffff88007a823d48 ffffffffa0022c89 0000000000000000 ffff8800379a4430 0000000000000000 0000000000000006 ffff88007a823da8 ffffffffa0023be0 ffff88007a823dd8 ffffffff81076204 Call Trace: [<ffffffffa0022c89>] giveback+0x69/0xa0 [spi_pxa2xx_platform] [<ffffffffa0023be0>] pump_transfers+0x710/0x740 [spi_pxa2xx_platform] [<ffffffff81076204>] ? pick_next_task_fair+0x744/0x830 [<ffffffff81049679>] tasklet_action+0xa9/0xe0 [<ffffffff81049a0e>] __do_softirq+0xee/0x280 [<ffffffff81049bc0>] run_ksoftirqd+0x20/0x40 [<ffffffff810646df>] smpboot_thread_fn+0xff/0x1b0 [<ffffffff810645e0>] ? SyS_setgroups+0x150/0x150 [<ffffffff81060f9d>] kthread+0xcd/0xf0 [<ffffffff81060ed0>] ? kthread_create_on_node+0x180/0x180 [<ffffffff8187a82c>] ret_from_fork+0x7c/0xb0 Fix this by clearing drv_data->cur_chip before we call spi_finalize_current_message(). Reported-by: Martin Oldfield <m@mjoldfield.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* | Merge tag 'pm+acpi-3.19-rc1-2' of ↵Linus Torvalds2014-12-191-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull more ACPI and power management updates from Rafael Wysocki: "These are regression fixes (leds-gpio, ACPI backlight driver, operating performance points library, ACPI device enumeration messages, cpupower tool), other bug fixes (ACPI EC driver, ACPI device PM), some cleanups in the operating performance points (OPP) framework, continuation of CONFIG_PM_RUNTIME elimination, a couple of minor intel_pstate driver changes, a new MAINTAINERS entry for it and an ACPI fan driver change needed for better support of thermal management in user space. Specifics: - Fix a regression in leds-gpio introduced by a recent commit that inadvertently changed the name of one of the properties used by the driver (Fabio Estevam). - Fix a regression in the ACPI backlight driver introduced by a recent fix that missed one special case that had to be taken into account (Aaron Lu). - Drop the level of some new kernel messages from the ACPI core introduced by a recent commit to KERN_DEBUG which they should have used from the start and drop some other unuseful KERN_ERR messages printed by ACPI (Rafael J Wysocki). - Revert an incorrect commit modifying the cpupower tool (Prarit Bhargava). - Fix two regressions introduced by recent commits in the OPP library and clean up some existing minor issues in that code (Viresh Kumar). - Continue to replace CONFIG_PM_RUNTIME with CONFIG_PM throughout the tree (or drop it where that can be done) in order to make it possible to eliminate CONFIG_PM_RUNTIME (Rafael J Wysocki, Ulf Hansson, Ludovic Desroches). There will be one more "CONFIG_PM_RUNTIME removal" batch after this one, because some new uses of it have been introduced during the current merge window, but that should be sufficient to finally get rid of it. - Make the ACPI EC driver more robust against race conditions related to GPE handler installation failures (Lv Zheng). - Prevent the ACPI device PM core code from attempting to disable GPEs that it has not enabled which confuses ACPICA and makes it report errors unnecessarily (Rafael J Wysocki). - Add a "force" command line switch to the intel_pstate driver to make it possible to override the blacklisting of some systems in that driver if needed (Ethan Zhao). - Improve intel_pstate code documentation and add a MAINTAINERS entry for it (Kristen Carlson Accardi). - Make the ACPI fan driver create cooling device interfaces witn names that reflect the IDs of the ACPI device objects they are associated with, except for "generic" ACPI fans (PNP ID "PNP0C0B"). That's necessary for user space thermal management tools to be able to connect the fans with the parts of the system they are supposed to be cooling properly. From Srinivas Pandruvada" * tag 'pm+acpi-3.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (32 commits) MAINTAINERS: add entry for intel_pstate ACPI / video: update the skip case for acpi_video_device_in_dod() power / PM: Eliminate CONFIG_PM_RUNTIME NFC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM SCSI / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM ACPI / EC: Fix unexpected ec_remove_handlers() invocations Revert "tools: cpupower: fix return checks for sysfs_get_idlestate_count()" tracing / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM x86 / PM: Replace CONFIG_PM_RUNTIME in io_apic.c PM: Remove the SET_PM_RUNTIME_PM_OPS() macro mmc: atmel-mci: use SET_RUNTIME_PM_OPS() macro PM / Kconfig: Replace PM_RUNTIME with PM in dependencies ARM / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM sound / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM phy / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM video / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM tty / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM spi: Replace CONFIG_PM_RUNTIME with CONFIG_PM ACPI / PM: Do not disable wakeup GPEs that have not been enabled ACPI / utils: Drop error messages from acpi_evaluate_reference() ...
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