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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner2019-06-051-10/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge branch 'linus' of ↵Linus Torvalds2019-01-061-9/+271
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal Pull thermal SoC updates from Eduardo Valentin: - Tegra DT binding documentation for Tegra194 - Armada now supports ap806 and cp110 - RCAR thermal now supports R8A774C0 and R8A77990 - Fixes on thermal_hwmon, IMX, generic-ADC, ST, RCAR, Broadcom, Uniphier, QCOM, Tegra, PowerClamp, and Armada thermal drivers. * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal: (22 commits) thermal: generic-adc: Fix adc to temp interpolation thermal: rcar_thermal: add R8A77990 support dt-bindings: thermal: rcar-thermal: add R8A77990 support thermal: rcar_thermal: add R8A774C0 support dt-bindings: thermal: rcar-thermal: add R8A774C0 support dt-bindings: cp110: document the thermal interrupt capabilities dt-bindings: ap806: document the thermal interrupt capabilities MAINTAINERS: thermal: add entry for Marvell MVEBU thermal driver thermal: armada: add overheat interrupt support thermal: st: fix Makefile typo thermal: uniphier: Convert to SPDX identifier thermal/intel_powerclamp: Change to use DEFINE_SHOW_ATTRIBUTE macro thermal: tegra: soctherm: Change to use DEFINE_SHOW_ATTRIBUTE macro dt-bindings: thermal: tegra-bpmp: Add Tegra194 support thermal: imx: save one condition block for normal case of nvmem initialization thermal: imx: fix for dependency on cpu-freq thermal: tsens: qcom: do not create duplicate regmap debugfs entries thermal: armada: Use PTR_ERR_OR_ZERO in armada_thermal_probe_legacy() dt-bindings: thermal: rcar-gen3-thermal: All variants use 3 interrupts thermal: broadcom: use devm_thermal_zone_of_sensor_register ...
| * thermal: armada: add overheat interrupt supportMiquel Raynal2019-01-021-1/+269
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IP can manage to trigger interrupts on overheat situation from all the sensors. However, the interrupt source changes along with the last selected source (ie. the last read sensor), which is an inconsistent behavior. Avoid possible glitches by always selecting back only one channel which will then be referenced as the "overheat_sensor" (arbitrarily: the first in the DT which has a critical trip point filled in). It is possible that the scan of all thermal zone nodes did not bring a critical trip point from which the overheat interrupt could be configured. In this case just complain but do not fail the probe. Also disable sensor switch during overheat situations because changing the channel while the system is too hot could clear the overheat state by changing the source while the temperature is still very high. Even if the overheat state is not declared, overheat interrupt must be cleared by reading the DFX interrupt cause _after_ the temperature has fallen down to the low threshold, otherwise future possible interrupts would not be served. A work polls the corresponding register until the overheat flag gets cleared in this case. Suggested-by: David Sniatkiwicz <davidsn@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * thermal: armada: Use PTR_ERR_OR_ZERO in armada_thermal_probe_legacy()YueHaibing2019-01-021-8/+2Star
| | | | | | | | | | | | | | | | Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* | thermal: armada: constify thermal_zone_of_device_ops structureJulia Lawall2018-12-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The thermal_zone_of_device_ops structure can be const as it is only passed as the last argument of devm_thermal_zone_of_sensor_register and the corresponding parameter is declared as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* | thermal: armada: fix legacy resource fixupRussell King2018-12-051-13/+11Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the armada thermal module is inserted, removed and then reinserted, the system panics as per the messages below. The reason is that "edit" a live resource in the resource tree twice, and end up with it pointing to some other hardware. Editing live resources (resources that are part of the registered resource tree) is not permissible - the resource tree is an ordered set of resources, sorted by start address, and when a new resource is inserted, it is validated that it (a) fits within its parent resource and (b) does not overlap a neighbouring resource. Get rid of this resource editing. We can instead adjust the return value from ioremap() as ioremap() deals with the creation of page- based mappings - provided the adjustment does not cross a page boundary. SError Interrupt on CPU1, code 0xbf000000 -- SError CPU: 1 PID: 2749 Comm: modprobe Not tainted 4.19.0+ #175 Hardware name: Marvell 8040 MACCHIATOBin Double shot (DT) pstate: 20400085 (nzCv daIf +PAN -UAO) pc : regmap_mmio_read+0x3c/0x60 lr : regmap_mmio_read+0x3c/0x60 sp : ffffff800d453900 x29: ffffff800d453900 x28: ffffff800096a1d0 x27: 0000000000000100 x26: ffffff80009696d8 x25: ffffff8000969000 x24: ffffffc13a588918 x23: ffffffc13a9a28a8 x22: ffffff800d4539dc x21: 0000000000000084 x20: ffffff800d4539dc x19: ffffffc13a5d5480 x18: 0000000000000000 x17: 0000000000000000 x16: 0000000000000000 x15: 0000000000000000 x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000030 x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f x9 : 0000000000000000 x8 : ffffffc13a5d5a80 x7 : 0000000000000000 x6 : 000000000000003f x5 : 0000000000000000 x4 : 0000000000000000 x3 : ffffff800851be70 x2 : ffffff800851bd60 x1 : ffffff800d492ff8 x0 : 0000000000000000 Kernel panic - not syncing: Asynchronous SError Interrupt CPU: 1 PID: 2749 Comm: modprobe Not tainted 4.19.0+ #175 Hardware name: Marvell 8040 MACCHIATOBin Double shot (DT) Call trace: dump_backtrace+0x0/0x158 show_stack+0x14/0x1c dump_stack+0x90/0xb0 panic+0x128/0x298 print_tainted+0x0/0xa8 arm64_serror_panic+0x74/0x80 do_serror+0x5c/0xb8 el1_error+0xb4/0x144 regmap_mmio_read+0x3c/0x60 _regmap_bus_reg_read+0x18/0x20 _regmap_read+0x64/0x180 regmap_read+0x44/0x6c armada_ap806_init+0x24/0x5c [armada_thermal] armada_thermal_probe+0x2c8/0x37c [armada_thermal] platform_drv_probe+0x4c/0xb0 really_probe+0x21c/0x2b4 driver_probe_device+0x58/0xfc __driver_attach+0xd4/0xd8 bus_for_each_dev+0x50/0xa0 driver_attach+0x20/0x28 bus_add_driver+0x1c4/0x228 driver_register+0x6c/0x124 __platform_driver_register+0x4c/0x54 armada_thermal_driver_init+0x20/0x1000 [armada_thermal] do_one_initcall+0x30/0x204 do_init_module+0x5c/0x1d4 load_module+0x1a88/0x212c __se_sys_finit_module+0xa0/0xac __arm64_sys_finit_module+0x1c/0x24 el0_svc_common+0x94/0xf0 el0_svc_handler+0x24/0x80 el0_svc+0x8/0x3c0 SMP: stopping secondary CPUs Kernel Offset: disabled CPU features: 0x0,21806000 Memory Limit: none Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* | thermal: armada: fix legacy validity test senseRussell King2018-12-051-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | Commit 8c0e64ac4075 ("thermal: armada: get rid of the ->is_valid() pointer") removed the unnecessary indirection through a function pointer, but in doing so, also removed the negation operator too: - if (priv->data->is_valid && !priv->data->is_valid(priv)) { + if (armada_is_valid(priv)) { which results in: armada_thermal f06f808c.thermal: Temperature sensor reading not valid armada_thermal f2400078.thermal: Temperature sensor reading not valid armada_thermal f4400078.thermal: Temperature sensor reading not valid at boot, or whenever the "temp" sysfs file is read. Replace the negation operator. Fixes: 8c0e64ac4075 ("thermal: armada: get rid of the ->is_valid() pointer") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: fix a test in probe()Dan Carpenter2018-10-231-2/+2
| | | | | | | | | | The platform_get_resource() function doesn't return error pointers, it returns NULL on error. Fixes: 3d4e51844a4e ("thermal: armada: convert driver to syscon register accesses") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: fix copy-paste error in armada_thermal_probe()Wei Yongjun2018-08-011-1/+1
| | | | | | | | | | | The return value from devm_kzalloc() is not checked correctly. The test is done against a wrong variable. Fix it. Fixes: e72f03ef2543 ("thermal: armada: use the resource managed registration helper alternative") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: get rid of the ->is_valid() pointerMiquel Raynal2018-07-271-9/+4Star
| | | | | | | | | | The implementation of armada_is_valid() is very simple and is the same across all the versions of the IP since the ->is_valid_bit has been introduced. Simplify the structure by getting rid of the function pointer and calling directly the function. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: move validity check out of the read functionMiquel Raynal2018-07-271-7/+7
| | | | | | | | | Sensor selection when using multiple sensors already checks for the sensor validity. Move it to the legacy ->get_temp() hook, where it is still needed. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: remove sensors validity from the IP initializationMiquel Raynal2018-07-271-6/+3Star
| | | | | | | | | | | When using new bindings with multiple sensors, sensor validity is checked twice because sensor selection also checks for the validity. Remove the redundant call from the IP initialization helper and move it to the legacy probe section where it is still needed. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: add multi-channel sensors supportMiquel Raynal2018-07-271-21/+114
| | | | | | | | | | | | | | | | | | | MVEBU thermal IP supports multiple channels. Each channel may have several sensors but for now each channel is wired to only one thermal sensor. The first channel always points to the so called internal sensor, within the thermal IP. There is usually one more channel (with one sensor each time) per CPU. The code has been written to support possible evolutions of the ap806 IP that would embed more CPUs and thus more channels to select. Each channel should be referenced in the device tree as an independent thermal zone. Add the possibility to read each of these sensors through sysfs by registering all the sensors (translated in "thermal_zone"). Also add a mutex on these accesses to avoid read conflicts (only one channel/sensor may be selected and read at a time). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: use the resource managed registration helper alternativeMiquel Raynal2018-07-271-22/+100
| | | | | | | | | | | | | | Current use of thermal_zone_device_register() triggers a warning at boot and should be replaced by devm_thermal_zone_of_sensor_register(). This allows better handling of multiple thermal zones for later multi-sensors support. Also change the driver data to embed a new structure to make the difference between legacy data (which needs to be cleaned) and syscon-related data. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: convert driver to syscon register accessesMiquel Raynal2018-07-271-70/+129
| | | | | | | | | | | | | | | | | Until recently, only one register was referenced in MVEBU thermal IP node. Recent changes added a second entry pointing to another register right next to it. We cannot know for sure that we will not have to access other registers. That will be actually the case when overheat interrupt feature will come, where it will be needed to access DFX registers in the same area. This approach is not scalable so instead of adding consinuously memory areas in the DT (and change the DT bindings, while keeping backward compatibility), move the thermal node into a wider syscon from which it will be possible to also configure the thermal interrupt. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: average over samples to avoid glitchesMiquel Raynal2018-07-271-0/+25
| | | | | | | | | | | | | Configure the sample frequency and number of averaged samples. This is needed for two reasons: 1/ To be bootloader independent. 2/ To prepare the introduction of multi-sensors support by preventing inconsistencies when reading temperatures that could be a mean of samples took from different sensors. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: dissociate a380 and cp110 ->init() hooksMiquel Raynal2018-07-271-1/+7
| | | | | | | | | | | | Until now, Armada 380 and CP110 could share the same ->init() function because their use was identical. Prepare the support of multi-sensors support and overheat interrupt feature by separating the initialization paths before they actually diverge. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: rename the initialization routineMiquel Raynal2018-07-271-20/+20
| | | | | | | | | Calling a hook ->init_sensor() while what is initialized is the IP itself and not the sensors is misleading. Rename the hook ->init() to avoid any confusion in later work bringing multi-sensors support. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: remove misleading commentsMiquel Raynal2018-07-271-2/+0Star
| | | | | | | | | | | On older versions of this thermal IP, TSEN referred as the internal sensor in the thermal IP while EXT_TSEN referred as sensors outside of this IP, ie in the CPUs most of the time. The bit names in the specifications do not follow this rule anymore, so remove these comments that are misleading. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: remove useless register accessesMiquel Raynal2018-07-271-6/+2Star
| | | | | | | | | Prepare the migration to use regmaps by first simplifying the initialization functions: avoid unnecessary write/read cycles on configuration registers. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: add a function that sanitizes the thermal zone nameMiquel Raynal2018-07-271-1/+36
| | | | | | | | | | Thermal zone names must follow certain rules imposed by the framework. They are limited in length and shall not have any hyphen '-'. This is done in a separate function for future use in another location. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Give meaningful names to the thermal zonesMiquel Raynal2018-01-011-2/+2
| | | | | | | | | | | | | | | | | | | | After registration to the thermal core, sysfs will make one entry per instance of the driver in /sys/class/thermal_zoneX and /sys/class/hwmon/hwmonX, X being the index of the instance, all of them having the type/name "armada_thermal". Until now there was only one thermal zone per SoC but SoCs like Armada A7K and Armada A8K have respectively two and three thermal zones (one per AP and one per CP) and this number is subject to grow in the future. Use dev_name() instead of the "armada_thermal" string to get a meaningful name and be able to identify the thermal zones from userspace. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Wait sensors validity before exiting the init callbackMiquel Raynal2018-01-011-3/+20
| | | | | | | | | | | | | | The thermal core will check for sensors validity right after the initialization callback has returned. As the initialization routine make a reset, the sensors are not ready immediately and the core spawns an error in the dmesg. Avoid this annoying situation by polling on the validity bit before exiting from these routines. This also avoid the use of blind sleeps. Suggested-by: David Sniatkiwicz <davidsn@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Change sensors trim default valueMiquel Raynal2018-01-011-0/+13
| | | | | | | | | | Errata #132698 highlights an error in the default value of Tc trim. Set this parameter to b'011. Suggested-by: David Sniatkiwicz <davidsn@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Update Kconfig and module descriptionMiquel Raynal2018-01-011-2/+2
| | | | | | | | | | | | | | Update Armada thermal driver Kconfig entry as well as the driver's MODULE_DESCRIPTION content, now that 64-bit SoCs are also supported, eg. Armada 7K and Armada 8K. Use the generic term "Marvell EBU Armada SoCs" instead of listing all the supported SoCs everywhere (excepted in the Kconfig description, where it is useful to have a list). Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Add support for Armada CP110Baruch Siach2018-01-011-7/+26
| | | | | | | | | | | | | | The CP110 component is integrated in the Armada 8k and 7k lines of processors. Signed-off-by: Baruch Siach <baruch@tkos.co.il> [<miquel.raynal@free-electrons.com>: renamed the register pointers as well as some definitions related to the new register names and simplified the init sequence for Armada 380] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Add support for Armada AP806Baruch Siach2018-01-011-16/+58
| | | | | | | | | | | | | | | | | | | The AP806 component is integrated in the Armada 8K and 7K lines of processors. The thermal sensor sample field on the status register is a signed value. Extend armada_get_temp() and the driver structure to handle signed values. Signed-off-by: Baruch Siach <baruch@tkos.co.il> [<miquel.raynal@free-electrons.com>: Changes when applying over the previous patches, including the register names changes, also switched the coefficients values to s64 instead of unsigned long to deal with negative values and used do_div instead of the traditionnal '/'] Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Use real status register nameMiquel Raynal2018-01-011-8/+8
| | | | | | | | | | | | Three 32-bit registers are used to drive the thermal IP: control0, control1 and status. The two control registers share the same name both in the documentation and in the code, while the latter is referred as "sensor" in the code. Rename this pointer to be called "status" in order to be aligned with the documentation. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Clarify control registers accessesMiquel Raynal2018-01-011-22/+54
| | | | | | | | | | | | | | | | | | | Bindings were incomplete for a long time by only exposing one of the two available control registers. To ease the migration to the full bindings (already in use for the Armada 375 SoC), rename the pointers for clarification. This way, it will only be needed to add another pointer to access the other control register when the time comes. This avoids dangerous situations where the offset 0 of the control area can be either one register or the other depending on the bindings used. After this change, device trees of other SoCs could be migrated to the "full" bindings if they may benefit from features from the unaccessible register, without any change in the driver. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Simplify the check of the validity bitMiquel Raynal2018-01-011-8/+6Star
| | | | | | | | | | | | | | All Armada SoCs use one bit to declare if the sensor values are valid. This bit moves across the versions of the IP. The method until then was to do both a shift and compare with an useless flag of "0x1". It is clearer and quicker to directly save the value that must be ANDed instead of the bit position and do a single bitwise AND operation. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Use msleep for long delaysBaruch Siach2018-01-011-4/+4
| | | | | | | | | | | Use msleep for long (> 10ms) delays, instead of the busy waiting mdelay. All delays are called from the probe routine, where scheduling is allowed. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: fix formula documentation commentBaruch Siach2017-11-011-1/+1
| | | | | | | | | The formula implementation at armada_get_temp() indicates that the sign in the formula is inverted. Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: armada: Fix possible overflow in the Armada 380 thermal sensor formulaNadav Haklai2015-10-301-3/+3
| | | | | | | | | | | Update the coefficients so the calculation will not overrun the unsigned long 32bits boundary Signed-off-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Victor Axelrod <victora@marvell.com> Reviewed-by: Neta Zur Hershkovits <neta@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* thermal: consistently use int for temperaturesSascha Hauer2015-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The thermal code uses int, long and unsigned long for temperatures in different places. Using an unsigned type limits the thermal framework to positive temperatures without need. Also several drivers currently will report temperatures near UINT_MAX for temperatures below 0°C. This will probably immediately shut the machine down due to overtemperature if started below 0°C. 'long' is 64bit on several architectures. This is not needed since INT_MAX °mC is above the melting point of all known materials. Consistently use a plain 'int' for temperatures throughout the thermal code and the drivers. This only changes the places in the drivers where the temperature is passed around as pointer, when drivers internally use another type this is not changed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Reviewed-by: Darren Hart <dvhart@linux.intel.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Peter Feuerer <peter@piie.net> Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Jean Delvare <jdelvare@suse.de> Cc: Peter Feuerer <peter@piie.net> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-acpi@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-omap@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Darren Hart <dvhart@infradead.org> Cc: lm-sensors@lm-sensors.org Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: armada: Update Armada 380 thermal sensor coefficientsNadav Haklai2015-05-091-3/+3
| | | | | | | | | | | Improve the Armada 380 thermal sensor accuracy by using updated formula. The updated formula is: Temperature[C degrees] = 0.4761 * tsen_vsen_out - 279.1 Signed-off-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: <stable@vger.kernel.org> #v3.16 Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* Merge branch 'next' of ↵Linus Torvalds2014-12-171-20/+0Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux Pull thermal management update from Zhang Rui: "Summary: - of-thermal extension to allow drivers to register and use its functionality in a better way, without exploiting thermal core. From Lukasz Majewski. - Fix a bug in intel_soc_dts_thermal driver which calls a sleep function in interrupt handler. From Maurice Petallo. - add a thermal UAPI header file for exporting the thermal generic netlink information to user-space. From Florian Fainelli. - First round of refactoring in Exynos driver. Bartlomiej and Lukasz are attempting to make it lean and easier to understand. - New thermal driver for Rockchip (rk3288), with support for DT thermal. From Caesar Wang. - New thermal driver for Nvidia, Tegra124 SOCTHERM driver, with support for DT thermal. From Mikko Perttunen. - New cooling device, based on common clock framework. From Eduardo Valentin. - a couple of small fixes in thermal core framework. From Srinivas Pandruvada, Javi Merino, Luis Henriques. - Dropping Armada A375-Z1 SoC thermal support as the chip is not in the market, armada folks decided to drop its support. - a couple of small fixes and cleanups in int340x thermal driver" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (58 commits) thermal: provide an UAPI header file Thermal/int340x: Clear the error value of the last acpi_bus_get_device() call thermal/powerclamp: add id for braswell cpu thermal: Intel SoC DTS: Don't do thermal zone update inside spin_lock Thermal: fix platform_no_drv_owner.cocci warnings Thermal/int340x: avoid unnecessary pointer casting thermal: int3403: Delete a check before thermal_zone_device_unregister() thermal/int3400: export uuids thermal: of: Extend current of-thermal.c code to allow setting emulated temp thermal: of: Extend of-thermal to export table of trip points thermal: of: Rename struct __thermal_trip to struct thermal_trip thermal: of: Extend of-thermal.c to provide check if trip point is valid thermal: of: Extend of-thermal.c to provide number of trip points thermal: Fix error path in thermal_init() thermal: lock the thermal zone when switching governors thermal: core: ignore invalid trip temperature thermal: armada: Remove support for A375-Z1 SoC thermal: rockchip: add driver for thermal dt-bindings: document Rockchip thermal thermal: exynos: remove exynos_tmu_data.h include ...
| * thermal: armada: Remove support for A375-Z1 SoCEzequiel Garcia2014-11-241-20/+0Star
| | | | | | | | | | | | | | | | | | The Armada 375 Z1 SoC revision is no longer supported. This commit removes the quirk needed for the thermal sensor. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* | thermal: drop owner assignment from platform_driversWolfram Sang2014-10-201-1/+0Star
|/ | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* thermal: armada: Support Armada 380 SoCEzequiel Garcia2014-05-151-0/+30
| | | | | | | | | | | Now that a generic infrastructure is in place, it's possible to support the Armada 380 SoC thermal sensor. This sensor is similar to the one available in the already supported SoCs, with its specific temperature formula and specific sensor initialization. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: armada: Support Armada 375 SoCEzequiel Garcia2014-05-151-0/+58
| | | | | | | | | | | | | | Now that a generic infrastructure is in place, it's possible to support the new Armada 375 SoC thermal sensor. This sensor is similar to the one available in the already supported SoCs, with its specific temperature formula and specific sensor initialization. In addition, we also add support for the Z1 SoC stepping, which needs an initialization-quirk to work properly. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: armada: Allow to specify an 'inverted readout' sensorEzequiel Garcia2014-05-151-1/+5
| | | | | | | | | | In order to support inverted-formula thermal sensor readout, this commit introduces an 'inverted' field in the SoC-specific structure which allows to specify an inversion of the temperature formula. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: armada: Pass the platform_device to init_sensor()Ezequiel Garcia2014-05-151-4/+7
| | | | | | | | | | | In order to perform SoC-specific quirks on platforms that need them, this commit adds a new parameter to the init_sensor() function. This will be used to support early silicons of the Armada 375 SoC, to workaround some hardware issues. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: armada: Add generic infrastructure to handle the sensorEzequiel Garcia2014-05-151-5/+12
| | | | | | | | | | In order to support similar SoC where the sensor value and valid bit can have different shifts and/or mask, we add such fields to the per-variant structure, instead of having the values hardcoded. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: armada: Add infrastructure to support generic formulasEzequiel Garcia2014-05-151-1/+19
| | | | | | | | | | In order to support other similar SoC, with different sensor coefficients, this commit adds the coeficients to the per-variant structure, instead of having the formula hardcoded. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: armada: Rename armada_thermal_ops structEzequiel Garcia2014-05-151-10/+10
| | | | | | | | | | | | | | As preparation work to add a generic infrastructure to support different SoC variants, the armada_thermal_ops will be used to host the SoC-specific fields, such as formula values and register shifts. For this reason, the name armada_thermal_ops is no longer suitable, and this commit replaces it with armada_thermal_data. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
*---. Merge branches 'misc', 'drv_cleanup', 'devm-cleanup' and 'ti-soc' of .git ↵Zhang Rui2013-05-281-11/+0Star
|\ \ \ | | | | | | | | | | | | into next
| | * | Thermal: don't check resource with devm_ioremap_resourceZhang Rui2013-05-281-10/+0Star
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Vincenzo Frascino <vincenzo.frascino@st.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
| * / Thermal: armada_thermal: Remove redundant platform_set_drvdata()Sachin Kamat2013-05-061-1/+0Star
| |/ | | | | | | | | | | | | | | | | | | | | | | Commit 0998d06310 (device-core: Ensure drvdata = NULL when no driver is bound) removes the need to set driver data field to NULL. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* / Thermal: armada: Remove redundant use of of_match_ptrSachin Kamat2013-05-281-1/+1
|/ | | | | | | | | | 'armada_thermal_id_table' is always compiled in and the driver is dependent on OF. Hence use of of_match_ptr is unnecessary. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* thermal: Add driver for Armada 370/XP SoC thermal managementEzequiel Garcia2013-04-021-0/+232
This driver supports both Armada 370 and Armada XP SoC thermal management controllers. Armada 370 has a register to check a valid temperature, whereas Armada XP does not. Each has a different initialization (i.e. calibration) function. The temperature conversion formula is the same for both. The controller present in each SoC have a very similar feature set, so it corresponds to have one driver to support both of them. Although this driver may present similarities to Dove and Kirkwood thermal driver, the exact differences and coincidences are not fully known. For this reason, support is given through a separate driver. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-11-19 09:40:35 +0100