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* Merge tag 'mfd-for-linus-4.9' of ↵Linus Torvalds2016-10-071-0/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "Core framework: - Add the MFD bindings doc to MAINTAINERS New drivers: - X-Powers AC100 Audio CODEC and RTC - TI LP873x PMIC - Rockchip RK808 PMIC - Samsung Exynos Low Power Audio New device support: - Add support for STMPE1600 variant to stmpe - Add support for PM8018 PMIC to pm8921-core - Add support for AXP806 PMIC in axp20x - Add support for AXP209 GPIO in axp20x New functionality: - Add support for Reset to all STMPE variants - Add support for MKBP event support to cros_ec - Add support for USB to intel_soc_pmic_bxtwc - Add support for IRQs and Power Button to tps65217 Fix-ups: - Clean-up defunct author emails (da9063, max14577) - Kconfig fixups (wm8350-i2c, as37220 - Constify (altera-a10sr, sm501) - Supply PCI IDs (intel-lpss-pci) - Improve clocking (qcom_rpm) - Fix IRQ probing (ucb1x00-core) - Ensure fault log is cleared (da9052) - Remove NO_IRQ check (ucb1x00-core) - Supply I2C properties (intel-lpss-acpi, intel-lpss-pci) - Non standard declaration (tps65217, max8997-irq) - Remove unused code (lp873x, db8500-prcmu, ab8500-debugfs, cros_ec_spi) - Make non-modular (altera-a10sr, intel_msic, smsc-ece1099, sun6i-prcm, twl-core) - OF bindings (ac100, stmpe, qcom-pm8xxx, qcom-rpm, rk808, axp20x, lp873x, exynos5433-lpass, act8945a, aspeed-scu, twl6040, arizona) Bugfixes: - Release OF pointer (qcom_rpm) - Avoid double shifting in suspend/resume (88pm80x) - Fix 'defined but not used' error (exynos-lpass) - Fix 'sleeping whilst attomic' (atmel-hlcdc)" * tag 'mfd-for-linus-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (69 commits) mfd: arizona: Handle probe deferral for reset GPIO mfd: arizona: Remove arizona_of_get_named_gpio helper function mfd: arizona: Add DT options for max_channels_clocked and PDM speaker config mfd: twl6040: Register child device for twl6040-pdmclk mfd: cros_ec_spi: Remove unused variable 'request' mfd: omap-usb-host: Return value is not 'const int' mfd: ab8500-debugfs: Remove 'weak' function suspend_test_wake_cause_interrupt_is_mine() mfd: ab8500-debugfs: Remove ab8500_dump_all_banks_to_mem() mfd: db8500-prcmu: Remove unused *prcmu_set_ddr_opp() calls mfd: ab8500-debugfs: Prevent initialised field from being over-written mfd: max8997-irq: 'inline' should be at the beginning of the declaration mfd: rk808: Fix RK818_IRQ_DISCHG_ILIM initializer mfd: tps65217: Fix nonstandard declaration mfd: lp873x: Remove unused mutex lock from struct lp873x mfd: atmel-hlcdc: Do not sleep in atomic context mfd: exynos-lpass: Mark PM functions as __maybe_unused mfd: intel-lpss: Add default I2C device properties for Apollo Lake mfd: twl-core: Make it explicitly non-modular mfd: sun6i-prcm: Make it explicitly non-modular mfd: smsc-ece1099: Make it explicitly non-modular ...
| * mfd: qcom-rpm: Add support for pm8018 RPM RegulatorNeil Armstrong2016-08-311-0/+22
| | | | | | | | | | | | | | | | | | In order to support the Qualcomm MDM9615 SoC, add support for the RPM regulator entries in the qcom-rpm driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-nextLinus Torvalds2016-10-051-0/+21
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking updates from David Miller: 1) BBR TCP congestion control, from Neal Cardwell, Yuchung Cheng and co. at Google. https://lwn.net/Articles/701165/ 2) Do TCP Small Queues for retransmits, from Eric Dumazet. 3) Support collect_md mode for all IPV4 and IPV6 tunnels, from Alexei Starovoitov. 4) Allow cls_flower to classify packets in ip tunnels, from Amir Vadai. 5) Support DSA tagging in older mv88e6xxx switches, from Andrew Lunn. 6) Support GMAC protocol in iwlwifi mwm, from Ayala Beker. 7) Support ndo_poll_controller in mlx5, from Calvin Owens. 8) Move VRF processing to an output hook and allow l3mdev to be loopback, from David Ahern. 9) Support SOCK_DESTROY for UDP sockets. Also from David Ahern. 10) Congestion control in RXRPC, from David Howells. 11) Support geneve RX offload in ixgbe, from Emil Tantilov. 12) When hitting pressure for new incoming TCP data SKBs, perform a partial rathern than a full purge of the OFO queue (which could be huge). From Eric Dumazet. 13) Convert XFRM state and policy lookups to RCU, from Florian Westphal. 14) Support RX network flow classification to igb, from Gangfeng Huang. 15) Hardware offloading of eBPF in nfp driver, from Jakub Kicinski. 16) New skbmod packet action, from Jamal Hadi Salim. 17) Remove some inefficiencies in snmp proc output, from Jia He. 18) Add FIB notifications to properly propagate route changes to hardware which is doing forwarding offloading. From Jiri Pirko. 19) New dsa driver for qca8xxx chips, from John Crispin. 20) Implement RFC7559 ipv6 router solicitation backoff, from Maciej Żenczykowski. 21) Add L3 mode to ipvlan, from Mahesh Bandewar. 22) Support 802.1ad in mlx4, from Moshe Shemesh. 23) Support hardware LRO in mediatek driver, from Nelson Chang. 24) Add TC offloading to mlx5, from Or Gerlitz. 25) Convert various drivers to ethtool ksettings interfaces, from Philippe Reynes. 26) TX max rate limiting for cxgb4, from Rahul Lakkireddy. 27) NAPI support for ath10k, from Rajkumar Manoharan. 28) Support XDP in mlx5, from Rana Shahout and Saeed Mahameed. 29) UDP replicast support in TIPC, from Richard Alpe. 30) Per-queue statistics for qed driver, from Sudarsana Reddy Kalluru. 31) Support BQL in thunderx driver, from Sunil Goutham. 32) TSO support in alx driver, from Tobias Regnery. 33) Add stream parser engine and use it in kcm. 34) Support async DHCP replies in ipconfig module, from Uwe Kleine-König. 35) DSA port fast aging for mv88e6xxx driver, from Vivien Didelot. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1715 commits) mlxsw: switchx2: Fix misuse of hard_header_len mlxsw: spectrum: Fix misuse of hard_header_len net/faraday: Stop NCSI device on shutdown net/ncsi: Introduce ncsi_stop_dev() net/ncsi: Rework the channel monitoring net/ncsi: Allow to extend NCSI request properties net/ncsi: Rework request index allocation net/ncsi: Don't probe on the reserved channel ID (0x1f) net/ncsi: Introduce NCSI_RESERVED_CHANNEL net/ncsi: Avoid unused-value build warning from ia64-linux-gcc net: Add netdev all_adj_list refcnt propagation to fix panic net: phy: Add Edge-rate driver for Microsemi PHYs. vmxnet3: Wake queue from reset work i40e: avoid NULL pointer dereference and recursive errors on early PCI error qed: Add RoCE ll2 & GSI support qed: Add support for memory registeration verbs qed: Add support for QP verbs qed: PD,PKEY and CQ verb support qed: Add support for RoCE hw init qede: Add qedr framework ...
| * | net: phy: Add Edge-rate driver for Microsemi PHYs.Raju Lakkaraju2016-10-041-0/+21
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Edge-rate: As system and networking speeds increase, a signal's output transition, also know as the edge rate or slew rate (V/ns), takes on greater importance because high-speed signals come with a price. That price is an assortment of interference problems like ringing on the line, signal overshoot and undershoot, extended signal settling times, crosstalk noise, transmission line reflections, false signal detection by the receiving device and electromagnetic interference (EMI) -- all of which can negate the potential gains designers are seeking when they try to increase system speeds through the use of higher performance logic devices. The fact is, faster signaling edge rates can cause a higher level of electrical noise or other type of interference that can actually lead to slower line speeds and lower maximum system frequencies. This parameter allow the board designers to change the driving strange, and thereby change the EMI behavioral. Edge-rate parameters (vddmac, edge-slowdown) get from Device Tree. Tested on Beaglebone Black with VSC 8531 PHY. Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | clk: imx6: fix i.MX6DL clock tree to reflect realityLucas Stach2016-09-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current clock tree only implements the minimal set of differences between the i.MX6Q and the i.MX6DL, but that doesn't really reflect reality. Apply the following fixes to match the RM: - DL has no GPU3D_SHADER_SEL/PODF, the shader domain is clocked by GPU3D_CORE - GPU3D_SHADER_SEL/PODF has been repurposed as GPU2D_CORE_SEL/PODF - GPU2D_CORE_SEL/PODF has been repurposed as MLB_SEL/PODF Cc: stable@vger.kernel.org Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: imx53: Add clocks configurationKalle Kankare2016-09-211-1/+14
| | | | | | | | | | | | | | | | Add clocks configuration for CSI, FIRI and IEEE1588. Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: Add USB3 PHY reset linesVivek Gautam2016-09-171-0/+2
| | | | | | | | | | | | | | Adding missing reset lines for USB 3.0 PHY. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: zx: register ZX296718 clocksJun Nie2016-09-141-0/+163
| | | | | | | | | | | | | | | | The ZX296718 clocks are statically listed and registered. More clock will be added later. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | Merge tag 'sunxi-clk-for-4.9' of ↵Stephen Boyd2016-09-144-0/+507
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Pull Allwinner clock driver changes from Maxime Ripard: Four more SoCs converted to the new clock framework (A31, A31s, A23 and A33). * tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: clk: sunxi-ng: Add hardware dependency clk: sunxi-ng: Add A23 CCU clk: sunxi-ng: Add A33 CCU support clk: sunxi-ng: Add N-class clocks support clk: sunxi-ng: mux: Add mux table macro clk: sunxi-ng: div: Allow to set a maximum clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure clk: sunxi-ng: div: Add mux table macros clk: sunxi-ng: Add A31/A31s clocks clk: sunxi-ng: mux: Add clk notifier functions clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents clk: sunxi-ng: mux: Add support for mux tables clk: sunxi-ng: mux: Rename mux macro to be consistent clk: sunxi-ng: nkm: Add mux to support multiple parents clk: sunxi-ng: mux: Increase fixed pre-divider div size
| * | clk: sunxi-ng: Add A33 CCU supportMaxime Ripard2016-09-102-0/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces the clocks found in the Allwinner A33 CCU. Since this SoC is very similar to the A23, and we share a significant share of the DTSI, the clock IDs that are going to be used will also be shared with the A23, hence the name of the various header files. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
| * | clk: sunxi-ng: Add A31/A31s clocksChen-Yu Tsai2016-08-252-0/+293
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Add a new style driver for the clock control unit in Allwinner A31/A31s. A few clocks are still missing: - MIPI PLL's HDMI mode support - EMAC clock Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | Merge tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung into ↵Stephen Boyd2016-09-143-1/+15
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk-next Pull samsung clk driver updates from Sylwester Nawrocki: In addition to a few clean up and code consolidation patches this includes: - addition of sound subsystem related clocks for Exynos5410 SoC (EPLL, PDMA) and support for "samsung,exynos5410-audss-clock" compatible in the clk-exynos-audss driver, - addition of DRAM controller related clocks for exynos5420, - MAINTAINERS update adding Chanwoo Choi as the Samsung SoC clock drivers co-maintainer. * tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung: clk: samsung: Add support for EPLL on exynos5410 clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup clk: samsung: clk-exynos-audss: Add exynos5410 compatible clk: samsung: clk-exynos-audss: controller variant handling rework clk: samsung: Use common registration function for pll2550x clk: samsung: exynos5410: Expose the peripheral DMA gate clocks clk: samsung: exynos5420: Add clocks for CMU_CDREX domain clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code clk: samsung: exynos5260: Move struct samsung_cmu_info to init section MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)
| * | clk: samsung: Use common registration function for pll2550xSylwester Nawrocki2016-09-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no such significant differences in pll2550x PLL type to justify a separate registration function. This patch adapts exynos5440 driver to use the common function and removes samsung_clk_register_pll2550x(). Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
| * | clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocksSylwester Nawrocki2016-09-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The PDMA{0,1} and EPLL clock IDs are added separately in this patch so the patch can be merged to the arm-soc tree as dependency. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
| * | clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)Chanwoo Choi2016-09-091-1/+10
| |/ | | | | | | | | | | | | | | This patch adds missing clock IDs for CMU_CDREX (DRAM Express Controller) which generates clocks for DRAM and NoC (Network on Chip) busses. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
* | Merge tag 'v4.9-rockchip-clk1' of ↵Stephen Boyd2016-09-071-0/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next Pull rockchip clk driver updates from Heiko Stuebner: The biggest addition is probably the special clock-type for ddr clock control. While reading that clock is done the normal way from the registers, setting it always requires some sort of special handling to let the system survive this addition. As the commit message explains, there are currently 3 handling-types known. General SRAM-based code on rk3288 and before (which is waiting essentially for the PIE support that is currently being worked on), SCPI-based clk setting on the rk3368 through a coprocessor, which we might support once the support for legacy scpi-variants has matured and now on the rk3399 (and probably later) using a dcf controller that is controlled from the arm-trusted-firmware and gets accessed through firmware calls from the kernel. This is the variant we currently support, but the clock type is made to support the other variants in the future as well. Apart from that slightly bigger chunk, we have a mix of PLL rates, clock-ids and flags mainly for the rk3399. And interestingly an iomap fix for the legacy gate driver, where I hopefully could deter the submitter from actually using that in any new works. * tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: use the dclk_vop_frac clock ids on rk3399 clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers clk: rockchip: add 2016M to big cpu clk rate table on rk3399 clk: rockchip: add rk3399 ddr clock support clk: rockchip: add dclk_vop_frac ids for rk3399 vop clk: rockchip: add new clock-type for the ddrclk soc: rockchip: add header for ddr rate SIP interface clk: rockchip: add SCLK_DDRC id for rk3399 ddrc clk: rockchip: handle of_iomap failures in legacy clock driver clk: rockchip: mark rk3399 hdcp_noc and vio_noc as critical clk: rockchip: use general clock flag when registering pll clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399 clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMI
| * | clk: rockchip: add dclk_vop_frac ids for rk3399 vopYakir Yang2016-09-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Export the dclk_vop_frac out, so we can set the dclk_vop as the child of dclk_vop_frac, and then we can start to take use of the fractional dividers. Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | clk: rockchip: add SCLK_DDRC id for rk3399 ddrcLin Huang2016-08-311-0/+1
| |/ | | | | | | | | | | | | Add the needed id for the ddr clock. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | Merge branch 'clk-meson-gxbb' into clk-nextMichael Turquette2016-09-032-2/+3
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| * | clk: meson-gxbb: Export PWM related clocks for DTNeil Armstrong2016-09-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the PWM related clocks in order to be referenced as PWM source clocks. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1471870177-10609-1-git-send-email-narmstrong@baylibre.com
| * | clk: meson: Copy meson8b CLKID defines to private header fileAlexander Müller2016-09-021-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only expose future CLKID constants if necessary. This patch removes CLK_NR_CLKS from the DT bindings but leaves all previously defined CLKIDs there to keep backward compatibility. Signed-off-by: Alexander Müller <serveralex@gmail.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1472319654-59048-5-git-send-email-serveralex@gmail.com
| * | Merge remote-tracking branch 'clk/clk-meson-gxbb-ao' into clk-meson-gxbbMichael Turquette2016-09-022-0/+132
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* | | | clk: gcc-msm8996: add missing pcie phy reset linesSrinivas Kandagatla2016-08-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing 2 PCIE common reset lines. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | | clk: qcom: gdsc: Add the missing BIMC gdsc for msm8996Rajendra Nayak2016-08-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add BIMC gdsc data found in MMCC part of msm8996 family of devices. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | | Merge branch 'clk-meson-gxbb-ao' into clk-nextStephen Boyd2016-08-192-0/+132
|\ \ \ \ | | |/ / | |/| | | | | | | | | | | | | | * clk-meson-gxbb-ao: clk: meson: Add GXBB AO Clock and Reset controller driver dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
| * | | dt-bindings: clock: reset: Add GXBB AO Clock and Reset BindingsNeil Armstrong2016-08-192-0/+132
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | Add documentations and dt-bindings headers for the AO clock and reset controller. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | reset: mediatek: Add MT2701 reset controller dt-binding fileShunli Wang2016-08-191-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dt-binding file about reset controller is used to provide kinds of definition, which is referenced by dts file and IC-specified reset controller driver code. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: mediatek: Add dt-bindings for MT2701 clocksShunli Wang2016-08-191-0/+486
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MT2701 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | Merge branch 'clk-qcom-9615' into clk-nextStephen Boyd2016-08-163-0/+515
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | * clk-qcom-9615: dt-bindings: clock: Update bindings for MDM9615 GCC and LCC clk: mdm9615: Add support for MDM9615 Clock Controllers dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC
| * | | dt-bindings: Add MDM9615 DT bindings include files for GCC and LCCNeil Armstrong2016-08-163-0/+515
| |/ / | | | | | | | | | | | | Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | Merge branch 'clk-meson-gxbb' into clk-nextStephen Boyd2016-08-161-0/+4
|\ \ \ | | |/ | |/| | | | | | | * clk-meson-gxbb: clk: gxbb: add MMC gate clocks, and expose for DT
| * | clk: gxbb: add MMC gate clocks, and expose for DTKevin Hilman2016-08-161-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | Add the SD/eMMC gate clocks and expose them for use by DT. While at it, also explose FCLK_DIV2 since this is one of the input clocks to the mux internal to each of the SD/eMMC blocks. Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* / clk: max77686: Add DT binding details for PMIC MAX77620Laxman Dewangan2016-08-161-0/+21
|/ | | | | | | | | | | | | | | | Maxim has used the same clock IP on multiple PMICs like MAX77686, MAX77802, MAX77620. Only differences are the number of clocks from these PMICs like MAX77686 has 3 clocks output, MAX776802 have two clock output and MAX77620 has one clock output. Add clock binding details and DT example for the MAX77620. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2016-08-025-1/+171
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "Device tree contents continue to be the largest branches we submit. This time around, some of the contents worth pointing out is: New SoC platforms: - Freescale i.MX 7Solo - Broadcom BCM23550 - Cirrus Logic EP7209 and EP7211 (clps711x platforms)_ - Hisilicon HI3519 - Renesas R8A7792 Some of the other delta that is sticking out, line-count wise: - Exynos moves of IP blocks under an SoC bus, which causes a large delta due to indentation changes - a new Tegra K1 board: Apalis - a bunch of small updates to many Allwinner platforms; new hardware support, some cleanup, etc" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits) ARM: dts: sun8i: Add dts file for inet86dz board ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04 ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts ARM: dts: sun5i: reference-design-tablet: Remove mention of q8 ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi ARM: dts: at91: Don't build unnecessary dtbs ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions ARM: dts: at91: at91sam9g25ek: fix isi endpoint node ARM: dts: at91: move isi definition to at91sam9g25ek ARM: dts: at91: fix i2c-gpio node name ARM: dts: at91: vinco: fix regulator name ARM: dts: at91: ariag25 : fix onewire node ...
| * Merge tag 'renesas-dt-fixes-for-v4.8' of ↵Arnd Bergmann2016-07-211-1/+0Star
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Fixes for v4.8" from Simon Horman: * Corrections to r8a7792 * tag 'renesas-dt-fixes-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r8a7792: remove ADSP clock ARM: dts: r8a7792: add PLL1 divided by 2 clock
| | * ARM: dts: r8a7792: remove ADSP clockSergei Shtylyov2016-07-151-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simon Horman told me that R8A7792 has ADSP clock based on an incorrect table in the most recent R-Car gen2 manual. But when I received that manual I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't have ADSP at all. Accordingly remove the ADSP clock from DT for the r8a7792. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | Merge tag 'sti-late-v4.8' of ↵Arnd Bergmann2016-07-141-0/+4
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/late Merge "STi late updates for v4.8" from Patrice Chotard: - Add STi DT critical clocks declaration - Remove SPI hack wich has dependecy with critical clocks These 2 STi DT patches and SPI hack MUST be applied after patches contained into Stephen Boyd's branch clk-next/clk-st-critical. This to ensure not to break SPI. * tag 'sti-late-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: spi: st-ssc4: Remove 'no clocking' hack ARM: sti: stih410-clocks: Identify critical clocks ARM: sti: stih407-family: Supply defines for CLOCKGEN A0 clk: st: clkgen-pll: Detect critical clocks clk: st: clkgen-fsyn: Detect critical clocks clk: st: clk-flexgen: Detect critical clocks
| | * | ARM: sti: stih407-family: Supply defines for CLOCKGEN A0Lee Jones2016-07-121-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are 2 LMI clocks generated by CLOCKGEN A0. We wish to control them individually and need to use these indexes to do so. Signed-off-by: Lee Jones <lee.jones@linaro.org>
| * | | Merge branch 'reset/for-4.8-2' into next/dtArnd Bergmann2016-07-142-0/+385
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merging this in avoids a build error that was missed earlier: In file included from ../arch/arm/boot/dts/meson8b-mxq.dts:48:0: ../arch/arm/boot/dts/meson8b.dtsi:49:53: fatal error: dt-bindings/reset/amlogic,meson8b-reset.h: No such file or directory * reset/for-4.8-2: dt-bindings: reset: Add bindings for the Meson SoC Reset Controller reset: Add support for the Amlogic Meson SoC Reset Controller reset: Return -ENOTSUPP when not configured reset: oxnas: Use devm register API and get rid of platform remove reset: fix Kconfig menu to include reset drivers in sub-menu reset: zynq: use devm_reset_controller_register() reset: socfpga: use devm_reset_controller_register() reset: sunxi: use devm_reset_controller_register() reset: pistachio: use devm_reset_controller_register() reset: ath79: use devm_reset_controller_register() reset: add devm_reset_controller_register API
| * \ \ \ Merge tag 'v4.8-rockchip-dts32-1' of ↵Olof Johansson2016-07-071-0/+15
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Audio support and spi-flash on rk3288-veyron Chromedevices as well as i2s and ethernet support on rk3228/rk3229 devices and a dts file for the rk3229 eval board. * tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add support rk3229 evb board ARM: dts: rockchip: add GMAC nodes for RK322x SoCs ARM: dts: rockchip: add i2s nodes for RK322x SoCs ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi clk: rockchip: add clock-ids for rk3228 MAC clocks clk: rockchip: add clock-ids for rk3228 audio clocks ARM: dts: rockchip: rename i2s model for Veyron devices ARM: dts: rockchip: move rk3288 io-domain nodes to the grf ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards ARM: dts: rockchip: add SPI flash node for rk3288-veyron Signed-off-by: Olof Johansson <olof@lixom.net>
| * \ \ \ \ Merge tag 'renesas-dt2-for-v4.8' of ↵Olof Johansson2016-07-072-0/+129
| |\ \ \ \ \ | | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Second Round of Renesas ARM Based SoC DT Updates for v4.8 * Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC * Update console parameters to uniformly use chosen/stdout-path, serial0, not provide kernel unnecessary command line parameters * Add DU pins to silk board * Add support for blanche/r8a7792 * Name pfc subnodes after device name * tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (41 commits) ARM: dts: r8a7792: add SMP support ARM: dts: r8a7793: Add APMU node and second CPU core ARM: dts: r8a7791: Add APMU node ARM: dts: r8a7790: Add APMU nodes devicetree: bindings: Renesas APMU and SMP Enable method ARM: dts: kzm9g: Update console parameters ARM: dts: kzm9d: Update console parameters ARM: dts: marzen: Add serial port config to chosen/stdout-path ARM: dts: genmai: Update console parameters ARM: dts: armadillo800eva: Update console parameters ARM: dts: r8a7792: add JPU support ARM: dts: r8a7792: add JPU clocks ARM: dts: silk: add DU pins ARM: dts: blanche: add Ethernet support ARM: dts: blanche: initial device tree ARM: dts: blanche: document Blanche board ARM: dts: r8a7792: add IRQC support ARM: dts: r8a7792: add [H]SCIF support ARM: dts: r8a7792: add SYS-DMAC support ARM: dts: r8a7792: initial SoC device tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: dts: r8a7792: add JPU clocksSergei Shtylyov2016-06-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add JPU clock and its parent, M2 clock to the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | ARM: dts: r8a7792: add power domain index macrosSergei Shtylyov2016-06-161-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add macros usable by the device tree sources to reference R8A7792 SYSC power domains by index. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | ARM: dts: r8a7792: add clock index macrosSergei Shtylyov2016-06-161-0/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add macros usable by the device tree sources to reference the R8A7792 clocks by index. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | | Merge tag 'keystone_dts_for_4.8' of ↵Olof Johansson2016-07-051-0/+39
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt ARM: Keystone DTS update for 4.8 - Pinmux entries for K2G - PCI DTS entry fixup * tag 'keystone_dts_for_4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: k2g-evm: Add pinmuxing for UART0 ARM: dts: keystone: Header file for pinctrl constants ARM: dts: k2g: Add pinctrl support ARM: dts: keystone-k2l: Add pinctrl node ARM: dts: keystone: add interrupt property to PCI controller bindings ARM: dts: keystone: remove bogus IO resource entry from PCI binding Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | ARM: dts: keystone: Header file for pinctrl constantsLokesh Vutla2016-06-091-0/+39
| | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinctrl IP used in some of the Keystone 2 devices differ vs other TI SoCs. Therefore, create a Keystone specific pinctrl header. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
| * | | | | Merge tag 'renesas-dt-for-v4.8' of ↵Olof Johansson2016-06-141-1/+0Star
| |\ \ \ \ \ | | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM Based SoC DT Updates for v4.8 * Fix W=1 dtc warnings * Reverence both DMA controllers on R-Car Gen 2 SoCs * Remove nonexistent thermal sensor clock from r8a7794 SoC * Correct unit names for cpu nodes on r8a7790 SoC * Add MMCIF0 to r8a7793 SoC * RTS/CTS hardware flow control for kzm9g and bockw boards * tag 'renesas-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits) ARM: dts: silk: Fix W=1 dtc warnings ARM: dts: porter: Fix W=1 dtc warnings ARM: dts: marzen: Fix W=1 dtc warnings ARM: dts: lager: Fix W=1 dtc warnings ARM: dts: kzm9g: Fix W=1 dtc warnings ARM: dts: kzm9d: Fix W=1 dtc warnings ARM: dts: koelsch: Fix W=1 dtc warnings ARM: dts: gose: Fix W=1 dtc warnings ARM: dts: genmai: Fix W=1 dtc warnings ARM: dts: bockw: Fix W=1 dtc warnings ARM: dts: armadillo800eva: Fix W=1 dtc warnings ARM: dts: ape6evm: Fix W=1 dtc warnings ARM: dts: sh73a0: Fix W=1 dtc warnings ARM: dts: r8a7794: Fix W=1 dtc warnings ARM: dts: r8a7793: Fix W=1 dtc warnings ARM: dts: r8a7791: Fix W=1 dtc warnings ARM: dts: r8a7790: Fix W=1 dtc warnings ARM: dts: r8a7778: Fix W=1 dtc warnings ARM: dts: r8a7740: Fix W=1 dtc warnings ARM: dts: r8a73a4: Fix W=1 dtc warnings ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: dts: r8a7794: Remove nonexistent thermal sensor clockGeert Uytterhoeven2016-05-301-1/+0Star
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the latest information, there is no thermal IP block present on the r8a7794 SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2016-08-024-0/+431
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Driver updates for ARM SoCs. A slew of changes this release cycle. The reset driver tree, that we merge through arm-soc for historical reasons, is also sizable this time around. Among the changes: - clps711x: Treewide changes to compatible strings, merged here for simplicity. - Qualcomm: SCM firmware driver cleanups, move to platform driver - ux500: Major cleanups, removal of old mach-specific infrastructure. - Atmel external bus memory driver - Move of brcmstb platform to the rest of bcm - PMC driver updates for tegra, various fixes and improvements - Samsung platform driver updates to support 64-bit Exynos platforms - Reset controller cleanups moving to devm_reset_controller_register() APIs - Reset controller driver for Amlogic Meson - Reset controller driver for Hisilicon hi6220 - ARM SCPI power domain support" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits) ARM: ux500: consolidate base platform files ARM: ux500: move soc_id driver to drivers/soc ARM: ux500: call ux500_setup_id later ARM: ux500: consolidate soc_device code in id.c ARM: ux500: remove cpu_is_u* helpers ARM: ux500: use CLK_OF_DECLARE() ARM: ux500: move l2x0 init to .init_irq mfd: db8500 stop passing around platform data ASoC: ab8500-codec: remove platform data based probe ARM: ux500: move ab8500_regulator_plat_data into driver ARM: ux500: remove unused regulator data soc: raspberrypi-power: add CONFIG_OF dependency firmware: scpi: add CONFIG_OF dependency video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip pwm: clps711x: Changing the compatibility string to match with the smallest supported chip serial: clps711x: Changing the compatibility string to match with the smallest supported chip irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip clk: clps711x: Changing the compatibility string to match with the smallest supported chip ...
| * \ \ \ \ Merge tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux into ↵Arnd Bergmann2016-07-072-0/+46
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/drivers Merge "Reset controller changes for v4.8, part 3" from Philipp Zabel: - change request API to be more explicit about the difference between exclusive and shared resets (the former guarantee the reset line is asserted immediately when reset_control_assert is called, the latter are refcounted and do not guarantee this). - add Hisilicon hi6220 media subsystem reset controller support - add TI SYSCON based reset controller support * tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux: reset: add TI SYSCON based reset driver Documentation: dt: reset: Add TI syscon reset binding reset: hisilicon: Add hi6220 media subsystem reset support reset: hisilicon: Change to syscon register access arm64: dts: hi6220: Add media subsystem reset dts reset: hisilicon: Add media reset controller binding reset: TRIVIAL: Add line break at same place for similar APIs reset: Supply *_shared variant calls when using *_optional APIs reset: Supply *_shared variant calls when using of_* API reset: Ensure drivers are explicit when requesting reset lines reset: Reorder inline reset_control_get*() wrappers
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-11 09:56:31 +0200