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| | * | | | dt-bindings: clock: add imx7ulp clock binding docA.s. Dong2018-12-031-0/+109
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX7ULP Clock functions are under joint control of the System Clock Generation (SCG) modules, Peripheral Clock Control (PCC) modules, and Core Mode Controller (CMC)1 blocks Note IMX7ULP has two clock domains: M4 and A7. This binding doc is only for A7 clock domain. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-------. \ \ \ Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and ↵Stephen Boyd2018-12-1410-5/+141
| |\ \ \ \ \ \ \ \ | | | | | |_|/ / / | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-rockchip' into clk-next * clk-renesas: clk: renesas: rcar-gen3: Add HS400 quirk for SD clock clk: renesas: rcar-gen3: Add documentation for SD clocks clk: renesas: rcar-gen3: Set state when registering SD clocks clk: renesas: r8a77995: Simplify PLL3 multiplier/divider clk: renesas: r8a77995: Add missing CPEX clock clk: renesas: r8a77995: Remove non-existent SSP clocks clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks clk: renesas: r8a77995: Correct parent clock of DU clk: renesas: r8a77990: Correct parent clock of DU clk: renesas: r8a77970: Add CPEX clock clk: renesas: r8a77965: Add CPEX clock clk: renesas: r8a7796: Add CPEX clock clk: renesas: r8a7795: Add CPEX clock clk: renesas: r8a774a1: Add CPEX clock dt-bindings: clock: r8a7796: Remove CSIREF clock dt-bindings: clock: r8a7795: Remove CSIREF clock clk: renesas: Mark rza2_cpg_clk_register static clk: renesas: r7s9210: Add USB clocks clk: renesas: r8a77970: Add RPC clocks clk: renesas: r7s9210: Add SDHI clocks * clk-allwinner: clk: sunxi-ng: a64: Allow parent change for VE clock clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL clk: sunxi-ng: h3: Allow parent change for ve clock clk: sunxi-ng: add support for suniv F1C100s SoC dt-bindings: clock: Add Allwinner suniv F1C100s CCU clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL clk: sunxi-ng: a64: Fix gate bit of DSI DPHY clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I clk: sunxi-ng: Add support for H6 DE3 clocks dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description clk: sunxi-ng: h6: Set video PLLs limits clk: sunxi-ng: Use u64 for calculation of NM rate clk: sunxi-ng: Adjust MP clock parent rate when allowed clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock * clk-tegra: clk: tegra: Return the exact clock rate from clk_round_rate clk: tegra30: Use Tegra CPU powergate helper function soc/tegra: pmc: Drop SMP dependency from CPU APIs clk: tegra: Fix maximum audio sync clock for Tegra124/210 clk: tegra: get rid of duplicate defines clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC clk: tegra20: Turn EMC clock gate into divider * clk-meson: (25 commits) clk: meson: axg-audio: use the clk input helper function clk: meson: add clk-input helper function clk: meson: Mark some things static clk: meson: meson8b: add the read-only video clock trees clk: meson: meson8b: add the fractional divider for vid_pll_dco clk: meson: meson8b: fix the offset of vid_pll_dco's N value clk: meson: Fix GXL HDMI PLL fractional bits width clk: meson: meson8b: add the CPU clock post divider clocks clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3 clk: meson: clk-regmap: add read-only gate ops clk: meson: meson8b: allow changing the CPU clock tree clk: meson: meson8b: run from the XTAL when changing the CPU frequency clk: meson: meson8b: add support for more M/N values in sys_pll clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel clk: meson: clk-pll: check if the clock is already enabled clk: meson: meson8b: fix the width of the cpu_scale_div clock clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table clk: meson: meson8b: use the HHI syscon if available dt-bindings: clock: meson8b: use the registers from the HHI syscon ... * clk-rockchip: clk: rockchip: add clock-id to gate of ACODEC for rk3328 clk: rockchip: add clock ID of ACODEC for rk3328 clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328 clk: rockchip: fix I2S1 clock gate register for rk3328 clk: rockchip: make rk3188 hclk_vio_bus critical clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering clk: rockchip: fix rk3188 sclk_smc gate data clk: rockchip: fix typo in rk3188 spdif_frac parent
| | | | | | * | | Merge branch 'v4.21-shared/clkids' into v4.21-clk/nextHeiko Stuebner2018-11-261-0/+1
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| | | | | | | * | | clk: rockchip: add clock ID of ACODEC for rk3328Katsuhiro Suzuki2018-11-261-0/+1
| | | | | |_|/ / / | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock ID of audio CODEC (ACODEC) for rk3328. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | | | | | * | | clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328Katsuhiro Suzuki2018-11-191-1/+1
| | | | | |/ / / | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes mistakes in HCLK_I2S1_8CH for running I2S1 successfully. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | | | | * | | dt-bindings: clk: meson-gxbb: Add Video clock bindingsNeil Armstrong2018-11-231-0/+18
| | | | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the video clock bindings covering all the video graphics pipeline and the HDMI controller. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: http://lkml.kernel.org/r/1541516257-16157-4-git-send-email-narmstrong@baylibre.com
| | | | | * / dt-bindings: clock: meson8b: export the CPU post dividersMartin Blumenstingl2018-11-231-0/+4
| | | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are four CPU clock post dividers: - ABP - PERIPH (used as input for the ARM global timer and ARM TWD timer) - AXI - L2 DRAM Export these so we can use them in .dts files. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181122214017.25643-2-martin.blumenstingl@googlemail.com
| | | * | | dt-bindings: clock: Add Allwinner suniv F1C100s CCUMesih Kilinc2018-12-042-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add compatiple string for Allwinner suniv F1C100s CCU. Add clock and reset definitions. Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | | * | | dt-bindings: clock: sun8i-de2: Add H6 DE3 clock descriptionJernej Skrabec2018-11-052-0/+4
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds necessary description and dt includes for H6 DE3 clock. It is very similar to others, but memory region has some additional registers not found in DE2. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | clk: renesas: r8a77995: Add missing CPEX clockGeert Uytterhoeven2018-12-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added the CPEX clock on R-Car D3. This clock can be selected as a clock source for CMT1 (Compare Match Timer Type 1). Add the missing clock to the DT bindings header, and implement support for it in the clock driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>
| | * | | clk: renesas: r8a77995: Remove non-existent SSP clocksGeert Uytterhoeven2018-12-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as this SoC does not have a Stream and Security Processor. As these definitions were never used, they can just be removed. The freed slots in the DT bindings header must not be reused, though. Fixes: 714c53aa2e2d6d60 ("clk: renesas: Add r8a77995 CPG Core Clock Definitions") Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>
| | * | | dt-bindings: clock: r8a7796: Remove CSIREF clockGeert Uytterhoeven2018-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016) removed the CSI reference clock on R-Car M3-W. As this definition was never used, it can just be removed. The freed slot in the DT bindings header must not be reused, though. Fixes: 972610fb23b08dd5 ("clk: renesas: Add r8a7796 CPG Core Clock Definitions") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>
| | * | | dt-bindings: clock: r8a7795: Remove CSIREF clockGeert Uytterhoeven2018-12-041-1/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016) removed the CSI reference clock on R-Car H3. As this definition was never used, it can just be removed. The freed slot in the DT bindings header must not be reused, though. Fixes: 9d0c3c682033d3f1 ("clk: shmobile: Add r8a7795 CPG Core Clock Definitions") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>
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| *-. \ \ Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' ↵Stephen Boyd2018-12-142-18/+2Star
| |\ \ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and 'clk-ops-const' into clk-next - Make devm_of_clk_add_hw_provider() use parent dt node if necessary - Various SPDX taggings - Mark clk_ops const when possible * clk-managed-registration: clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock clk: apcs-msm8916: simplify probe cleanup by using devm clk: clk-twl6040: Free of_provider at remove clk: rk808: use managed version of of_provider registration clk: clk-hi655x: Free of_provider at remove clk: of-provider: look at parent if registered device has no provider info clk: Add kerneldoc to managed of-provider interfaces * clk-spdx: clk: Tag basic clk types with SPDX clk: Tag clk core files with SPDX clk: bcm2835: Switch to SPDX identifier * clk-remove-basic: clk: Loongson1: Remove usage of CLK_IS_BASIC clk: samsung: s3c2410: Remove usage of CLK_IS_BASIC clk: versatile: sp810: Remove usage of CLK_IS_BASIC clk: hisilicon: Remove usage of CLK_IS_BASIC clk: h8300: Remove usage of CLK_IS_BASIC clk: axm5516: Remove usage of CLK_IS_BASIC clk: st: Remove usage of CLK_IS_BASIC clk: renesas: Remove usage of CLK_IS_BASIC * clk-ops-const: clk: s2mps11: constify clk_ops structure clk: pxa: constify clk_ops structures clk: pistachio: constify clk_ops structures clk: palmas: constify clk_ops structure clk: max77686: constify clk_ops structure
| | | * | clk: bcm2835: Switch to SPDX identifierStefan Wahren2018-11-142-18/+2Star
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adopt the SPDX license identifier headers to ease license compliance management. Cc: Simon Arlott <simon@arlott.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * | | Merge branch 'clk-qcom-sdm845-lpass' into clk-nextStephen Boyd2018-12-142-0/+17
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Qualcomm SDM845 audio subsystem clks * clk-qcom-sdm845-lpass: clk: qcom: Add lpass clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM LPASS clock bindings dt-bindings: clock: Update GCC bindings for protected-clocks
| | * | | dt-bindings: clock: Introduce QCOM LPASS clock bindingsTaniya Das2018-12-032-0/+17
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree bindings for Low Power Audio subsystem clock controller for Qualcomm Technology Inc's SDM845 SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *---. \ \ Merge branches 'clk-qcom-kconfig', 'clk-qcom-gpucc', 'clk-qcom-qcs404-rpm', ↵Stephen Boyd2018-12-142-0/+28
| |\ \ \ \ \ | | | |_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-qcom-spi' and 'clk-qcom-videocc-binding' into clk-next - Qualcomm SDM845 GPU clock controllers - Qualcomm QCS404 RPM clk support * clk-qcom-kconfig: clk: qcom: Move to menuconfig and reduce lines * clk-qcom-gpucc: dt-bindings: clock: qcom: Fix the xo parent in gpucc example clk: qcom: gpu_cc_gmu_clk_src has 5 parents, not 6 clk: qcom: Add a dummy enable function for GX gdsc clk: qcom: gdsc: Don't override existing gdsc pd functions clk: qcom: Add graphics clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Graphics clock bindings * clk-qcom-qcs404-rpm: clk: qcom: smd: Add support for QCS404 rpm clocks * clk-qcom-spi: clk: qcom: msm8916: Additional clock rates for spi * clk-qcom-videocc-binding: dt-bindings: clock: Require #reset-cells in sdm845-videocc
| | | | * | clk: qcom: smd: Add support for QCS404 rpm clocksTaniya Das2018-11-061-0/+4
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add rpm smd clocks, PMIC and bus clocks which are required on QCS404 for clients to vote on. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> [bjorn: Dropped cxo, voter clocks and static initialization] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | | * | dt-bindings: clock: Introduce QCOM Graphics clock bindingsAmit Nischal2018-11-281-0/+24
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SDM845 SoCs. Signed-off-by: Amit Nischal <anischal@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Add input clocks property] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * / / clk: mediatek: add clock support for MT7629 SoCRyder Lee2018-11-301-0/+203
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Add all supported clocks exported from every susbystem found on MT7629 SoC. Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* | | Merge tag 'regulator-v4.21' of ↵Linus Torvalds2018-12-251-0/+30
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator updates from Mark Brown: "This has been a very busy release for the core, some fixes, one large new feature and a big bit of refactoring to update the GPIO API: - Support for coupled regulators from Dmitry Osipenko based on a prior attempt by Maciej Purski, allowing us to handle situations where the voltages on two regulators can't be too far apart from each other. - Conversion of the GPIO support in both drivers and the core to use GPIO descriptors rather than numbers, part of the overall project to remove GPIO numbers. - Support for standby mode suspend states from Andrei Stefanescu. - New drivers for Allwinner AXP209, Cirrus Logic Lochnagar and Microchip MPC16502" * tag 'regulator-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (90 commits) regulator: tps65910: fix a missing check of return value regulator: mcp16502: Select REGMAP_I2C to fix build error regulator: convert to DEFINE_SHOW_ATTRIBUTE regulator: mcp16502: Fix missing n_voltages setting regulator: mcp16502: Use #ifdef CONFIG_PM_SLEEP around mcp16502_suspend/resume_noirq regulator: mcp16502: code cleanup regulator: act8945a-regulator: make symbol act8945a_pm static drivers/regulator: fix a missing check of return value regulator: act8945a-regulator: fix 'defined but not used' compiler warning regulator: axp20x: fix set_ramp_delay for AXP209/dcdc2 regulator: mcp16502: add support for suspend mfd: axp20x: use explicit bit defines mfd: axp20x: Clean up included headers regulator: dts: enable soft-start and ramp delay for the OLinuXino Lime2 dt-bindings: mfd: axp20x: Add software based soft_start for AXP209 LDO3 regulator: axp20x: add software based soft_start for AXP209 LDO3 dt-bindings: mfd: axp20x: add support for regulator-ramp-delay for AXP209 regulator: axp20x: add support for set_ramp_delay for AXP209 mfd: axp20x: name voltage ramping define properly regulator: mcp16502: add regulator driver for MCP16502 ...
| * | | regulator: act8945a-regulator: Implement PM functionalitiesBoris Brezillon2018-12-121-0/+30
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The regulator supports a dedicated suspend mode. Implement the appropriate ->set_suspend_xx() hooks, add support for ->set_mode(), and provide basic PM ops functionalities to setup the regulator in a suspend state when the system is entering suspend. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> [claudiu.beznea@microchip.com: remove shutdown function, use dev_pm_ops, fix checkpatch warning, adapt commit message, add LDO modes support, move modes constants to active-semi,8945a-regulator.h, remove rdevs from struct act8945a_pmic, add op_mode to act8945a_pmic] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | | Merge tag 'sound-4.21-rc1' of ↵Linus Torvalds2018-12-251-0/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "There are no intensive changes in both ALSA and ASoC core parts while rather most of changes are a bunch of driver fixes and updates. A large diff pattern appears in ASoC TI part which now merges both OMAP and DaVinci stuff, but the rest spreads allover the places. Note that this pull request includes also some updates for LED trigger and platform drivers for mute LEDs, appearing in the diffstat as well. Some highlights: ASoC: - Preparatory work for merging the audio-graph and audio-graph-scu cards - A merge of TI OMAP and DaVinci directories, as both product lines get merged together. Also including a few architecture changes as well. - Major cleanups of the Maxim MAX9867 driver - Small fixes for tablets & co with Intel BYT/CHT chips - Lots of rsnd updates as usual - Support for Asahi Kaesi AKM4118, AMD ACP3x, Intel platforms with RT5660, Meson AXG S/PDIF inputs, several Qualcomm IPs and Xilinx I2S controllers HD-audio: - Introduce audio-mute LED trigger for replacing the former hackish dynamic binding - Huawei WMI hotkey and mute LED support - Refactoring of PM code and display power controls - Headset button support in the generic jack code - A few updates for Tegra - Fixups for HP EliteBook and ASUS UX391UA - Lots of updates for Intel ASoC HD-audio, including the improved DSP detection and the fallback binding from ASoC SST to legacy HD-audio controller drivers Others: - Updates for FireWire TASCAM and Fireface devices, some other fixes - A few potential Spectre v1 fixes that are all trivial" * tag 'sound-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (280 commits) ALSA: HD-Audio: SKL+: force HDaudio legacy or SKL+ driver selection ALSA: HD-Audio: SKL+: abort probe if DSP is present and Skylake driver selected ALSA: HDA: export process_unsol_events() ALSA: hda/realtek: Enable audio jacks of ASUS UX391UA with ALC294 ALSA: bebob: fix model-id of unit for Apogee Ensemble ALSA: emu10k1: Fix potential Spectre v1 vulnerabilities ALSA: rme9652: Fix potential Spectre v1 vulnerability ASoC: ti: Kconfig: Remove the deprecated options ARM: davinci_all_defconfig: Update the audio options ARM: omap1_defconfig: Do not select ASoC by default ARM: omap2plus_defconfig: Update the audio options ARM: davinci: dm365-evm: Update for the new ASoC Kcofnig options ARM: OMAP2: Update for new MCBSP Kconfig option ARM: OMAP1: Makefile: Update for new MCBSP Kconfig option MAINTAINERS: Add entry for sound/soc/ti and update the OMAP audio support ASoC: ti: Merge davinci and omap directories ALSA: hda: add mute LED support for HP EliteBook 840 G4 ALSA: fireface: code refactoring to handle model-specific registers ALSA: fireface: add support for packet streaming on Fireface 800 ALSA: fireface: allocate isochronous resources in mode-specific implementation ...
| * | | ASoC: qdsp6: dt-bindings: Add q6afe display_port dt bindingRohit kumar2018-12-141-0/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | This patch adds bindings required for DISPLAY_PORT_RX port on AFE. Signed-off-by: Rohit kumar <rohitkr@codeaurora.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* / / media: xilinx: Use SPDX-License-IdentifierDhaval Shah2018-12-031-4/+1Star
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | SPDX-License-Identifier is used for the Xilinx Video IP and related drivers. [Added drivers/media/platform/xilinx/Kconfig] [Added drivers/media/platform/xilinx/Makefile] [Added include/dt-bindings/media/xilinx-vip.h] Signed-off-by: Dhaval Shah <dhaval23031987@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
* | Merge tag 'clk-for-linus' of ↵Linus Torvalds2018-10-3145-214/+1683
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This time it looks like a quieter release cycle in the clk tree. I guess that's because of summer time holidays/vacations. The biggest change in the diffstat is in the Qualcomm clk driver, where they got support for CPUs and handful of SoCs. After that, the at91 driver got a major rewrite for newer DT bindings that should make things easier going forward and the TI code moved to a clockdomain based design. The long tail is mostly small driver updates for newer clks and some simpler SoC clock drivers such as the Hisilicon and imx support. In the core framework, we only have two small changes this time. One is a new clk API to get all clks for a device with the bulk clk APIs. This allows drivers that don't care about doing anything besides turning on all the clks to just clk_get() them all and turn them on. The other change is the beginning of a way to support save and restore of clk settings in the clk framework. TI is the only user right now, but we will want to expand upon this design in the future to support more save and restore of clk registers. At least this gets us started and works well enough for one SoC, but there's more work in the future. Core: - clk_bulk_get_all() API and friends to get all the clks for a device - Basic clk state save/restore hooks New Drivers: - Renesas RZ/A2 (R7S9210) SoC, including early clocks - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs - Rensas RZ/G2M (r8a774a1) SoC - Qualcomm Krait CPU clk support - Qualcomm QCS404 GCC support - Qualcomm SDM660 GCC support - Qualcomm SDM845 camera clock controller - Ingenic jz4725b CGU - Hisilicon 3670 SoC support - TI SCI clks on K3 SoCs - iMX6 MMDC clks - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs Updates: - Rework at91 PMC clock driver for new DT bindings - Nvidia Tegra clk driver MBIST workaround fix - S2RAM support for Marvell mvebu periph clks - Use updated printk format for OF node names - Fix TI code to only search DT subnodes - Various static analysis finds - Tag various drivers with SPDX license tags - Support dynamic frequency switching (DFS) on qcom SDM845 GCC - Only use s2mps11 dt-binding defines instead of redefining them in the driver - Add some more missing clks to qcom MSM8996 GCC - Quad SPI clks on qcom SDM845 - Add support for CMT timer clocks on R-Car V3H - Add support for SHDI and various timer clocks on R-Car V3M - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs - Amlogic clk-pll driver improvements and updates - Amlogic axg audio controller system clocks - Register Amlogic meson8b clock controller early - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC - Remove obsoleted Exynos4212 ISP clock definitions - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design - TI RTC+DDR sleep mode support for clock save/restore - Allwinner A64 display engine support and fixes - Allwinner A83t display engine support and fixes" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits) clk: qcom: Remove unused arrays in SDM845 GCC clk: fixed-rate: fix of_node_get-put imbalance clk: s2mps11: Add used attribute to s2mps11_dt_match clk: qcom: gcc-sdm660: Add MODULE_LICENSE clk: qcom: Add safe switch hook for krait mux clocks dt-bindings: clock: Document qcom,krait-cc clk: qcom: Add Krait clock controller driver dt-bindings: arm: Document qcom,kpss-gcc clk: qcom: Add KPSS ACC/GCC driver clk: qcom: Add support for Krait clocks clk: qcom: Add IPQ806X's HFPLLs clk: qcom: Add MSM8960/APQ8064's HFPLLs dt-bindings: clock: Document qcom,hfpll clk: qcom: Add HFPLL driver clk: qcom: Add support for High-Frequency PLLs (HFPLLs) ARM: Add Krait L2 register accessor functions clk: imx6q: add mmdc0 ipg clock clk: imx6sl: add mmdc ipg clocks clk: imx6sll: add mmdc1 ipg clock clk: imx6sx: add mmdc1 ipg clock ...
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| *-----. \ Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and ↵Stephen Boyd2018-10-197-6/+15
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-smp2s11-match' into clk-next - iMX6 MMDC clks - Qualcomm Krait CPU clk support * clk-imx6-mmdc: clk: imx6q: add mmdc0 ipg clock clk: imx6sl: add mmdc ipg clocks clk: imx6sll: add mmdc1 ipg clock clk: imx6sx: add mmdc1 ipg clock clk: imx6ul: add mmdc1 ipg clock * clk-qcom-krait: clk: qcom: Add safe switch hook for krait mux clocks dt-bindings: clock: Document qcom,krait-cc clk: qcom: Add Krait clock controller driver dt-bindings: arm: Document qcom,kpss-gcc clk: qcom: Add KPSS ACC/GCC driver clk: qcom: Add support for Krait clocks clk: qcom: Add IPQ806X's HFPLLs clk: qcom: Add MSM8960/APQ8064's HFPLLs dt-bindings: clock: Document qcom,hfpll clk: qcom: Add HFPLL driver clk: qcom: Add support for High-Frequency PLLs (HFPLLs) ARM: Add Krait L2 register accessor functions * clk-rockchip: clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call clk: rockchip: use the newly added clock-id for hdmi on RK3066 clk: rockchip: add clock-id for HCLK_HDMI on rk3066 clk: rockchip: fix wrong mmc sample phase shift for rk3328 clk: rockchip: improve rk3288 pll rates for better hdmi output * clk-smp2s11-match: clk: s2mps11: Add used attribute to s2mps11_dt_match clk: s2mps11: Fix matching when built as module and DT node contains compatible
| | | | * | | clk: rockchip: add clock-id for HCLK_HDMI on rk3066Heiko Stuebner2018-10-111-1/+2
| | | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RK3066 and RK3188 share most of the clock controller but the rk3066 does have an internal hdmi encoder and associated clock. Therefore add a clock-id so that this clock can be used. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | | * / / clk: qcom: Add MSM8960/APQ8064's HFPLLsStephen Boyd2018-10-171-0/+2
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Describe the HFPLLs present on MSM8960 and APQ8064 devices. Acked-by: Rob Herring <robh@kernel.org> (bindings) Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Tested-by: Craig Tatlor <ctatlor97@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | clk: imx6q: add mmdc0 ipg clockAnson Huang2018-10-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6Q has MMDC0 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | clk: imx6sl: add mmdc ipg clocksAnson Huang2018-10-171-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6SL has MMDC0 and MMDC1 ipg clock in CCM CCGR, add them into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | clk: imx6sll: add mmdc1 ipg clockAnson Huang2018-10-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | clk: imx6sx: add mmdc1 ipg clockAnson Huang2018-10-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6SX has MMDC1 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | clk: imx6ul: add mmdc1 ipg clockAnson Huang2018-10-171-1/+2
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6UL has MMDC1 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *---. \ \ Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' ↵Stephen Boyd2018-10-193-0/+114
| |\ \ \ \ \ | | | | |/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and 'clk-at91-pmc-rework' into clk-next - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs - Rework at91 PMC clock driver for new DT bindings * clk-actions-reset: clk: actions: Add Actions Semi S900 SoC Reset Management Unit support clk: actions: Add Actions Semi S700 SoC Reset Management Unit support clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support dt-bindings: reset: Add binding constants for Actions Semi S900 RMU dt-bindings: reset: Add binding constants for Actions Semi S700 RMU dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs clk: actions: Cache regmap info in private clock descriptor * clk-imx7-init-critical: clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clk clk: imx: cpu clock should be always critical clk: imx: imx7d: remove clks_init_on array clk: imx: imx7d: remove unnecessary clocks from clks_init_on array * clk-mmp2-ids: clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk * clk-at91-pmc-rework: clk: at91: move DT compatibility code to its own file clk: at91: add at91sam9rl PMC driver clk: at91: add at91sam9x5 PMCs driver clk: at91: add at91sam9260 PMC driver clk: at91: add sama5d2 PMC driver clk: at91: add sama5d4 pmc driver clk: at91: add new DT lookup function dt-bindings: clk: at91: Document new PMC binding clk: at91: add pmc_data struct and helpers clk: at91: allow clock registration from C code clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated() clk: at91: audio-pll: separate registration from DT parsing clk: at91: h32mx: separate registration from DT parsing clk: at91: generated: SSCs don't have a gclk clk: at91: audio-pll: fix audio pmc type
| | | | * | clk: at91: add new DT lookup functionAlexandre Belloni2018-10-171-0/+15
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new DT lookup function to lookup for PMC clocks. Note that the #ifndef AT91_PMC_MOSCS section will be removed once all the platforms are converted. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | dt-bindings: reset: Add binding constants for Actions Semi S900 RMUManivannan Sadhasivam2018-10-161-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree binding constants for Actions Semi S900 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | dt-bindings: reset: Add binding constants for Actions Semi S700 RMUManivannan Sadhasivam2018-10-161-0/+34
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree binding constants for Actions Semi S700 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * | | Merge branch 'clk-ingenic-jz4725b' into clk-nextStephen Boyd2018-10-191-0/+35
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Ingenic jz4725b CGU * clk-ingenic-jz4725b: clk: Add Ingenic jz4725b CGU driver dt-bindings: clock: Add jz4725b-cgu.h header dt-bindings: clock: ingenic: Explicitly list compatible strings clk: ingenic: Add proper Kconfig entries
| | * | | dt-bindings: clock: Add jz4725b-cgu.h headerPaul Cercueil2018-10-171-0/+35
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4725b-cgu driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * | | Merge branch 'clk-qcom-qcs404' into clk-nextStephen Boyd2018-10-191-0/+165
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Qualcomm QCS404 GCC support * clk-qcom-qcs404: clk: qcom: gcc: Add global clock controller driver for QCS404 clk: qcom: Export clk_alpha_pll_configure()
| | * | | clk: qcom: gcc: Add global clock controller driver for QCS404Shefali Jain2018-10-171-0/+165
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the clocks supported in global clock controller which clock the peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks to the clock framework for the clients to be able to request for them. Signed-off-by: Shefali Jain <shefjain@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Co-developed-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> [bamse, vkoul: rebase and tidyup for upstream] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Lowercase hex] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * | | Merge branch 'clk-qcom-sdm660' into clk-nextStephen Boyd2018-10-191-0/+156
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Qualcomm SDM660 GCC support * clk-qcom-sdm660: clk: qcom: gcc-sdm660: Add MODULE_LICENSE clk: qcom: Add Global Clock controller (GCC) driver for SDM660
| | * | | clk: qcom: Add Global Clock controller (GCC) driver for SDM660Taniya Das2018-10-171-0/+156
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the global clock controller found on SDM660 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Based on CAF implementation. Signed-off-by: Taniya Das <tdas@codeaurora.org> [craig: rename parents to fit upstream, and other cleanups] Signed-off-by: Craig Tatlor <ctatlor97@gmail.com> Acked-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Rename gcc_660 to gcc_sdm660 and fix numbering of defines to avoid duplicates] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *---. | | Merge branches 'clk-samsung', 'clk-hisi3670' and 'clk-at91-div-0' into clk-nextStephen Boyd2018-10-1912-80/+365
| |\ \ \| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Hisilicon 3670 SoC support * clk-samsung: dt-bindings: clock: samsung: Add SPDX license identifiers clk: samsung: Use clk_hw API for calling clk framework from clk notifiers clk: samsung: exynos5420: Enable PERIS clocks for suspend clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420 clk: samsung: exynos5433: Keep sclk_uart clocks enabled in suspend clk: samsung: Remove obsolete code for Exynos4412 ISP clocks clk: samsung: exynos5433: Add suspend state for TOP, CPIF & PERIC CMUs clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume clk: samsung: exynos5420: Use generic helper for handling suspend/resume clk: samsung: exynos4: Use generic helper for handling suspend/resume clk: samsung: Add support for setting registers state before suspend clk: samsung: exynos5250: Use generic helper for handling suspend/resume clk: samsung: s5pv210: Use generic helper for handling suspend/resume clk: samsung: s3c64xx: Use generic helper for handling suspend/resume clk: samsung: s3c2443: Use generic helper for handling suspend/resume clk: samsung: s3c2412: Use generic helper for handling suspend/resume clk: samsung: s3c2410: Use generic helper for handling suspend/resume clk: samsung: Remove excessive include * clk-hisi3670: clk: hisilicon: Add clock driver for Hi3670 SoC dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk * clk-at91-div-0: clk: at91: Fix division by zero in PLL recalc_rate()
| | | * | | dt-bindings: clk: hisilicon: Add bindings for Hi3670 clkManivannan Sadhasivam2018-10-161-0/+348
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add devicetree bindings for HiSilicon Hi3670 clock controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | dt-bindings: clock: samsung: Add SPDX license identifiersKrzysztof Kozlowski2018-10-0511-50/+17Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace GPL license statements with SPDX license identifiers (GPL-2.0). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
| | * | | clk: samsung: Remove obsolete code for Exynos4412 ISP clocksMarek Szyprowski2018-10-051-30/+0Star
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos4412 ISP clock are provided by separate Exynos4412 ISP clock driver, so support for them in Exynos4-clk driver can be removed. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
| * | | Merge branch 'clk-ti' into clk-nextStephen Boyd2018-10-193-68/+509
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * clk-ti: clk: ti: Prepare for remove of OF node name clk: Clean up suspend/resume coding style clk: ti: Add functions to save/restore clk context clk: clk: Add clk_gate_restore_context function clk: Add functions to save/restore clock context en-masse clk: ti: dra7: add new clkctrl data clk: ti: dra7xx: rename existing clkctrl data as compat data clk: ti: am43xx: add new clkctrl data for am43xx clk: ti: am43xx: rename existing clkctrl data as compat data clk: ti: am33xx: add new clkctrl data for am33xx clk: ti: am33xx: rename existing clkctrl data as compat data clk: ti: clkctrl: replace dashes from clkdm name with underscore clk: ti: clkctrl: support multiple clkctrl nodes under a cm node dt-bindings: clock: dra7xx: add clkctrl indices for new data layout dt-bindings: clock: am43xx: add clkctrl indices for new data layout dt-bindings: clock: am33xx: add clkctrl indices for new data layout
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-08 23:40:34 +0200