From d2f112a5681078aa2150f218074f76617fea4d74 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Mon, 5 Nov 2018 09:48:34 +0100 Subject: Docs/EDID: Fixed erroneous bits of XOFFSET, XPULSE, YOFFSET and YPULSE The problem was found when EDID data sets for displays other than the provided samples were generated. The patch has no effect on the provided samples that still match the data used in drivers/gpu/drm/drm_edid_load.c. The provided samples use small values for XOFFSET, XPULSE, YOFFSET and YPULSE, where the error doesn't occur. This fix corrects the use of that values in case of high values, because the most significant bits were treated incorrectly. So in edid.S msbs4 should use bit 8 and 9 of XOFFSET and XPULS. For YOFFSET and YPULSE msbs4 should use bit 4 and 5. lsbs2 was introduced for a better overview, without functional change. Removing also the useless value 63 of all files, because it is added in the *.S description files and then it is subtracted in edid.S. Signed-off-by: Christoph Niedermaier Reviewed-by: Carsten Emde Signed-off-by: Jonathan Corbet --- Documentation/EDID/HOWTO.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/EDID/HOWTO.txt') diff --git a/Documentation/EDID/HOWTO.txt b/Documentation/EDID/HOWTO.txt index 835db332289b..7d05a7d30a79 100644 --- a/Documentation/EDID/HOWTO.txt +++ b/Documentation/EDID/HOWTO.txt @@ -45,8 +45,8 @@ EDID: #define YPIX vdisp #define YBLANK vtotal-vdisp -#define YOFFSET (63+(vsyncstart-vdisp)) -#define YPULSE (63+(vsyncend-vsyncstart)) +#define YOFFSET vsyncstart-vdisp +#define YPULSE vsyncend-vsyncstart The CRC value in the last line #define CRC 0x55 -- cgit v1.2.3-55-g7522