From f5cedc84a30d2d3d0e0a7f3eb53fbd66d9bf5517 Mon Sep 17 00:00:00 2001 From: Catherine Sullivan Date: Mon, 1 Jul 2019 15:57:53 -0700 Subject: gve: Add transmit and receive support Add support for passing traffic. Signed-off-by: Catherine Sullivan Signed-off-by: Sagi Shahar Signed-off-by: Jon Olson Acked-by: Willem de Bruijn Reviewed-by: Luigi Rizzo Signed-off-by: David S. Miller --- .../networking/device_drivers/google/gve.rst | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'Documentation/networking/device_drivers') diff --git a/Documentation/networking/device_drivers/google/gve.rst b/Documentation/networking/device_drivers/google/gve.rst index 7397c82f4c8f..df8974fb3270 100644 --- a/Documentation/networking/device_drivers/google/gve.rst +++ b/Documentation/networking/device_drivers/google/gve.rst @@ -42,6 +42,8 @@ The driver interacts with the device in the following ways: - See description below - Interrupts - See supported interrupts below + - Transmit and Receive Queues + - See description below Registers --------- @@ -80,3 +82,31 @@ Notification Block Interrupts ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The notification block interrupts are used to tell the driver to poll the queues associated with that interrupt. + +The handler for these irqs schedule the napi for that block to run +and poll the queues. + +Traffic Queues +-------------- +gVNIC's queues are composed of a descriptor ring and a buffer and are +assigned to a notification block. + +The descriptor rings are power-of-two-sized ring buffers consisting of +fixed-size descriptors. They advance their head pointer using a __be32 +doorbell located in Bar2. The tail pointers are advanced by consuming +descriptors in-order and updating a __be32 counter. Both the doorbell +and the counter overflow to zero. + +Each queue's buffers must be registered in advance with the device as a +queue page list, and packet data can only be put in those pages. + +Transmit +~~~~~~~~ +gve maps the buffers for transmit rings into a FIFO and copies the packets +into the FIFO before sending them to the NIC. + +Receive +~~~~~~~ +The buffers for receive rings are put into a data ring that is the same +length as the descriptor ring and the head and tail pointers advance over +the rings together. -- cgit v1.2.3-55-g7522