From fe6ba88b251aa76a94be2cb441d2e6b7c623b989 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 16 Jul 2019 16:27:01 -0700 Subject: arch: replace _BITUL() in kernel-space headers with BIT() Now that BIT() can be used from assembly code, we can safely replace _BITUL() with equivalent BIT(). UAPI headers are still required to use _BITUL(), but there is no more reason to use it in kernel headers. BIT() is shorter. Link: http://lkml.kernel.org/r/20190609153941.17249-2-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada Cc: Heiko Carstens Cc: Vasily Gorbik Cc: Christian Borntraeger Cc: Vineet Gupta Cc: Catalin Marinas Cc: Will Deacon Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/arc/include/asm/pgtable.h | 8 ++++---- arch/arc/plat-eznps/include/plat/ctop.h | 15 ++++++++------- 2 files changed, 12 insertions(+), 11 deletions(-) (limited to 'arch/arc') diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index da446180f17b..1d87c18a2976 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -32,7 +32,7 @@ #ifndef _ASM_ARC_PGTABLE_H #define _ASM_ARC_PGTABLE_H -#include +#include #define __ARCH_USE_5LEVEL_HACK #include #include @@ -215,11 +215,11 @@ #define BITS_FOR_PTE (PGDIR_SHIFT - PAGE_SHIFT) #define BITS_FOR_PGD (32 - PGDIR_SHIFT) -#define PGDIR_SIZE _BITUL(PGDIR_SHIFT) /* vaddr span, not PDG sz */ +#define PGDIR_SIZE BIT(PGDIR_SHIFT) /* vaddr span, not PDG sz */ #define PGDIR_MASK (~(PGDIR_SIZE-1)) -#define PTRS_PER_PTE _BITUL(BITS_FOR_PTE) -#define PTRS_PER_PGD _BITUL(BITS_FOR_PGD) +#define PTRS_PER_PTE BIT(BITS_FOR_PTE) +#define PTRS_PER_PGD BIT(BITS_FOR_PGD) /* * Number of entries a user land program use. diff --git a/arch/arc/plat-eznps/include/plat/ctop.h b/arch/arc/plat-eznps/include/plat/ctop.h index 309a994f64f0..a4a61531c7fb 100644 --- a/arch/arc/plat-eznps/include/plat/ctop.h +++ b/arch/arc/plat-eznps/include/plat/ctop.h @@ -10,6 +10,7 @@ #error "Incorrect ctop.h include" #endif +#include #include #include @@ -51,19 +52,19 @@ #define CTOP_INST_AXOR_DI_R2_R2_R3 0x4A664C06 /* Do not use D$ for address in 2G-3G */ -#define HW_COMPLY_KRN_NOT_D_CACHED _BITUL(28) +#define HW_COMPLY_KRN_NOT_D_CACHED BIT(28) #define NPS_MSU_EN_CFG 0x80 #define NPS_CRG_BLKID 0x480 -#define NPS_CRG_SYNC_BIT _BITUL(0) +#define NPS_CRG_SYNC_BIT BIT(0) #define NPS_GIM_BLKID 0x5C0 /* GIM registers and fields*/ -#define NPS_GIM_UART_LINE _BITUL(7) -#define NPS_GIM_DBG_LAN_EAST_TX_DONE_LINE _BITUL(10) -#define NPS_GIM_DBG_LAN_EAST_RX_RDY_LINE _BITUL(11) -#define NPS_GIM_DBG_LAN_WEST_TX_DONE_LINE _BITUL(25) -#define NPS_GIM_DBG_LAN_WEST_RX_RDY_LINE _BITUL(26) +#define NPS_GIM_UART_LINE BIT(7) +#define NPS_GIM_DBG_LAN_EAST_TX_DONE_LINE BIT(10) +#define NPS_GIM_DBG_LAN_EAST_RX_RDY_LINE BIT(11) +#define NPS_GIM_DBG_LAN_WEST_TX_DONE_LINE BIT(25) +#define NPS_GIM_DBG_LAN_WEST_RX_RDY_LINE BIT(26) #ifndef __ASSEMBLY__ /* Functional registers definition */ -- cgit v1.2.3-55-g7522