From ed16067205d79aef6ab885a662380fd1dad3ff6a Mon Sep 17 00:00:00 2001 From: Sandeep Paulraj Date: Thu, 27 Aug 2009 16:39:43 -0400 Subject: DaVinci: DM365: Correct USB parent clock The parent clock for the USB source clock is actually PLL1 aux clock, not PLL2 sysclk1. Signed-off-by: Sandeep Paulraj Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index e81517434703..6c948b1fc406 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -369,7 +369,7 @@ static struct clk timer3_clk = { static struct clk usb_clk = { .name = "usb", - .parent = &pll2_sysclk1, + .parent = &pll1_aux_clk, .lpsc = DAVINCI_LPSC_USB, }; -- cgit v1.2.3-55-g7522