From f9f0e3b1f7ac4e9fa822e87dd4bbb38f8c389487 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Tue, 17 Nov 2009 09:45:59 +0000 Subject: Blackfin: bf537-stamp: update GPIO CS devices Now that we've rewritten the GPIO CS handling in the Blackfin SPI peripheral, we need to update the platform resources accordingly. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger --- arch/blackfin/mach-bf537/boards/stamp.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'arch/blackfin/mach-bf537') diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 68a27bccc7d4..a3f172fdda99 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c @@ -824,14 +824,12 @@ static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { static struct bfin5xx_spi_chip enc28j60_spi_chip_info = { .enable_dma = 1, .bits_per_word = 8, - .cs_gpio = GPIO_PF10, }; #endif #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE) static struct bfin5xx_spi_chip adf7021_spi_chip_info = { .bits_per_word = 16, - .cs_gpio = GPIO_PF10, }; #include @@ -1103,7 +1101,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ .irq = IRQ_PF6, .bus_num = 0, - .chip_select = 0, /* GPIO controlled SSEL */ + .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ .controller_data = &enc28j60_spi_chip_info, .mode = SPI_MODE_0, }, @@ -1125,7 +1123,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { .modalias = "adf702x", .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */ .bus_num = 0, - .chip_select = 0, /* GPIO controlled SSEL */ + .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ .controller_data = &adf7021_spi_chip_info, .platform_data = &adf7021_platform_data, .mode = SPI_MODE_0, @@ -1148,7 +1146,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) /* SPI controller data */ static struct bfin5xx_spi_master bfin_spi0_info = { - .num_chipselect = 8, + .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS, .enable_dma = 1, /* master has the ability to do dma transfer */ .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, }; -- cgit v1.2.3-55-g7522