From 1b2c2b12386f9bb009a2249eca00e01a9d76d7c1 Mon Sep 17 00:00:00 2001 From: Alistair Popple Date: Wed, 6 Sep 2017 11:49:00 +1000 Subject: powerpc/powernv/npu: Don't explicitly flush nmmu tlb The nest mmu required an explicit flush as a tlbi would not flush it in the same way as the core. However an alternate firmware fix exists which should eliminate the need for this flush, so instead add a device-tree property (ibm,nmmu-flush) on the NVLink2 PHB to enable it only if required. Signed-off-by: Alistair Popple Reviewed-by: Frederic Barrat Signed-off-by: Michael Ellerman --- arch/powerpc/platforms/powernv/pci.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/powerpc/platforms/powernv/pci.h') diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h index 56d1f272d4ad..96151b3a2dd4 100644 --- a/arch/powerpc/platforms/powernv/pci.h +++ b/arch/powerpc/platforms/powernv/pci.h @@ -187,6 +187,9 @@ struct pnv_phb { /* Bitmask for MMIO register usage */ unsigned long mmio_atsd_usage; + + /* Do we need to explicitly flush the nest mmu? */ + bool nmmu_flush; } npu; #ifdef CONFIG_CXL_BASE -- cgit v1.2.3-55-g7522