From bcc28ee0bf390df0d81cc9dafe980faef6b2771a Mon Sep 17 00:00:00 2001 From: David S. Miller Date: Thu, 2 Mar 2006 20:42:53 -0800 Subject: [SPARC64]: Fix sun4v mna winfixup handling. We were clobbering a base register before we were done using it. Fix a comment typo while we're here. Signed-off-by: David S. Miller --- arch/sparc64/kernel/sun4v_tlb_miss.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/sparc64') diff --git a/arch/sparc64/kernel/sun4v_tlb_miss.S b/arch/sparc64/kernel/sun4v_tlb_miss.S index 3eed8db96848..ab23ddb7116e 100644 --- a/arch/sparc64/kernel/sun4v_tlb_miss.S +++ b/arch/sparc64/kernel/sun4v_tlb_miss.S @@ -18,7 +18,7 @@ /* DEST = (VADDR >> 22) * - * Branch to ZERO_CTX_LABEL is context is zero. + * Branch to ZERO_CTX_LABEL if context is zero. */ #define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \ srlx VADDR, 22, DEST; \ @@ -314,10 +314,10 @@ sun4v_mna: nop SET_GL(1) - ldxa [%g0] ASI_SCRATCHPAD, %g5 - ldx [%g5 + HV_FAULT_D_ADDR_OFFSET], %g5 + ldxa [%g0] ASI_SCRATCHPAD, %g2 + ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g5 mov HV_FAULT_TYPE_UNALIGNED, %g3 - ldx [%g5 + HV_FAULT_D_CTX_OFFSET], %g4 + ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g4 sllx %g3, 16, %g3 or %g4, %g3, %g4 ba,pt %xcc, winfix_mna -- cgit v1.2.3-55-g7522