From cad6fade6e78030e60188da3f18090577daa9243 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Tue, 27 Nov 2018 16:27:47 -0800 Subject: xtensa: clean up WSR*/RSR*/get_sr/set_sr WSR and RSR are too generic and collide with other macro definitions in the kernel causing warnings in allmodconfig builds. Drop WSR and RSR macros and WSR_* and RSR_* variants. Change get_sr and set_sr to xtensa_get_sr and xtensa_set_sr. Fix up users. Signed-off-by: Max Filippov --- arch/xtensa/include/asm/processor.h | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) (limited to 'arch/xtensa/include/asm/processor.h') diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 34a23016dd14..f7dd895b2353 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -13,6 +13,7 @@ #include #include +#include #include #include #include @@ -212,11 +213,18 @@ extern unsigned long get_wchan(struct task_struct *p); /* Special register access. */ -#define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v)); -#define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v)); - -#define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);}) -#define get_sr(sr) ({unsigned int v; RSR(v,sr); v; }) +#define xtensa_set_sr(x, sr) \ + ({ \ + unsigned int v = (unsigned int)(x); \ + __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \ + }) + +#define xtensa_get_sr(sr) \ + ({ \ + unsigned int v; \ + __asm__ __volatile__ ("rsr %0, "__stringify(sr) : "=a"(v)); \ + v; \ + }) #ifndef XCHAL_HAVE_EXTERN_REGS #define XCHAL_HAVE_EXTERN_REGS 0 -- cgit v1.2.3-55-g7522