From 084a4fccef39ac7abb039511f32380f28d0b67e6 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 27 Jan 2012 18:38:08 -0300 Subject: edac: move dimm properties to struct dimm_info On systems based on chip select rows, all channels need to use memories with the same properties, otherwise the memories on channels A and B won't be recognized. However, such assumption is not true for all types of memory controllers. Controllers for FB-DIMM's don't have such requirements. Also, modern Intel controllers seem to be capable of handling such differences. So, we need to get rid of storing the DIMM information into a per-csrow data, storing it, instead at the right place. The first step is to move grain, mtype, dtype and edac_mode to the per-dimm struct. Reviewed-by: Aristeu Rozanski Reviewed-by: Borislav Petkov Acked-by: Chris Metcalf Cc: Doug Thompson Cc: Borislav Petkov Cc: Mark Gross Cc: Jason Uhlenkott Cc: Tim Small Cc: Ranganathan Desikan Cc: "Arvind R." Cc: Olof Johansson Cc: Egor Martovetsky Cc: Michal Marek Cc: Jiri Kosina Cc: Joe Perches Cc: Dmitry Eremin-Solenikov Cc: Benjamin Herrenschmidt Cc: Hitoshi Mitake Cc: Andrew Morton Cc: James Bottomley Cc: "Niklas Söderlund" Cc: Shaohui Xie Cc: Josh Boyer Cc: Mike Williams Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5400_edac.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) (limited to 'drivers/edac/i5400_edac.c') diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 1869a1018fb5..c2379ba95c5a 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1159,6 +1159,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) int csrow_megs; int channel; int csrow; + struct dimm_info *dimm; pvt = mci->pvt_info; @@ -1184,24 +1185,17 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) p_csrow->last_page = 9 + csrow * 20; p_csrow->page_mask = 0xFFF; - p_csrow->grain = 8; - csrow_megs = 0; - for (channel = 0; channel < pvt->maxch; channel++) + for (channel = 0; channel < pvt->maxch; channel++) { csrow_megs += pvt->dimm_info[csrow][channel].megabytes; - p_csrow->nr_pages = csrow_megs << 8; - - /* Assume DDR2 for now */ - p_csrow->mtype = MEM_FB_DDR2; - - /* ask what device type on this row */ - if (MTR_DRAM_WIDTH(mtr)) - p_csrow->dtype = DEV_X8; - else - p_csrow->dtype = DEV_X4; - - p_csrow->edac_mode = EDAC_S8ECD8ED; + p_csrow->nr_pages = csrow_megs << 8; + dimm = p_csrow->channels[channel].dimm; + dimm->grain = 8; + dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; + dimm->mtype = MEM_RDDR2; + dimm->edac_mode = EDAC_SECDED; + } empty = 0; } -- cgit v1.2.3-55-g7522 From 5e2af0c09e60d11dd8297e259a9ca2b3d92d2cf4 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 27 Jan 2012 21:20:32 -0300 Subject: edac: Don't initialize csrow's first_page & friends when not needed Almost all edac drivers initialize csrow_info->first_page, csrow_info->last_page and csrow_info->page_mask. Those vars are used inside the EDAC core, in order to calculate the csrow affected by an error, by using the routine edac_mc_find_csrow_by_page(). However, very few drivers actually use it: e752x_edac.c e7xxx_edac.c i3000_edac.c i82443bxgx_edac.c i82860_edac.c i82875p_edac.c i82975x_edac.c r82600_edac.c There also a few other drivers that have their own calculus formula internally using those vars. All the others are just wasting time by initializing those data. While initializing data without using them won't cause any troubles, as those information is stored at the wrong place (at csrows structure), it is better to remove what is unused, in order to simplify the next patch. Reviewed-by: Aristeu Rozanski Acked-by: Borislav Petkov Acked-by: Chris Metcalf Cc: Doug Thompson Cc: Hitoshi Mitake Cc: Andrew Morton Cc: "Niklas Söderlund" Cc: Josh Boyer Cc: Jiri Kosina Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 37 ++----------------------------------- drivers/edac/i3200_edac.c | 5 ----- drivers/edac/i5000_edac.c | 5 ----- drivers/edac/i5100_edac.c | 2 -- drivers/edac/i5400_edac.c | 5 ----- drivers/edac/i7300_edac.c | 5 +---- drivers/edac/i7core_edac.c | 5 ----- drivers/edac/mv64x60_edac.c | 1 - drivers/edac/ppc4xx_edac.c | 7 ------- drivers/edac/sb_edac.c | 2 -- drivers/edac/tile_edac.c | 2 -- drivers/edac/x38_edac.c | 5 ----- 12 files changed, 3 insertions(+), 78 deletions(-) (limited to 'drivers/edac/i5400_edac.c') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 8126db0c8987..e2c5a94f683c 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -715,25 +715,6 @@ static inline u64 input_addr_to_sys_addr(struct mem_ctl_info *mci, input_addr_to_dram_addr(mci, input_addr)); } -/* - * Find the minimum and maximum InputAddr values that map to the given @csrow. - * Pass back these values in *input_addr_min and *input_addr_max. - */ -static void find_csrow_limits(struct mem_ctl_info *mci, int csrow, - u64 *input_addr_min, u64 *input_addr_max) -{ - struct amd64_pvt *pvt; - u64 base, mask; - - pvt = mci->pvt_info; - BUG_ON((csrow < 0) || (csrow >= pvt->csels[0].b_cnt)); - - get_cs_base_and_mask(pvt, csrow, 0, &base, &mask); - - *input_addr_min = base & ~mask; - *input_addr_max = base | mask; -} - /* Map the Error address to a PAGE and PAGE OFFSET. */ static inline void error_address_to_page_and_offset(u64 error_address, u32 *page, u32 *offset) @@ -2185,7 +2166,7 @@ static int init_csrows(struct mem_ctl_info *mci) { struct csrow_info *csrow; struct amd64_pvt *pvt = mci->pvt_info; - u64 input_addr_min, input_addr_max, sys_addr, base, mask; + u64 base, mask; u32 val; int i, j, empty = 1; enum mem_type mtype; @@ -2216,28 +2197,14 @@ static int init_csrows(struct mem_ctl_info *mci) csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i); if (csrow_enabled(i, 1, pvt)) csrow->nr_pages += amd64_csrow_nr_pages(pvt, 1, i); - find_csrow_limits(mci, i, &input_addr_min, &input_addr_max); - sys_addr = input_addr_to_sys_addr(mci, input_addr_min); - csrow->first_page = (u32) (sys_addr >> PAGE_SHIFT); - sys_addr = input_addr_to_sys_addr(mci, input_addr_max); - csrow->last_page = (u32) (sys_addr >> PAGE_SHIFT); get_cs_base_and_mask(pvt, i, 0, &base, &mask); - csrow->page_mask = ~mask; /* 8 bytes of resolution */ mtype = amd64_determine_memory_type(pvt, i); debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i); - debugf1(" input_addr_min: 0x%lx input_addr_max: 0x%lx\n", - (unsigned long)input_addr_min, - (unsigned long)input_addr_max); - debugf1(" sys_addr: 0x%lx page_mask: 0x%lx\n", - (unsigned long)sys_addr, csrow->page_mask); - debugf1(" nr_pages: %u first_page: 0x%lx " - "last_page: 0x%lx\n", - (unsigned)csrow->nr_pages, - csrow->first_page, csrow->last_page); + debugf1(" nr_pages: %u\n", csrow->nr_pages); /* * determine whether CHIPKILL or JUST ECC or NO ECC is operating diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 6ae30176aef5..93c4d5a6a623 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -321,7 +321,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; - unsigned long last_page; u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL]; bool stacked; void __iomem *window; @@ -366,7 +365,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) * cumulative; the last one will contain the total memory * contained in all ranks. */ - last_page = -1UL; for (i = 0; i < mci->nr_csrows; i++) { unsigned long nr_pages; struct csrow_info *csrow = &mci->csrows[i]; @@ -378,9 +376,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->first_page = last_page + 1; - last_page += nr_pages; - csrow->last_page = last_page; csrow->nr_pages = nr_pages; for (j = 0; j < nr_channels; j++) { diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 95966ba9c5ca..26b40556958e 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1263,11 +1263,6 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1)) continue; - /* FAKE OUT VALUES, FIXME */ - p_csrow->first_page = 0 + csrow * 20; - p_csrow->last_page = 9 + csrow * 20; - p_csrow->page_mask = 0xFFF; - csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { csrow_megs += pvt->dimm_info[csrow][channel].megabytes; diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index 6c0dafa3f67b..5338c7968f78 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -859,8 +859,6 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) * FIXME: these two are totally bogus -- I don't see how to * map them correctly to this structure... */ - mci->csrows[i].first_page = total_pages; - mci->csrows[i].last_page = total_pages + npages - 1; mci->csrows[i].nr_pages = npages; mci->csrows[i].csrow_idx = i; mci->csrows[i].mci = mci; diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index c2379ba95c5a..6f85dcb34019 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1180,11 +1180,6 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr)) continue; - /* FAKE OUT VALUES, FIXME */ - p_csrow->first_page = 0 + csrow * 20; - p_csrow->last_page = 9 + csrow * 20; - p_csrow->page_mask = 0xFFF; - csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { csrow_megs += pvt->dimm_info[csrow][channel].megabytes; diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index 4bfcb3da3f01..d4153d6cfe30 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -778,7 +778,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) int rc = -ENODEV; int mtr; int ch, branch, slot, channel; - u32 last_page = 0, nr_pages; + u32 nr_pages; struct dimm_info *dimm; pvt = mci->pvt_info; @@ -828,9 +828,6 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) /* Update per_csrow memory count */ p_csrow->nr_pages += nr_pages; - p_csrow->first_page = last_page; - last_page += nr_pages; - p_csrow->last_page = last_page; rc = 0; } diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 5449bd40a739..76c957c525fb 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -599,7 +599,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) struct pci_dev *pdev; int i, j; int csrow = 0; - unsigned long last_page = 0; enum edac_type mode; enum mem_type mtype; struct dimm_info *dimm; @@ -716,12 +715,8 @@ static int get_dimm_config(struct mem_ctl_info *mci) npages = MiB_TO_PAGES(size); csr = &mci->csrows[csrow]; - csr->first_page = last_page + 1; - last_page += npages; - csr->last_page = last_page; csr->nr_pages = npages; - csr->page_mask = 0; csr->csrow_idx = csrow; csr->nr_channels = 1; diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 12d7fe04454c..d2e3c39ede9f 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -668,7 +668,6 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, csrow = &mci->csrows[0]; dimm = csrow->channels[0].dimm; csrow->nr_pages = pdata->total_mem >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; dimm->grain = 8; dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index a75e56788b29..ec5e529e33f6 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -897,7 +897,6 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) enum edac_type edac_mode; int row, j; u32 mbxcf, size; - static u32 ppc4xx_last_page; /* Establish the memory type and width */ @@ -959,10 +958,6 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) goto done; } - csi->first_page = ppc4xx_last_page; - csi->last_page = csi->first_page + csi->nr_pages - 1; - csi->page_mask = 0; - /* * It's unclear exactly what grain should be set to * here. The SDRAM_ECCES register allows resolution of @@ -984,8 +979,6 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) dimm->dtype = dtype; dimm->edac_mode = edac_mode; - - ppc4xx_last_page += csi->nr_pages; } } diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 21147ac38c4d..d5892c052bf4 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -642,8 +642,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) * csrows. */ csr = &mci->csrows[csrow]; - csr->first_page = last_page; - csr->last_page = last_page + npages - 1; csr->nr_pages = npages; csr->csrow_idx = csrow; csr->nr_channels = 1; diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index c870f68ae8f1..54067c4b0cc1 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -110,9 +110,7 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) return -1; } - csrow->first_page = 0; csrow->nr_pages = mem_info.mem_size >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; dimm->grain = TILE_EDAC_ERROR_GRAIN; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index f7cc4d214949..bc7f880a4eed 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -319,7 +319,6 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; - unsigned long last_page; u16 drbs[X38_CHANNELS][X38_RANKS_PER_CHANNEL]; bool stacked; void __iomem *window; @@ -363,7 +362,6 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) * cumulative; the last one will contain the total memory * contained in all ranks. */ - last_page = -1UL; for (i = 0; i < mci->nr_csrows; i++) { unsigned long nr_pages; struct csrow_info *csrow = &mci->csrows[i]; @@ -375,9 +373,6 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->first_page = last_page + 1; - last_page += nr_pages; - csrow->last_page = last_page; csrow->nr_pages = nr_pages; for (j = 0; j < x38_channel_num; j++) { -- cgit v1.2.3-55-g7522 From a895bf8b1e1ea4c032a8fa8a09475a2ce09fe77a Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 28 Jan 2012 09:09:38 -0300 Subject: edac: move nr_pages to dimm struct The number of pages is a dimm property. Move it to the dimm struct. After this change, it is possible to add sysfs nodes for the DIMM's that will properly represent the DIMM stick properties, including its size. A TODO fix here is to properly represent dual-rank/quad-rank DIMMs when the memory controller represents the memory via chip select rows. Reviewed-by: Aristeu Rozanski Acked-by: Borislav Petkov Acked-by: Chris Metcalf Cc: Doug Thompson Cc: Mark Gross Cc: Jason Uhlenkott Cc: Tim Small Cc: Ranganathan Desikan Cc: "Arvind R." Cc: Olof Johansson Cc: Egor Martovetsky Cc: Michal Marek Cc: Jiri Kosina Cc: Joe Perches Cc: Dmitry Eremin-Solenikov Cc: Benjamin Herrenschmidt Cc: Hitoshi Mitake Cc: Andrew Morton Cc: "Niklas Söderlund" Cc: Shaohui Xie Cc: Josh Boyer Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 10 +++++---- drivers/edac/amd76x_edac.c | 6 +++--- drivers/edac/cell_edac.c | 8 ++++--- drivers/edac/cpc925_edac.c | 8 ++++--- drivers/edac/e752x_edac.c | 6 ++++-- drivers/edac/e7xxx_edac.c | 5 +++-- drivers/edac/edac_mc.c | 16 ++++++++------ drivers/edac/edac_mc_sysfs.c | 47 +++++++++++++++++++++++++++++------------- drivers/edac/i3000_edac.c | 6 ++++-- drivers/edac/i3200_edac.c | 3 +-- drivers/edac/i5000_edac.c | 14 +++++++------ drivers/edac/i5100_edac.c | 22 ++++++++++++-------- drivers/edac/i5400_edac.c | 9 +++----- drivers/edac/i7300_edac.c | 22 ++++++-------------- drivers/edac/i7core_edac.c | 10 +++------ drivers/edac/i82443bxgx_edac.c | 2 +- drivers/edac/i82860_edac.c | 2 +- drivers/edac/i82875p_edac.c | 5 +++-- drivers/edac/i82975x_edac.c | 11 +++++++--- drivers/edac/mpc85xx_edac.c | 3 ++- drivers/edac/mv64x60_edac.c | 3 ++- drivers/edac/pasemi_edac.c | 14 ++++++------- drivers/edac/ppc4xx_edac.c | 5 +++-- drivers/edac/r82600_edac.c | 3 ++- drivers/edac/sb_edac.c | 8 ++----- drivers/edac/tile_edac.c | 2 +- drivers/edac/x38_edac.c | 4 ++-- include/linux/edac.h | 8 ++++--- 28 files changed, 146 insertions(+), 116 deletions(-) (limited to 'drivers/edac/i5400_edac.c') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index e2c5a94f683c..1ceb8e276376 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2152,7 +2152,7 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr) nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode) << (20 - PAGE_SHIFT); debugf0(" (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode); - debugf0(" nr_pages= %u channel-count = %d\n", + debugf0(" nr_pages/channel= %u channel-count = %d\n", nr_pages, pvt->channel_count); return nr_pages; @@ -2171,6 +2171,7 @@ static int init_csrows(struct mem_ctl_info *mci) int i, j, empty = 1; enum mem_type mtype; enum edac_type edac_mode; + int nr_pages = 0; amd64_read_pci_cfg(pvt->F3, NBCFG, &val); @@ -2194,9 +2195,9 @@ static int init_csrows(struct mem_ctl_info *mci) empty = 0; if (csrow_enabled(i, 0, pvt)) - csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i); + nr_pages = amd64_csrow_nr_pages(pvt, 0, i); if (csrow_enabled(i, 1, pvt)) - csrow->nr_pages += amd64_csrow_nr_pages(pvt, 1, i); + nr_pages += amd64_csrow_nr_pages(pvt, 1, i); get_cs_base_and_mask(pvt, i, 0, &base, &mask); /* 8 bytes of resolution */ @@ -2204,7 +2205,7 @@ static int init_csrows(struct mem_ctl_info *mci) mtype = amd64_determine_memory_type(pvt, i); debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i); - debugf1(" nr_pages: %u\n", csrow->nr_pages); + debugf1(" nr_pages: %u\n", nr_pages * pvt->channel_count); /* * determine whether CHIPKILL or JUST ECC or NO ECC is operating @@ -2218,6 +2219,7 @@ static int init_csrows(struct mem_ctl_info *mci) for (j = 0; j < pvt->channel_count; j++) { csrow->channels[j].dimm->mtype = mtype; csrow->channels[j].dimm->edac_mode = edac_mode; + csrow->channels[j].dimm->nr_pages = nr_pages; } } diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index fcfe359f7be5..a2dde205f651 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -205,10 +205,10 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL; pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms); csrow->first_page = mba_base >> PAGE_SHIFT; - csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; + dimm->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; + csrow->last_page = csrow->first_page + dimm->nr_pages - 1; csrow->page_mask = mba_mask >> PAGE_SHIFT; - dimm->grain = csrow->nr_pages << PAGE_SHIFT; + dimm->grain = dimm->nr_pages << PAGE_SHIFT; dimm->mtype = MEM_RDDR; dimm->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN; dimm->edac_mode = edac_mode; diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 94fbb127215a..09e1b5d3df70 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -128,6 +128,7 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) struct cell_edac_priv *priv = mci->pvt_info; struct device_node *np; int j; + u32 nr_pages; for (np = NULL; (np = of_find_node_by_name(np, "memory")) != NULL;) { @@ -142,19 +143,20 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) if (of_node_to_nid(np) != priv->node) continue; csrow->first_page = r.start >> PAGE_SHIFT; - csrow->nr_pages = resource_size(&r) >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; + nr_pages = resource_size(&r) >> PAGE_SHIFT; + csrow->last_page = csrow->first_page + nr_pages - 1; for (j = 0; j < csrow->nr_channels; j++) { dimm = csrow->channels[j].dimm; dimm->mtype = MEM_XDR; dimm->edac_mode = EDAC_SECDED; + dimm->nr_pages = nr_pages / csrow->nr_channels; } dev_dbg(mci->dev, "Initialized on node %d, chanmask=0x%x," " first_page=0x%lx, nr_pages=0x%x\n", priv->node, priv->chanmask, - csrow->first_page, csrow->nr_pages); + csrow->first_page, dimm->nr_pages); break; } } diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index ee90f3da8f3a..7b764a882dae 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -332,7 +332,7 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) struct dimm_info *dimm; int index, j; u32 mbmr, mbbar, bba; - unsigned long row_size, last_nr_pages = 0; + unsigned long row_size, nr_pages, last_nr_pages = 0; get_total_mem(pdata); @@ -351,12 +351,14 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) row_size = bba * (1UL << 28); /* 256M */ csrow->first_page = last_nr_pages; - csrow->nr_pages = row_size >> PAGE_SHIFT; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; + nr_pages = row_size >> PAGE_SHIFT; + csrow->last_page = csrow->first_page + nr_pages - 1; last_nr_pages = csrow->last_page + 1; for (j = 0; j < csrow->nr_channels; j++) { dimm = csrow->channels[j].dimm; + + dimm->nr_pages = nr_pages / csrow->nr_channels; dimm->mtype = MEM_RDDR; dimm->edac_mode = EDAC_SECDED; diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index 6cf6ec6bc71e..cf17579ebc6d 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -1044,7 +1044,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ u8 value; - u32 dra, drc, cumul_size, i; + u32 dra, drc, cumul_size, i, nr_pages; dra = 0; for (index = 0; index < 4; index++) { @@ -1078,11 +1078,13 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (i = 0; i < drc_chan + 1; i++) { struct dimm_info *dimm = csrow->channels[i].dimm; + + dimm->nr_pages = nr_pages / (drc_chan + 1); dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ dimm->mtype = MEM_RDDR; /* only one type supported */ dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index 5ed97f6eb346..709aca216639 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -349,7 +349,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, unsigned long last_cumul_size; int index, j; u8 value; - u32 dra, cumul_size; + u32 dra, cumul_size, nr_pages; int drc_chan, drc_drbg, drc_ddim, mem_dev; struct csrow_info *csrow; struct dimm_info *dimm; @@ -380,12 +380,13 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (j = 0; j < drc_chan + 1; j++) { dimm = csrow->channels[j].dimm; + dimm->nr_pages = nr_pages / (drc_chan + 1); dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ dimm->mtype = MEM_RDDR; /* only one type supported */ dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 0942efad55c1..072aa81b4a70 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -43,9 +43,10 @@ static void edac_mc_dump_channel(struct rank_info *chan) { debugf4("\tchannel = %p\n", chan); debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); - debugf4("\tchannel->ce_count = %d\n", chan->dimm->ce_count); - debugf4("\tchannel->label = '%s'\n", chan->dimm->label); debugf4("\tchannel->csrow = %p\n\n", chan->csrow); + debugf4("\tdimm->ce_count = %d\n", chan->dimm->ce_count); + debugf4("\tdimm->label = '%s'\n", chan->dimm->label); + debugf4("\tdimm->nr_pages = 0x%x\n", chan->dimm->nr_pages); } static void edac_mc_dump_csrow(struct csrow_info *csrow) @@ -55,7 +56,6 @@ static void edac_mc_dump_csrow(struct csrow_info *csrow) debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page); debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); - debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages); debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels); debugf4("\tcsrow->channels = %p\n", csrow->channels); debugf4("\tcsrow->mci = %p\n\n", csrow->mci); @@ -652,15 +652,19 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset, int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) { struct csrow_info *csrows = mci->csrows; - int row, i; + int row, i, j, n; debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page); row = -1; for (i = 0; i < mci->nr_csrows; i++) { struct csrow_info *csrow = &csrows[i]; - - if (csrow->nr_pages == 0) + n = 0; + for (j = 0; j < csrow->nr_channels; j++) { + struct dimm_info *dimm = csrow->channels[j].dimm; + n += dimm->nr_pages; + } + if (n == 0) continue; debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) " diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 487e03eeed26..1dc1c6ca4308 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -144,7 +144,13 @@ static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private) { - return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages)); + int i; + u32 nr_pages = 0; + + for (i = 0; i < csrow->nr_channels; i++) + nr_pages += csrow->channels[i].dimm->nr_pages; + + return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); } static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, @@ -519,16 +525,16 @@ static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data) static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) { - int total_pages, csrow_idx; + int total_pages = 0, csrow_idx, j; - for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows; - csrow_idx++) { + for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { struct csrow_info *csrow = &mci->csrows[csrow_idx]; - if (!csrow->nr_pages) - continue; + for (j = 0; j < csrow->nr_channels; j++) { + struct dimm_info *dimm = csrow->channels[j].dimm; - total_pages += csrow->nr_pages; + total_pages += dimm->nr_pages; + } } return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); @@ -900,7 +906,7 @@ static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci, */ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) { - int i; + int i, j; int err; struct csrow_info *csrow; struct kobject *kobj_mci = &mci->edac_mci_kobj; @@ -934,10 +940,13 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) /* Make directories for each CSROW object under the mc kobject */ for (i = 0; i < mci->nr_csrows; i++) { + int nr_pages = 0; + csrow = &mci->csrows[i]; + for (j = 0; j < csrow->nr_channels; j++) + nr_pages += csrow->channels[j].dimm->nr_pages; - /* Only expose populated CSROWs */ - if (csrow->nr_pages > 0) { + if (nr_pages > 0) { err = edac_create_csrow_object(mci, csrow, i); if (err) { debugf1("%s() failure: create csrow %d obj\n", @@ -949,10 +958,14 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) return 0; - /* CSROW error: backout what has already been registered, */ fail1: for (i--; i >= 0; i--) { - if (mci->csrows[i].nr_pages > 0) + int nr_pages = 0; + + csrow = &mci->csrows[i]; + for (j = 0; j < csrow->nr_channels; j++) + nr_pages += csrow->channels[j].dimm->nr_pages; + if (nr_pages > 0) kobject_put(&mci->csrows[i].kobj); } @@ -972,14 +985,20 @@ fail0: */ void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) { - int i; + struct csrow_info *csrow; + int i, j; debugf0("%s()\n", __func__); /* remove all csrow kobjects */ debugf4("%s() unregister this mci kobj\n", __func__); for (i = 0; i < mci->nr_csrows; i++) { - if (mci->csrows[i].nr_pages > 0) { + int nr_pages = 0; + + csrow = &mci->csrows[i]; + for (j = 0; j < csrow->nr_channels; j++) + nr_pages += csrow->channels[j].dimm->nr_pages; + if (nr_pages > 0) { debugf0("%s() unreg csrow-%d\n", __func__, i); kobject_put(&mci->csrows[i].kobj); } diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 8fe60ee37826..719ccbed7435 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c @@ -306,7 +306,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) int rc; int i, j; struct mem_ctl_info *mci = NULL; - unsigned long last_cumul_size; + unsigned long last_cumul_size, nr_pages; int interleaved, nr_channels; unsigned char dra[I3000_RANKS / 2], drb[I3000_RANKS]; unsigned char *c0dra = dra, *c1dra = &dra[I3000_RANKS_PER_CHANNEL / 2]; @@ -391,11 +391,13 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (j = 0; j < nr_channels; j++) { struct dimm_info *dimm = csrow->channels[j].dimm; + + dimm->nr_pages = nr_pages / nr_channels; dimm->grain = I3000_DEAP_GRAIN; dimm->mtype = MEM_DDR2; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 93c4d5a6a623..3b3622209f3e 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -376,11 +376,10 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->nr_pages = nr_pages; - for (j = 0; j < nr_channels; j++) { struct dimm_info *dimm = csrow->channels[j].dimm; + dimm->nr_pages = nr_pages / nr_channels; dimm->grain = nr_pages << PAGE_SHIFT; dimm->mtype = MEM_DDR2; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 26b40556958e..f3a1a3e1e4e1 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1236,6 +1236,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) { struct i5000_pvt *pvt; struct csrow_info *p_csrow; + struct dimm_info *dimm; int empty, channel_count; int max_csrows; int mtr, mtr1; @@ -1265,21 +1266,22 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { + dimm = p_csrow->channels[channel].dimm; csrow_megs += pvt->dimm_info[csrow][channel].megabytes; - p_csrow->channels[channel].dimm->grain = 8; + dimm->grain = 8; /* Assume DDR2 for now */ - p_csrow->channels[channel].dimm->mtype = MEM_FB_DDR2; + dimm->mtype = MEM_FB_DDR2; /* ask what device type on this row */ if (MTR_DRAM_WIDTH(mtr)) - p_csrow->channels[channel].dimm->dtype = DEV_X8; + dimm->dtype = DEV_X8; else - p_csrow->channels[channel].dimm->dtype = DEV_X4; + dimm->dtype = DEV_X4; - p_csrow->channels[channel].dimm->edac_mode = EDAC_S8ECD8ED; + dimm->edac_mode = EDAC_S8ECD8ED; + dimm->nr_pages = (csrow_megs << 8) / pvt->maxch; } - p_csrow->nr_pages = csrow_megs << 8; empty = 0; } diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index 5338c7968f78..c08e94064ef6 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -859,7 +859,6 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) * FIXME: these two are totally bogus -- I don't see how to * map them correctly to this structure... */ - mci->csrows[i].nr_pages = npages; mci->csrows[i].csrow_idx = i; mci->csrows[i].mci = mci; mci->csrows[i].nr_channels = 1; @@ -867,14 +866,19 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) total_pages += npages; dimm = mci->csrows[i].channels[0].dimm; - dimm->grain = 32; - dimm->dtype = (priv->mtr[chan][rank].width == 4) ? - DEV_X4 : DEV_X8; - dimm->mtype = MEM_RDDR2; - dimm->edac_mode = EDAC_SECDED; - snprintf(dimm->label, sizeof(dimm->label), - "DIMM%u", - i5100_rank_to_slot(mci, chan, rank)); + dimm->nr_pages = npages; + if (npages) { + total_pages += npages; + + dimm->grain = 32; + dimm->dtype = (priv->mtr[chan][rank].width == 4) ? + DEV_X4 : DEV_X8; + dimm->mtype = MEM_RDDR2; + dimm->edac_mode = EDAC_SECDED; + snprintf(dimm->label, sizeof(dimm->label), + "DIMM%u", + i5100_rank_to_slot(mci, chan, rank)); + } } } diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 6f85dcb34019..6543f4a8367b 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1156,7 +1156,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) int empty, channel_count; int max_csrows; int mtr; - int csrow_megs; + int size_mb; int channel; int csrow; struct dimm_info *dimm; @@ -1171,8 +1171,6 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) for (csrow = 0; csrow < max_csrows; csrow++) { p_csrow = &mci->csrows[csrow]; - p_csrow->csrow_idx = csrow; - /* use branch 0 for the basis */ mtr = determine_mtr(pvt, csrow, 0); @@ -1180,12 +1178,11 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) if (!MTR_DIMMS_PRESENT(mtr)) continue; - csrow_megs = 0; for (channel = 0; channel < pvt->maxch; channel++) { - csrow_megs += pvt->dimm_info[csrow][channel].megabytes; + size_mb = pvt->dimm_info[csrow][channel].megabytes; - p_csrow->nr_pages = csrow_megs << 8; dimm = p_csrow->channels[channel].dimm; + dimm->nr_pages = size_mb << 8; dimm->grain = 8; dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; dimm->mtype = MEM_RDDR2; diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index d4153d6cfe30..d6f3a2d0f70a 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -617,9 +617,7 @@ static void i7300_enable_error_reporting(struct mem_ctl_info *mci) static int decode_mtr(struct i7300_pvt *pvt, int slot, int ch, int branch, struct i7300_dimm_info *dinfo, - struct csrow_info *p_csrow, - struct dimm_info *dimm, - u32 *nr_pages) + struct dimm_info *dimm) { int mtr, ans, addrBits, channel; @@ -651,7 +649,6 @@ static int decode_mtr(struct i7300_pvt *pvt, addrBits -= 3; /* 8 bits per bytes */ dinfo->megabytes = 1 << addrBits; - *nr_pages = dinfo->megabytes << 8; debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); @@ -664,8 +661,6 @@ static int decode_mtr(struct i7300_pvt *pvt, debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); - p_csrow->csrow_idx = slot; - /* * The type of error detection actually depends of the * mode of operation. When it is just one single memory chip, at @@ -675,6 +670,7 @@ static int decode_mtr(struct i7300_pvt *pvt, * See datasheet Sections 7.3.6 to 7.3.8 */ + dimm->nr_pages = MiB_TO_PAGES(dinfo->megabytes); dimm->grain = 8; dimm->mtype = MEM_FB_DDR2; if (IS_SINGLE_MODE(pvt->mc_settings_a)) { @@ -774,11 +770,9 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) { struct i7300_pvt *pvt; struct i7300_dimm_info *dinfo; - struct csrow_info *p_csrow; int rc = -ENODEV; int mtr; int ch, branch, slot, channel; - u32 nr_pages; struct dimm_info *dimm; pvt = mci->pvt_info; @@ -804,7 +798,6 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) } /* Get the set of MTR[0-7] regs by each branch */ - nr_pages = 0; for (slot = 0; slot < MAX_SLOTS; slot++) { int where = mtr_regs[slot]; for (branch = 0; branch < MAX_BRANCHES; branch++) { @@ -815,21 +808,18 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) int channel = to_channel(ch, branch); dinfo = &pvt->dimm_info[slot][channel]; - p_csrow = &mci->csrows[slot]; - dimm = p_csrow->channels[branch * MAX_CH_PER_BRANCH + ch].dimm; + dimm = mci->csrows[slot].channels[branch * MAX_CH_PER_BRANCH + ch].dimm; mtr = decode_mtr(pvt, slot, ch, branch, - dinfo, p_csrow, dimm, - &nr_pages); + dinfo, dimm); + /* if no DIMMS on this row, continue */ if (!MTR_DIMMS_PRESENT(mtr)) continue; - /* Update per_csrow memory count */ - p_csrow->nr_pages += nr_pages; - rc = 0; + } } } diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 76c957c525fb..0e3cc34bcc22 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -715,17 +715,12 @@ static int get_dimm_config(struct mem_ctl_info *mci) npages = MiB_TO_PAGES(size); csr = &mci->csrows[csrow]; - csr->nr_pages = npages; - - csr->csrow_idx = csrow; - csr->nr_channels = 1; - - csr->channels[0].chan_idx = i; - csr->channels[0].ce_count = 0; pvt->csrow_map[i][j] = csrow; dimm = csr->channels[0].dimm; + dimm->nr_pages = npages; + switch (banks) { case 4: dimm->dtype = DEV_X4; @@ -746,6 +741,7 @@ static int get_dimm_config(struct mem_ctl_info *mci) dimm->grain = 8; dimm->edac_mode = mode; dimm->mtype = mtype; + csrow++; } pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]); diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 0b98dd3408b9..02b252acd999 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -220,7 +220,7 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, row_base = row_high_limit_last; csrow->first_page = row_base >> PAGE_SHIFT; csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; - csrow->nr_pages = csrow->last_page - csrow->first_page + 1; + dimm->nr_pages = csrow->last_page - csrow->first_page + 1; /* EAP reports in 4kilobyte granularity [61] */ dimm->grain = 1 << 12; dimm->mtype = mtype; diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index 3eb77845cfca..8485bbf4379f 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -167,7 +167,7 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + dimm->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; dimm->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */ dimm->mtype = MEM_RMBS; diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index eac574285da8..e16281b41f3b 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -347,7 +347,7 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, unsigned long last_cumul_size; u8 value; u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ - u32 cumul_size; + u32 cumul_size, nr_pages; int index, j; drc_ddim = (drc >> 18) & 0x1; @@ -371,12 +371,13 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; + nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; for (j = 0; j < nr_chans; j++) { dimm = csrow->channels[j].dimm; + dimm->nr_pages = nr_pages / nr_chans; dimm->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */ dimm->mtype = MEM_DDR; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index b8ec8719e2f5..014a9483fccc 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -370,7 +370,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, struct csrow_info *csrow; unsigned long last_cumul_size; u8 value; - u32 cumul_size; + u32 cumul_size, nr_pages; int index, chan; struct dimm_info *dimm; enum dev_type dtype; @@ -402,6 +402,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index, cumul_size); + nr_pages = cumul_size - last_cumul_size; /* * Initialise dram labels * index values: @@ -411,6 +412,11 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, dtype = i82975x_dram_type(mch_window, index); for (chan = 0; chan < csrow->nr_channels; chan++) { dimm = mci->csrows[index].channels[chan].dimm; + + if (!nr_pages) + continue; + + dimm->nr_pages = nr_pages / csrow->nr_channels; strncpy(csrow->channels[chan].dimm->label, labels[(index >> 1) + (chan * 2)], EDAC_MC_LABEL_LEN); @@ -420,12 +426,11 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, dimm->edac_mode = EDAC_SECDED; /* only supported */ } - if (cumul_size == last_cumul_size) + if (!nr_pages) continue; /* not populated */ csrow->first_page = last_cumul_size; csrow->last_page = cumul_size - 1; - csrow->nr_pages = cumul_size - last_cumul_size; last_cumul_size = cumul_size; } } diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index fb92916d0872..c1d9e158972c 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -947,7 +947,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) csrow->first_page = start; csrow->last_page = end; - csrow->nr_pages = end + 1 - start; + + dimm->nr_pages = end + 1 - start; dimm->grain = 8; dimm->mtype = mtype; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index d2e3c39ede9f..281e24528599 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -667,7 +667,8 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, csrow = &mci->csrows[0]; dimm = csrow->channels[0].dimm; - csrow->nr_pages = pdata->total_mem >> PAGE_SHIFT; + + dimm->nr_pages = pdata->total_mem >> PAGE_SHIFT; dimm->grain = 8; dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 4e53270bc336..3fcefda653fd 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c @@ -153,20 +153,20 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >> MCDRAM_RANKCFG_TYPE_SIZE_S) { case 0: - csrow->nr_pages = 128 << (20 - PAGE_SHIFT); + dimm->nr_pages = 128 << (20 - PAGE_SHIFT); break; case 1: - csrow->nr_pages = 256 << (20 - PAGE_SHIFT); + dimm->nr_pages = 256 << (20 - PAGE_SHIFT); break; case 2: case 3: - csrow->nr_pages = 512 << (20 - PAGE_SHIFT); + dimm->nr_pages = 512 << (20 - PAGE_SHIFT); break; case 4: - csrow->nr_pages = 1024 << (20 - PAGE_SHIFT); + dimm->nr_pages = 1024 << (20 - PAGE_SHIFT); break; case 5: - csrow->nr_pages = 2048 << (20 - PAGE_SHIFT); + dimm->nr_pages = 2048 << (20 - PAGE_SHIFT); break; default: edac_mc_printk(mci, KERN_ERR, @@ -176,8 +176,8 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, } csrow->first_page = last_page_in_mmc; - csrow->last_page = csrow->first_page + csrow->nr_pages - 1; - last_page_in_mmc += csrow->nr_pages; + csrow->last_page = csrow->first_page + dimm->nr_pages - 1; + last_page_in_mmc += dimm->nr_pages; csrow->page_mask = 0; dimm->grain = PASEMI_EDAC_ERROR_GRAIN; dimm->mtype = MEM_DDR; diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index ec5e529e33f6..95cfc0f8d46d 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -896,7 +896,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) enum dev_type dtype; enum edac_type edac_mode; int row, j; - u32 mbxcf, size; + u32 mbxcf, size, nr_pages; /* Establish the memory type and width */ @@ -947,7 +947,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) case SDRAM_MBCF_SZ_2GB: case SDRAM_MBCF_SZ_4GB: case SDRAM_MBCF_SZ_8GB: - csi->nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size); + nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size); break; default: ppc4xx_edac_mc_printk(KERN_ERR, mci, @@ -973,6 +973,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) for (j = 0; j < csi->nr_channels; j++) { struct dimm_info *dimm = csi->channels[j].dimm; + dimm->nr_pages = nr_pages / csi->nr_channels; dimm->grain = 1; dimm->mtype = mtype; diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index 70b0dfa81db4..c41b375e1f38 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -249,7 +249,8 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, csrow->first_page = row_base >> PAGE_SHIFT; csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; - csrow->nr_pages = csrow->last_page - csrow->first_page + 1; + + dimm->nr_pages = csrow->last_page - csrow->first_page + 1; /* Error address is top 19 bits - so granularity is * * 14 bits */ dimm->grain = 1 << 14; diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index d5892c052bf4..2ce9bf5e354b 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -561,7 +561,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) u32 reg; enum edac_type mode; enum mem_type mtype; - struct dimm_info *dimm; pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®); pvt->sbridge_dev->source_id = SOURCE_ID(reg); @@ -613,11 +612,11 @@ static int get_dimm_config(struct mem_ctl_info *mci) /* On all supported DDR3 DIMM types, there are 8 banks available */ banks = 8; - dimm = mci->dimms; for (i = 0; i < NUM_CHANNELS; i++) { u32 mtr; for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) { + struct dimm_info *dimm = &mci->dimms[j]; pci_read_config_dword(pvt->pci_tad[i], mtr_regs[j], &mtr); debugf4("Channel #%d MTR%d = %x\n", i, j, mtr); @@ -642,15 +641,12 @@ static int get_dimm_config(struct mem_ctl_info *mci) * csrows. */ csr = &mci->csrows[csrow]; - csr->nr_pages = npages; - csr->csrow_idx = csrow; - csr->nr_channels = 1; - csr->channels[0].chan_idx = i; pvt->csrow_map[i][j] = csrow; last_page += npages; csrow++; csr->channels[0].dimm = dimm; + dimm->nr_pages = npages; dimm->grain = 32; dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4; dimm->mtype = mtype; diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index 54067c4b0cc1..054c9bb3a5dc 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -110,7 +110,7 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) return -1; } - csrow->nr_pages = mem_info.mem_size >> PAGE_SHIFT; + dimm->nr_pages = mem_info.mem_size >> PAGE_SHIFT; dimm->grain = TILE_EDAC_ERROR_GRAIN; dimm->dtype = DEV_UNKNOWN; diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index bc7f880a4eed..e3247997aa00 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -373,10 +373,10 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) if (nr_pages == 0) continue; - csrow->nr_pages = nr_pages; - for (j = 0; j < x38_channel_num; j++) { struct dimm_info *dimm = csrow->channels[j].dimm; + + dimm->nr_pages = nr_pages / x38_channel_num; dimm->grain = nr_pages << PAGE_SHIFT; dimm->mtype = MEM_DDR2; dimm->dtype = DEV_UNKNOWN; diff --git a/include/linux/edac.h b/include/linux/edac.h index 87aa07d2ee28..67717cab1313 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h @@ -324,6 +324,8 @@ struct dimm_info { enum mem_type mtype; /* memory dimm type */ enum edac_type edac_mode; /* EDAC mode for this dimm */ + u32 nr_pages; /* number of pages in csrow */ + u32 ce_count; /* Correctable Errors for this dimm */ }; @@ -350,12 +352,12 @@ struct rank_info { }; struct csrow_info { + /* Used only by edac_mc_find_csrow_by_page() */ unsigned long first_page; /* first page number in csrow */ unsigned long last_page; /* last page number in csrow */ - u32 nr_pages; /* number of pages in csrow */ unsigned long page_mask; /* used for interleaving - - * 0UL for non intlv - */ + * 0UL for non intlv */ + int csrow_idx; /* the chip-select row */ u32 ue_count; /* Uncorrectable Errors for this csrow */ -- cgit v1.2.3-55-g7522 From 296da591ea1d81b8d94d6e79b6c235bb820526b9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 16 Apr 2012 15:09:58 -0300 Subject: i5400_edac: convert driver to use the new edac ABI The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5400_edac.c | 217 +++++++++++++++++++++++++--------------------- 1 file changed, 119 insertions(+), 98 deletions(-) (limited to 'drivers/edac/i5400_edac.c') diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 6543f4a8367b..508f369b1f6c 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -18,6 +18,10 @@ * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet * http://developer.intel.com/design/chipsets/datashts/313070.htm * + * This Memory Controller manages DDR2 FB-DIMMs. It has 2 branches, each with + * 2 channels operating in lockstep no-mirror mode. Each channel can have up to + * 4 dimm's, each with up to 8GB. + * */ #include @@ -44,12 +48,10 @@ edac_mc_chipset_printk(mci, level, "i5400", fmt, ##arg) /* Limits for i5400 */ -#define NUM_MTRS_PER_BRANCH 4 +#define MAX_BRANCHES 2 #define CHANNELS_PER_BRANCH 2 -#define MAX_DIMMS_PER_CHANNEL NUM_MTRS_PER_BRANCH -#define MAX_CHANNELS 4 -/* max possible csrows per channel */ -#define MAX_CSROWS (MAX_DIMMS_PER_CHANNEL) +#define DIMMS_PER_CHANNEL 4 +#define MAX_CHANNELS (MAX_BRANCHES * CHANNELS_PER_BRANCH) /* Device 16, * Function 0: System Address @@ -347,16 +349,16 @@ struct i5400_pvt { u16 mir0, mir1; - u16 b0_mtr[NUM_MTRS_PER_BRANCH]; /* Memory Technlogy Reg */ + u16 b0_mtr[DIMMS_PER_CHANNEL]; /* Memory Technlogy Reg */ u16 b0_ambpresent0; /* Branch 0, Channel 0 */ u16 b0_ambpresent1; /* Brnach 0, Channel 1 */ - u16 b1_mtr[NUM_MTRS_PER_BRANCH]; /* Memory Technlogy Reg */ + u16 b1_mtr[DIMMS_PER_CHANNEL]; /* Memory Technlogy Reg */ u16 b1_ambpresent0; /* Branch 1, Channel 8 */ u16 b1_ambpresent1; /* Branch 1, Channel 1 */ /* DIMM information matrix, allocating architecture maximums */ - struct i5400_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS]; + struct i5400_dimm_info dimm_info[DIMMS_PER_CHANNEL][MAX_CHANNELS]; /* Actual values for this controller */ int maxch; /* Max channels */ @@ -532,13 +534,15 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci, int ras, cas; int errnum; char *type = NULL; + enum hw_event_mc_err_type tp_event = HW_EVENT_ERR_UNCORRECTED; if (!allErrors) return; /* if no error, return now */ - if (allErrors & ERROR_FAT_MASK) + if (allErrors & ERROR_FAT_MASK) { type = "FATAL"; - else if (allErrors & FERR_NF_UNCORRECTABLE) + tp_event = HW_EVENT_ERR_FATAL; + } else if (allErrors & FERR_NF_UNCORRECTABLE) type = "NON-FATAL uncorrected"; else type = "NON-FATAL recoverable"; @@ -556,7 +560,7 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci, ras = nrec_ras(info); cas = nrec_cas(info); - debugf0("\t\tCSROW= %d Channels= %d,%d (Branch= %d " + debugf0("\t\tDIMM= %d Channels= %d,%d (Branch= %d " "DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n", rank, channel, channel + 1, branch >> 1, bank, buf_id, rdwr_str(rdwr), ras, cas); @@ -566,13 +570,13 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci, /* Form out message */ snprintf(msg, sizeof(msg), - "%s (Branch=%d DRAM-Bank=%d Buffer ID = %d RDWR=%s " - "RAS=%d CAS=%d %s Err=0x%lx (%s))", - type, branch >> 1, bank, buf_id, rdwr_str(rdwr), ras, cas, - type, allErrors, error_name[errnum]); + "Bank=%d Buffer ID = %d RAS=%d CAS=%d Err=0x%lx (%s)", + bank, buf_id, ras, cas, allErrors, error_name[errnum]); - /* Call the helper to output message */ - edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); + edac_mc_handle_error(tp_event, mci, 0, 0, 0, + branch >> 1, -1, rank, + rdwr ? "Write error" : "Read error", + msg, NULL); } /* @@ -630,7 +634,7 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci, /* Only 1 bit will be on */ errnum = find_first_bit(&allErrors, ARRAY_SIZE(error_name)); - debugf0("\t\tCSROW= %d Channel= %d (Branch %d " + debugf0("\t\tDIMM= %d Channel= %d (Branch %d " "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", rank, channel, branch >> 1, bank, rdwr_str(rdwr), ras, cas); @@ -642,8 +646,10 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci, branch >> 1, bank, rdwr_str(rdwr), ras, cas, allErrors, error_name[errnum]); - /* Call the helper to output message */ - edac_mc_handle_fbd_ce(mci, rank, channel, msg); + edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0, + branch >> 1, channel % 2, rank, + rdwr ? "Write error" : "Read error", + msg, NULL); return; } @@ -831,8 +837,8 @@ static int i5400_get_devices(struct mem_ctl_info *mci, int dev_idx) /* * determine_amb_present * - * the information is contained in NUM_MTRS_PER_BRANCH different - * registers determining which of the NUM_MTRS_PER_BRANCH requires + * the information is contained in DIMMS_PER_CHANNEL different + * registers determining which of the DIMMS_PER_CHANNEL requires * knowing which channel is in question * * 2 branches, each with 2 channels @@ -861,11 +867,11 @@ static int determine_amb_present_reg(struct i5400_pvt *pvt, int channel) } /* - * determine_mtr(pvt, csrow, channel) + * determine_mtr(pvt, dimm, channel) * - * return the proper MTR register as determine by the csrow and desired channel + * return the proper MTR register as determine by the dimm and desired channel */ -static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel) +static int determine_mtr(struct i5400_pvt *pvt, int dimm, int channel) { int mtr; int n; @@ -873,11 +879,11 @@ static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel) /* There is one MTR for each slot pair of FB-DIMMs, Each slot pair may be at branch 0 or branch 1. */ - n = csrow; + n = dimm; - if (n >= NUM_MTRS_PER_BRANCH) { - debugf0("ERROR: trying to access an invalid csrow: %d\n", - csrow); + if (n >= DIMMS_PER_CHANNEL) { + debugf0("ERROR: trying to access an invalid dimm: %d\n", + dimm); return 0; } @@ -913,19 +919,19 @@ static void decode_mtr(int slot_row, u16 mtr) debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); } -static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel, +static void handle_channel(struct i5400_pvt *pvt, int dimm, int channel, struct i5400_dimm_info *dinfo) { int mtr; int amb_present_reg; int addrBits; - mtr = determine_mtr(pvt, csrow, channel); + mtr = determine_mtr(pvt, dimm, channel); if (MTR_DIMMS_PRESENT(mtr)) { amb_present_reg = determine_amb_present_reg(pvt, channel); /* Determine if there is a DIMM present in this DIMM slot */ - if (amb_present_reg & (1 << csrow)) { + if (amb_present_reg & (1 << dimm)) { /* Start with the number of bits for a Bank * on the DRAM */ addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr); @@ -954,7 +960,7 @@ static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel, static void calculate_dimm_size(struct i5400_pvt *pvt) { struct i5400_dimm_info *dinfo; - int csrow, max_csrows; + int dimm, max_dimms; char *p, *mem_buffer; int space, n; int channel; @@ -968,32 +974,32 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) return; } - /* Scan all the actual CSROWS + /* Scan all the actual DIMMS * and calculate the information for each DIMM - * Start with the highest csrow first, to display it first - * and work toward the 0th csrow + * Start with the highest dimm first, to display it first + * and work toward the 0th dimm */ - max_csrows = pvt->maxdimmperch; - for (csrow = max_csrows - 1; csrow >= 0; csrow--) { + max_dimms = pvt->maxdimmperch; + for (dimm = max_dimms - 1; dimm >= 0; dimm--) { - /* on an odd csrow, first output a 'boundary' marker, + /* on an odd dimm, first output a 'boundary' marker, * then reset the message buffer */ - if (csrow & 0x1) { + if (dimm & 0x1) { n = snprintf(p, space, "---------------------------" - "--------------------------------"); + "-------------------------------"); p += n; space -= n; debugf2("%s\n", mem_buffer); p = mem_buffer; space = PAGE_SIZE; } - n = snprintf(p, space, "csrow %2d ", csrow); + n = snprintf(p, space, "dimm %2d ", dimm); p += n; space -= n; for (channel = 0; channel < pvt->maxch; channel++) { - dinfo = &pvt->dimm_info[csrow][channel]; - handle_channel(pvt, csrow, channel, dinfo); + dinfo = &pvt->dimm_info[dimm][channel]; + handle_channel(pvt, dimm, channel, dinfo); n = snprintf(p, space, "%4d MB | ", dinfo->megabytes); p += n; space -= n; @@ -1005,7 +1011,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) /* Output the last bottom 'boundary' marker */ n = snprintf(p, space, "---------------------------" - "--------------------------------"); + "-------------------------------"); p += n; space -= n; debugf2("%s\n", mem_buffer); @@ -1013,7 +1019,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) space = PAGE_SIZE; /* now output the 'channel' labels */ - n = snprintf(p, space, " "); + n = snprintf(p, space, " "); p += n; space -= n; for (channel = 0; channel < pvt->maxch; channel++) { @@ -1080,7 +1086,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) debugf2("MIR1: limit= 0x%x WAY1= %u WAY0= %x\n", limit, way1, way0); /* Get the set of MTR[0-3] regs by each branch */ - for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) { + for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) { int where = MTR0 + (slot_row * sizeof(u16)); /* Branch 0 set of MTR registers */ @@ -1105,7 +1111,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) /* Read and dump branch 0's MTRs */ debugf2("\nMemory Technology Registers:\n"); debugf2(" Branch 0:\n"); - for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) + for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) decode_mtr(slot_row, pvt->b0_mtr[slot_row]); pci_read_config_word(pvt->branch_0, AMBPRESENT_0, @@ -1122,7 +1128,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) } else { /* Read and dump branch 1's MTRs */ debugf2(" Branch 1:\n"); - for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) + for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) decode_mtr(slot_row, pvt->b1_mtr[slot_row]); pci_read_config_word(pvt->branch_1, AMBPRESENT_0, @@ -1141,7 +1147,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) } /* - * i5400_init_csrows Initialize the 'csrows' table within + * i5400_init_dimms Initialize the 'dimms' table within * the mci control structure with the * addressing of memory. * @@ -1149,50 +1155,68 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) * 0 success * 1 no actual memory found on this MC */ -static int i5400_init_csrows(struct mem_ctl_info *mci) +static int i5400_init_dimms(struct mem_ctl_info *mci) { struct i5400_pvt *pvt; - struct csrow_info *p_csrow; - int empty, channel_count; - int max_csrows; + struct dimm_info *dimm; + int ndimms, channel_count; + int max_dimms; int mtr; int size_mb; - int channel; - int csrow; - struct dimm_info *dimm; + int channel, slot; pvt = mci->pvt_info; channel_count = pvt->maxch; - max_csrows = pvt->maxdimmperch; + max_dimms = pvt->maxdimmperch; - empty = 1; /* Assume NO memory */ + ndimms = 0; - for (csrow = 0; csrow < max_csrows; csrow++) { - p_csrow = &mci->csrows[csrow]; + /* + * FIXME: remove pvt->dimm_info[slot][channel] and use the 3 + * layers here. + */ + for (channel = 0; channel < mci->layers[0].size * mci->layers[1].size; + channel++) { + for (slot = 0; slot < mci->layers[2].size; slot++) { + mtr = determine_mtr(pvt, slot, channel); - /* use branch 0 for the basis */ - mtr = determine_mtr(pvt, csrow, 0); + /* if no DIMMS on this slot, continue */ + if (!MTR_DIMMS_PRESENT(mtr)) + continue; - /* if no DIMMS on this row, continue */ - if (!MTR_DIMMS_PRESENT(mtr)) - continue; + dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, + channel / 2, channel % 2, slot); - for (channel = 0; channel < pvt->maxch; channel++) { - size_mb = pvt->dimm_info[csrow][channel].megabytes; + size_mb = pvt->dimm_info[slot][channel].megabytes; + + debugf2("%s: dimm%zd (branch %d channel %d slot %d): %d.%03d GB\n", + __func__, dimm - mci->dimms, + channel / 2, channel % 2, slot, + size_mb / 1000, size_mb % 1000); - dimm = p_csrow->channels[channel].dimm; dimm->nr_pages = size_mb << 8; dimm->grain = 8; dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; - dimm->mtype = MEM_RDDR2; - dimm->edac_mode = EDAC_SECDED; + dimm->mtype = MEM_FB_DDR2; + /* + * The eccc mechanism is SDDC (aka SECC), with + * is similar to Chipkill. + */ + dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ? + EDAC_S8ECD8ED : EDAC_S4ECD4ED; + ndimms++; } - - empty = 0; } - return empty; + /* + * When just one memory is provided, it should be at location (0,0,0). + * With such single-DIMM mode, the SDCC algorithm degrades to SECDEC+. + */ + if (ndimms == 1) + mci->dimms[0].edac_mode = EDAC_SECDED; + + return (ndimms == 0); } /* @@ -1228,9 +1252,7 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) { struct mem_ctl_info *mci; struct i5400_pvt *pvt; - int num_channels; - int num_dimms_per_channel; - int num_csrows; + struct edac_mc_layer layers[3]; if (dev_idx >= ARRAY_SIZE(i5400_devs)) return -EINVAL; @@ -1244,22 +1266,21 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) if (PCI_FUNC(pdev->devfn) != 0) return -ENODEV; - /* As we don't have a motherboard identification routine to determine - * actual number of slots/dimms per channel, we thus utilize the - * resource as specified by the chipset. Thus, we might have - * have more DIMMs per channel than actually on the mobo, but this - * allows the driver to support up to the chipset max, without - * some fancy mobo determination. + /* + * allocate a new MC control structure + * + * This drivers uses the DIMM slot as "csrow" and the rest as "channel". */ - num_dimms_per_channel = MAX_DIMMS_PER_CHANNEL; - num_channels = MAX_CHANNELS; - num_csrows = num_dimms_per_channel; - - debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", - __func__, num_channels, num_dimms_per_channel, num_csrows); - - /* allocate a new MC control structure */ - mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0); + layers[0].type = EDAC_MC_LAYER_BRANCH; + layers[0].size = MAX_BRANCHES; + layers[0].is_virt_csrow = false; + layers[1].type = EDAC_MC_LAYER_CHANNEL; + layers[1].size = CHANNELS_PER_BRANCH; + layers[1].is_virt_csrow = false; + layers[2].type = EDAC_MC_LAYER_SLOT; + layers[2].size = DIMMS_PER_CHANNEL; + layers[2].is_virt_csrow = true; + mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; @@ -1270,8 +1291,8 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) pvt = mci->pvt_info; pvt->system_address = pdev; /* Record this device in our private */ - pvt->maxch = num_channels; - pvt->maxdimmperch = num_dimms_per_channel; + pvt->maxch = MAX_CHANNELS; + pvt->maxdimmperch = DIMMS_PER_CHANNEL; /* 'get' the pci devices we want to reserve for our use */ if (i5400_get_devices(mci, dev_idx)) @@ -1293,13 +1314,13 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) /* Set the function pointer to an actual operation function */ mci->edac_check = i5400_check_error; - /* initialize the MC control structure 'csrows' table + /* initialize the MC control structure 'dimms' table * with the mapping and control information */ - if (i5400_init_csrows(mci)) { + if (i5400_init_dimms(mci)) { debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n" - " because i5400_init_csrows() returned nonzero " + " because i5400_init_dimms() returned nonzero " "value\n"); - mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */ + mci->edac_cap = EDAC_FLAG_NONE; /* no dimms found */ } else { debugf1("MC: Enable error reporting now\n"); i5400_enable_error_reporting(mci); -- cgit v1.2.3-55-g7522 From ca0907b9e413bb1d1f3ea123b663535b74928846 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 2 May 2012 14:37:00 -0300 Subject: edac: Remove the legacy EDAC ABI Now that all drivers got converted to use the new ABI, we can drop the old one. Acked-by: Chris Metcalf Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/amd64_edac.c | 2 +- drivers/edac/amd76x_edac.c | 2 +- drivers/edac/cell_edac.c | 2 +- drivers/edac/cpc925_edac.c | 2 +- drivers/edac/e752x_edac.c | 3 +- drivers/edac/e7xxx_edac.c | 2 +- drivers/edac/edac_core.h | 76 +----------------------------------------- drivers/edac/edac_mc.c | 52 ++++------------------------- drivers/edac/i3000_edac.c | 2 +- drivers/edac/i3200_edac.c | 2 +- drivers/edac/i5000_edac.c | 3 +- drivers/edac/i5100_edac.c | 2 +- drivers/edac/i5400_edac.c | 3 +- drivers/edac/i7300_edac.c | 3 +- drivers/edac/i7core_edac.c | 2 +- drivers/edac/i82443bxgx_edac.c | 2 +- drivers/edac/i82860_edac.c | 2 +- drivers/edac/i82875p_edac.c | 2 +- drivers/edac/i82975x_edac.c | 2 +- drivers/edac/mpc85xx_edac.c | 3 +- drivers/edac/mv64x60_edac.c | 2 +- drivers/edac/pasemi_edac.c | 2 +- drivers/edac/ppc4xx_edac.c | 2 +- drivers/edac/r82600_edac.c | 2 +- drivers/edac/sb_edac.c | 2 +- drivers/edac/tile_edac.c | 2 +- drivers/edac/x38_edac.c | 2 +- 27 files changed, 32 insertions(+), 151 deletions(-) (limited to 'drivers/edac/i5400_edac.c') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index c431544519b1..7be9b7288e90 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2596,7 +2596,7 @@ static int amd64_init_one_instance(struct pci_dev *F2) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = pvt->channel_count; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0); if (!mci) goto err_siblings; diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index 69f2b2ebb263..9774d443fa57 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -251,7 +251,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 14aa17492757..69ee6aab5c71 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c @@ -204,7 +204,7 @@ static int __devinit cell_edac_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = num_chans; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, sizeof(struct cell_edac_priv)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index 2d94fa91c746..e22030a9de66 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -982,7 +982,7 @@ static int __devinit cpc925_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, sizeof(struct cpc925_mc_pdata)); if (!mci) { cpc925_printk(KERN_ERR, "No memory for mem_ctl_info\n"); diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index aaa3bb8893c1..d28a6851bb18 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -1278,8 +1278,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = drc_chan + 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, - sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index d4cfc24b2f8d..9a9c1a546797 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -447,7 +447,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = drc_chan + 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h index 1286c5e1bdc0..f06ce9ab692c 100644 --- a/drivers/edac/edac_core.h +++ b/drivers/edac/edac_core.h @@ -447,9 +447,7 @@ static inline void pci_write_bits32(struct pci_dev *pdev, int offset, #endif /* CONFIG_PCI */ -struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, - unsigned nr_chans, int edac_index); -struct mem_ctl_info *new_edac_mc_alloc(unsigned edac_index, +struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, unsigned n_layers, struct edac_mc_layer *layers, unsigned sz_pvt); @@ -460,18 +458,6 @@ extern struct mem_ctl_info *find_mci_by_dev(struct device *dev); extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev); extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page); - -/* - * The no info errors are used when error overflows are reported. - * There are a limited number of error logging registers that can - * be exausted. When all registers are exhausted and an additional - * error occurs then an error overflow register records that an - * error occurred and the type of error, but doesn't have any - * further information. The ce/ue versions make for cleaner - * reporting logic and function interface - reduces conditional - * statement clutter and extra function arguments. - */ - void edac_mc_handle_error(const enum hw_event_mc_err_type type, struct mem_ctl_info *mci, const unsigned long page_frame_number, @@ -484,66 +470,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type, const char *other_detail, const void *mcelog); -static inline void edac_mc_handle_ce(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, - unsigned long syndrome, int row, int channel, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, - page_frame_number, offset_in_page, syndrome, - row, channel, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, - 0, 0, 0, -1, -1, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_ue(struct mem_ctl_info *mci, - unsigned long page_frame_number, - unsigned long offset_in_page, int row, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, - page_frame_number, offset_in_page, 0, - row, -1, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, - const char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, - 0, 0, 0, -1, -1, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, - unsigned int csrow, - unsigned int channel0, - unsigned int channel1, - char *msg) -{ - /* - *FIXME: The error can also be at channel1 (e. g. at the second - * channel of the same branch). The fix is to push - * edac_mc_handle_error() call into each driver - */ - edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, - 0, 0, 0, - csrow, channel0, -1, msg, NULL, NULL); -} - -static inline void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, - unsigned int csrow, - unsigned int channel, char *msg) -{ - edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, - 0, 0, 0, - csrow, channel, -1, msg, NULL, NULL); -} - /* * edac_device APIs */ diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 1bd237ee4ca7..06028de5fe1b 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -195,13 +195,13 @@ void *edac_align_ptr(void **p, unsigned size, int n_elems) * on such scenarios, as grouping the multiple ranks require drivers change. * * Returns: - * NULL allocation failed - * struct mem_ctl_info pointer + * On failure: NULL + * On success: struct mem_ctl_info pointer */ -struct mem_ctl_info *new_edac_mc_alloc(unsigned mc_num, - unsigned n_layers, - struct edac_mc_layer *layers, - unsigned sz_pvt) +struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, + unsigned n_layers, + struct edac_mc_layer *layers, + unsigned sz_pvt) { struct mem_ctl_info *mci; struct edac_mc_layer *layer; @@ -370,46 +370,6 @@ struct mem_ctl_info *new_edac_mc_alloc(unsigned mc_num, */ return mci; } -EXPORT_SYMBOL_GPL(new_edac_mc_alloc); - -/** - * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure - * @mc_num: Memory controller number - * @n_layers: Number of layers at the MC hierarchy - * layers: Describes each layer as seen by the Memory Controller - * @size_pvt: Size of private storage needed - * - * - * FIXME: drivers handle multi-rank memories in different ways: some - * drivers map multi-ranked DIMMs as one DIMM while others - * as several DIMMs. - * - * Everything is kmalloc'ed as one big chunk - more efficient. - * It can only be used if all structures have the same lifetime - otherwise - * you have to allocate and initialize your own structures. - * - * Use edac_mc_free() to free mc structures allocated by this function. - * - * Returns: - * On failure: NULL - * On success: struct mem_ctl_info pointer - */ - -struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, - unsigned nr_chans, int mc_num) -{ - unsigned n_layers = 2; - struct edac_mc_layer layers[n_layers]; - - layers[0].type = EDAC_MC_LAYER_CHIP_SELECT; - layers[0].size = nr_csrows; - layers[0].is_virt_csrow = true; - layers[1].type = EDAC_MC_LAYER_CHANNEL; - layers[1].size = nr_chans; - layers[1].is_virt_csrow = false; - - return new_edac_mc_alloc(mc_num, ARRAY_SIZE(layers), layers, sz_pvt); -} EXPORT_SYMBOL_GPL(edac_mc_alloc); /** diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 195a92e1c0ae..8ad1744faacd 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c @@ -362,7 +362,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index d152662ffc66..bbe43ef71823 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -347,7 +347,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_channels; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct i3200_priv)); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index fdbc57cb7287..82f3f4d2e7b8 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1396,8 +1396,7 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = num_dimms_per_channel; layers[2].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); - + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index 691cd49aa169..d9b4921707f8 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c @@ -936,7 +936,7 @@ static int __devinit i5100_init_one(struct pci_dev *pdev, layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = ranksperch; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*priv)); if (!mci) { ret = -ENOMEM; diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 508f369b1f6c..ff7bf8050c9c 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -1280,8 +1280,7 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = DIMMS_PER_CHANNEL; layers[2].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); - + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index c2cf9771692a..97c22fd650ee 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c @@ -1051,8 +1051,7 @@ static int __devinit i7300_init_one(struct pci_dev *pdev, layers[2].type = EDAC_MC_LAYER_SLOT; layers[2].size = MAX_SLOTS; layers[2].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); - + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index bc2c04550b8b..6d89c78a9b7a 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c @@ -2147,7 +2147,7 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev) layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = MAX_DIMMS; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(i7core_dev->socket, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(i7core_dev->socket, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (unlikely(!mci)) return -ENOMEM; diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 524f9a2c5707..52072c28a8a6 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -255,7 +255,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = I82443BXGX_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index 8834e4ed9802..08045059d10b 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -206,7 +206,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = 8; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index 89ca38a779a3..b613e31c16e5 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -420,7 +420,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = nr_chans; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; goto fail0; diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index 092fa5ab2e1a..9c346d7f707f 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c @@ -555,7 +555,7 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = I82975X_NR_CSROWS(chans); layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (!mci) { rc = -ENOMEM; goto fail1; diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index a15141025a94..4c402353ba98 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -980,8 +980,7 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, - sizeof(*pdata)); + mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), sizeof(*pdata)); if (!mci) { devres_release_group(&op->dev, mpc85xx_mc_err_probe); return -ENOMEM; diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index 289a6cc859b4..b0bb5a3d2527 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c @@ -715,7 +715,7 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = 1; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers, sizeof(struct mv64x60_mc_pdata)); if (!mci) { printk(KERN_ERR "%s: No memory for CPU err\n", __func__); diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 46aed62436b5..b095a906a994 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c @@ -215,7 +215,7 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev, layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = PASEMI_EDAC_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index 59f50b6f21d3..f3f9fed06ad7 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c @@ -1291,7 +1291,7 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = ppc4xx_edac_nr_chans; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers, sizeof(struct ppc4xx_edac_pdata)); if (mci == NULL) { ppc4xx_edac_printk(KERN_ERR, "%s: " diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index aea1a0c0eca3..e1cacd164f31 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -291,7 +291,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = R82600_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index 828647969124..2f95a1b583dc 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -1640,7 +1640,7 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev) layers[1].type = EDAC_MC_LAYER_SLOT; layers[1].size = MAX_DIMMS; layers[1].is_virt_csrow = true; - mci = new_edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(sbridge_dev->mc, ARRAY_SIZE(layers), layers, sizeof(*pvt)); if (unlikely(!mci)) diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index bcdd1e4dc735..7bb4614730db 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c @@ -141,7 +141,7 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = TILE_EDAC_NR_CHANS; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, + mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, sizeof(struct tile_edac_priv)); if (mci == NULL) return -ENOMEM; diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index 8f8cda914534..1ac7962d63ea 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -348,7 +348,7 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) layers[1].type = EDAC_MC_LAYER_CHANNEL; layers[1].size = x38_channel_num; layers[1].is_virt_csrow = false; - mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); + mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0); if (!mci) return -ENOMEM; -- cgit v1.2.3-55-g7522 From 68d086f89b8064d5576f8c1e47fa7ecb4fd6f141 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 12 Feb 2012 17:18:06 -0300 Subject: i5400_edac: improve debug messages to better represent the filled memory Improves the debug output message, in order to better represent the memory controller hierarchy, when outputing the debug messages. No functional changes when debug is disabled. Reviewed-by: Aristeu Rozanski Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5400_edac.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'drivers/edac/i5400_edac.c') diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index ff7bf8050c9c..6640c29e1885 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c @@ -963,7 +963,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) int dimm, max_dimms; char *p, *mem_buffer; int space, n; - int channel; + int channel, branch; /* ================= Generate some debug output ================= */ space = PAGE_SIZE; @@ -1028,6 +1028,19 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) space -= n; } + space -= n; + debugf2("%s\n", mem_buffer); + p = mem_buffer; + space = PAGE_SIZE; + + n = snprintf(p, space, " "); + p += n; + for (branch = 0; branch < MAX_BRANCHES; branch++) { + n = snprintf(p, space, " branch %d | ", branch); + p += n; + space -= n; + } + /* output the last message and free buffer */ debugf2("%s\n", mem_buffer); kfree(mem_buffer); -- cgit v1.2.3-55-g7522