From ff3d04a17117ed0825076c0e9edd0fe232daec9f Mon Sep 17 00:00:00 2001 From: Ben Goz Date: Sun, 4 Jan 2015 10:37:18 +0200 Subject: drm/amdkfd: Add new VI-specific queue properties This patch adds new fields to the queue_properties structure. The new fields are relevant only for queues running on AMD GPU VI architecture. The eop_ring_buffer_address and eop_ring_buffer_size describe an end-of-pipe queue which is assigned to the MQD. In CI, the EOP queue was per pipeline and in VI it is per queue. The ctx_save_restore_area_address and ctx_save_restore_area_size describe a memory area that is designated to allow the CP to do context save/restore in mid-wave state. This patch also modifies the set_queue_properties_from_user() (called from kfd_ioctl_create_queue()) to check and copy those new parameters. Signed-off-by: Ben Goz Signed-off-by: Oded Gabbay Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/gpu/drm/amd/amdkfd/kfd_priv.h') diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h index a79c21781d3b..3ba34b7bb122 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h @@ -299,6 +299,11 @@ struct queue_properties { uint32_t sdma_engine_id; uint32_t sdma_queue_id; uint32_t sdma_vm_addr; + /* Relevant only for VI */ + uint64_t eop_ring_buffer_address; + uint32_t eop_ring_buffer_size; + uint64_t ctx_save_restore_area_address; + uint32_t ctx_save_restore_area_size; }; /** -- cgit v1.2.3-55-g7522