From 2426f20903ff4ee83cef585b2130ed45adc865d8 Mon Sep 17 00:00:00 2001 From: Suganath Prabu S Date: Fri, 31 May 2019 08:14:41 -0400 Subject: scsi: mpt3sas: Enable interrupt coalescing on high iops Enable interrupt coalescing only on high iops queues. In ioc config page 1, offset 0x14 (ProductSpecific field) is used to determine interrupt coalescing enabled/disabled on per reply descriptor post queue group(8) basis. If 31st bit is zero, then interrupt coalescing is enabled for all reply descriptor post queues. If 31st bit is set to one, then user can enable/disable interrupt coalescing on per reply descriptor post queue group(8) basis. So to enable interrupt coalescing only on first reply descriptor post queue group (i.e. on high iops queues), set bit 0 and 31. This configuration should reset during driver unload or shutdown to the default settings. For this, the driver takes copy of default ioc page 1 and copies back the default or unmodified ioc page1 during unload and shutdown. This means that on next driver load (e.g. if older version driver is loaded by user), current modified changes on ioc page1 won't take effect. Signed-off-by: Suganath Prabu S Signed-off-by: Martin K. Petersen --- drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h') diff --git a/drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h b/drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h index a2f4a55c51be..167d79d145ca 100644 --- a/drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h +++ b/drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h @@ -1398,7 +1398,7 @@ typedef struct _MPI2_CONFIG_PAGE_IOC_1 { U8 PCIBusNum; /*0x0E */ U8 PCIDomainSegment; /*0x0F */ U32 Reserved1; /*0x10 */ - U32 Reserved2; /*0x14 */ + U32 ProductSpecific; /* 0x14 */ } MPI2_CONFIG_PAGE_IOC_1, *PTR_MPI2_CONFIG_PAGE_IOC_1, Mpi2IOCPage1_t, *pMpi2IOCPage1_t; -- cgit v1.2.3-55-g7522