From cee8113a295acfc4cd25728d7c3d44e6bc3bbff9 Mon Sep 17 00:00:00 2001
From: Dhaval Shah
Date: Thu, 21 Dec 2017 10:33:06 -0800
Subject: soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver

Xilinx ZYNQMP logicoreIP Init driver is based on the new
LogiCoreIP design created. This driver provides the processing system
and programmable logic isolation. Set the frequency based on the clock
information get from the logicoreIP register set.

Signed-off-by: Dhaval Shah <dshah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 drivers/soc/xilinx/Makefile | 1 +
 1 file changed, 1 insertion(+)

(limited to 'drivers/soc/xilinx/Makefile')

diff --git a/drivers/soc/xilinx/Makefile b/drivers/soc/xilinx/Makefile
index f66554cd5c45..dee8fd51e303 100644
--- a/drivers/soc/xilinx/Makefile
+++ b/drivers/soc/xilinx/Makefile
@@ -1 +1,2 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_XILINX_VCU)	+= xlnx_vcu.o
-- 
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