From af7e9069543aabd415d7c543f3f89b143ac1a932 Mon Sep 17 00:00:00 2001 From: Jacob Pan Date: Mon, 6 Oct 2014 21:17:14 -0700 Subject: mfd: axp20x: Extend axp20x to support axp288 pmic X-Powers AXP288 is a customized PMIC for Intel Baytrail-CR platforms. Similar to AXP202/209, AXP288 comes with USB charger, more LDO and BUCK channels, and AD converters. It also provides extended status and interrupt reporting capabilities than the devices currently supported in axp20x.c. In addition to feature extension, this patch also adds ACPI binding for enumeration. This consolidated driver should support more X-Powers' PMICs in both device tree and ACPI enumerated platforms. Signed-off-by: Jacob Pan Reviewed-by: Maxime Ripard Reviewed-by: Jonathan Cameron Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 3 +- drivers/mfd/axp20x.c | 361 +++++++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 308 insertions(+), 56 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index de5abf244746..c183edb45b52 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -74,7 +74,8 @@ config MFD_AXP20X select REGMAP_IRQ depends on I2C=y help - If you say Y here you get support for the X-Powers AXP202 and AXP209. + If you say Y here you get support for the X-Powers AXP202, AXP209 and + AXP288 power management IC (PMIC). This driver include only the core APIs. You have to select individual components like regulators or the PEK (Power Enable Key) under the corresponding menus. diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index dee653989e3a..b2fb7f492c86 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -1,9 +1,9 @@ /* - * axp20x.c - MFD core driver for the X-Powers AXP202 and AXP209 + * axp20x.c - MFD core driver for the X-Powers' Power Management ICs * - * AXP20x comprises an adaptive USB-Compatible PWM charger, 2 BUCK DC-DC - * converters, 5 LDOs, multiple 12-bit ADCs of voltage, current and temperature - * as well as 4 configurable GPIOs. + * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC + * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature + * as well as configurable GPIOs. * * Author: Carlo Caione * @@ -25,9 +25,16 @@ #include #include #include +#include #define AXP20X_OFF 0x80 +static const char const *axp20x_model_names[] = { + "AXP202", + "AXP209", + "AXP288", +}; + static const struct regmap_range axp20x_writeable_ranges[] = { regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), @@ -47,6 +54,25 @@ static const struct regmap_access_table axp20x_volatile_table = { .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), }; +static const struct regmap_range axp288_writeable_ranges[] = { + regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), + regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), +}; + +static const struct regmap_range axp288_volatile_ranges[] = { + regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), +}; + +static const struct regmap_access_table axp288_writeable_table = { + .yes_ranges = axp288_writeable_ranges, + .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), +}; + +static const struct regmap_access_table axp288_volatile_table = { + .yes_ranges = axp288_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), +}; + static struct resource axp20x_pek_resources[] = { { .name = "PEK_DBR", @@ -61,6 +87,39 @@ static struct resource axp20x_pek_resources[] = { }, }; +static struct resource axp288_battery_resources[] = { + { + .start = AXP288_IRQ_QWBTU, + .end = AXP288_IRQ_QWBTU, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_WBTU, + .end = AXP288_IRQ_WBTU, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_QWBTO, + .end = AXP288_IRQ_QWBTO, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_WBTO, + .end = AXP288_IRQ_WBTO, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_WL2, + .end = AXP288_IRQ_WL2, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_WL1, + .end = AXP288_IRQ_WL1, + .flags = IORESOURCE_IRQ, + }, +}; + static const struct regmap_config axp20x_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -70,47 +129,96 @@ static const struct regmap_config axp20x_regmap_config = { .cache_type = REGCACHE_RBTREE, }; -#define AXP20X_IRQ(_irq, _off, _mask) \ - [AXP20X_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } +static const struct regmap_config axp288_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .wr_table = &axp288_writeable_table, + .volatile_table = &axp288_volatile_table, + .max_register = AXP288_FG_TUNE5, + .cache_type = REGCACHE_RBTREE, +}; + +#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ + [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } static const struct regmap_irq axp20x_regmap_irqs[] = { - AXP20X_IRQ(ACIN_OVER_V, 0, 7), - AXP20X_IRQ(ACIN_PLUGIN, 0, 6), - AXP20X_IRQ(ACIN_REMOVAL, 0, 5), - AXP20X_IRQ(VBUS_OVER_V, 0, 4), - AXP20X_IRQ(VBUS_PLUGIN, 0, 3), - AXP20X_IRQ(VBUS_REMOVAL, 0, 2), - AXP20X_IRQ(VBUS_V_LOW, 0, 1), - AXP20X_IRQ(BATT_PLUGIN, 1, 7), - AXP20X_IRQ(BATT_REMOVAL, 1, 6), - AXP20X_IRQ(BATT_ENT_ACT_MODE, 1, 5), - AXP20X_IRQ(BATT_EXIT_ACT_MODE, 1, 4), - AXP20X_IRQ(CHARG, 1, 3), - AXP20X_IRQ(CHARG_DONE, 1, 2), - AXP20X_IRQ(BATT_TEMP_HIGH, 1, 1), - AXP20X_IRQ(BATT_TEMP_LOW, 1, 0), - AXP20X_IRQ(DIE_TEMP_HIGH, 2, 7), - AXP20X_IRQ(CHARG_I_LOW, 2, 6), - AXP20X_IRQ(DCDC1_V_LONG, 2, 5), - AXP20X_IRQ(DCDC2_V_LONG, 2, 4), - AXP20X_IRQ(DCDC3_V_LONG, 2, 3), - AXP20X_IRQ(PEK_SHORT, 2, 1), - AXP20X_IRQ(PEK_LONG, 2, 0), - AXP20X_IRQ(N_OE_PWR_ON, 3, 7), - AXP20X_IRQ(N_OE_PWR_OFF, 3, 6), - AXP20X_IRQ(VBUS_VALID, 3, 5), - AXP20X_IRQ(VBUS_NOT_VALID, 3, 4), - AXP20X_IRQ(VBUS_SESS_VALID, 3, 3), - AXP20X_IRQ(VBUS_SESS_END, 3, 2), - AXP20X_IRQ(LOW_PWR_LVL1, 3, 1), - AXP20X_IRQ(LOW_PWR_LVL2, 3, 0), - AXP20X_IRQ(TIMER, 4, 7), - AXP20X_IRQ(PEK_RIS_EDGE, 4, 6), - AXP20X_IRQ(PEK_FAL_EDGE, 4, 5), - AXP20X_IRQ(GPIO3_INPUT, 4, 3), - AXP20X_IRQ(GPIO2_INPUT, 4, 2), - AXP20X_IRQ(GPIO1_INPUT, 4, 1), - AXP20X_IRQ(GPIO0_INPUT, 4, 0), + INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), + INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), + INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), + INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), + INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), + INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), + INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), + INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), + INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), + INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), + INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), + INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), + INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), + INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), + INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), + INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), + INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), + INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), + INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), + INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), + INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), + INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), + INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), + INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), + INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), + INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), + INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), + INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), + INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), + INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), + INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), + INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), + INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), + INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), + INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), + INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), + INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), +}; + +/* some IRQs are compatible with axp20x models */ +static const struct regmap_irq axp288_regmap_irqs[] = { + INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), + INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), + INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), + + INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), + INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), + INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), + INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), + INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), + INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), + + INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), + INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), + INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), + INIT_REGMAP_IRQ(AXP288, WBTU, 2, 3), + INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), + INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), + INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), + INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), + + INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), + INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), + INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), + INIT_REGMAP_IRQ(AXP288, OT, 3, 7), + + INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), + INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), + INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), + INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), + INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), + INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), + INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), + INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), + + INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), + INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), }; static const struct of_device_id axp20x_of_match[] = { @@ -128,16 +236,39 @@ static const struct i2c_device_id axp20x_i2c_id[] = { }; MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); +static struct acpi_device_id axp20x_acpi_match[] = { + { + .id = "INT33F4", + .driver_data = AXP288_ID, + }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match); + static const struct regmap_irq_chip axp20x_regmap_irq_chip = { .name = "axp20x_irq_chip", .status_base = AXP20X_IRQ1_STATE, .ack_base = AXP20X_IRQ1_STATE, .mask_base = AXP20X_IRQ1_EN, - .num_regs = 5, + .mask_invert = true, + .init_ack_masked = true, .irqs = axp20x_regmap_irqs, .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), + .num_regs = 5, + +}; + +static const struct regmap_irq_chip axp288_regmap_irq_chip = { + .name = "axp288_irq_chip", + .status_base = AXP20X_IRQ1_STATE, + .ack_base = AXP20X_IRQ1_STATE, + .mask_base = AXP20X_IRQ1_EN, .mask_invert = true, .init_ack_masked = true, + .irqs = axp288_regmap_irqs, + .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), + .num_regs = 6, + }; static const char * const axp20x_supplies[] = { @@ -161,36 +292,155 @@ static struct mfd_cell axp20x_cells[] = { }, }; +static struct resource axp288_adc_resources[] = { + { + .name = "GPADC", + .start = AXP288_IRQ_GPADC, + .end = AXP288_IRQ_GPADC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource axp288_charger_resources[] = { + { + .start = AXP288_IRQ_OV, + .end = AXP288_IRQ_OV, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_DONE, + .end = AXP288_IRQ_DONE, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_CHARGING, + .end = AXP288_IRQ_CHARGING, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_SAFE_QUIT, + .end = AXP288_IRQ_SAFE_QUIT, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_SAFE_ENTER, + .end = AXP288_IRQ_SAFE_ENTER, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_QCBTU, + .end = AXP288_IRQ_QCBTU, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_CBTU, + .end = AXP288_IRQ_CBTU, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_QCBTO, + .end = AXP288_IRQ_QCBTO, + .flags = IORESOURCE_IRQ, + }, + { + .start = AXP288_IRQ_CBTO, + .end = AXP288_IRQ_CBTO, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mfd_cell axp288_cells[] = { + { + .name = "axp288_adc", + .num_resources = ARRAY_SIZE(axp288_adc_resources), + .resources = axp288_adc_resources, + }, + { + .name = "axp288_charger", + .num_resources = ARRAY_SIZE(axp288_charger_resources), + .resources = axp288_charger_resources, + }, + { + .name = "axp288_battery", + .num_resources = ARRAY_SIZE(axp288_battery_resources), + .resources = axp288_battery_resources, + }, +}; + static struct axp20x_dev *axp20x_pm_power_off; static void axp20x_power_off(void) { + if (axp20x_pm_power_off->variant == AXP288_ID) + return; + regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL, AXP20X_OFF); } +static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev) +{ + const struct acpi_device_id *acpi_id; + const struct of_device_id *of_id; + + if (dev->of_node) { + of_id = of_match_device(axp20x_of_match, dev); + if (!of_id) { + dev_err(dev, "Unable to match OF ID\n"); + return -ENODEV; + } + axp20x->variant = (long) of_id->data; + } else { + acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); + if (!acpi_id || !acpi_id->driver_data) { + dev_err(dev, "Unable to match ACPI ID and data\n"); + return -ENODEV; + } + axp20x->variant = (long) acpi_id->driver_data; + } + + switch (axp20x->variant) { + case AXP202_ID: + case AXP209_ID: + axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); + axp20x->cells = axp20x_cells; + axp20x->regmap_cfg = &axp20x_regmap_config; + axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; + break; + case AXP288_ID: + axp20x->cells = axp288_cells; + axp20x->nr_cells = ARRAY_SIZE(axp288_cells); + axp20x->regmap_cfg = &axp288_regmap_config; + axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; + break; + default: + dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); + return -EINVAL; + } + dev_info(dev, "AXP20x variant %s found\n", + axp20x_model_names[axp20x->variant]); + + return 0; +} + static int axp20x_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct axp20x_dev *axp20x; - const struct of_device_id *of_id; int ret; axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); if (!axp20x) return -ENOMEM; - of_id = of_match_device(axp20x_of_match, &i2c->dev); - if (!of_id) { - dev_err(&i2c->dev, "Unable to setup AXP20X data\n"); - return -ENODEV; - } - axp20x->variant = (long) of_id->data; + ret = axp20x_match_device(axp20x, &i2c->dev); + if (ret) + return ret; axp20x->i2c_client = i2c; axp20x->dev = &i2c->dev; dev_set_drvdata(axp20x->dev, axp20x); - axp20x->regmap = devm_regmap_init_i2c(i2c, &axp20x_regmap_config); + axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg); if (IS_ERR(axp20x->regmap)) { ret = PTR_ERR(axp20x->regmap); dev_err(&i2c->dev, "regmap init failed: %d\n", ret); @@ -199,15 +449,15 @@ static int axp20x_i2c_probe(struct i2c_client *i2c, ret = regmap_add_irq_chip(axp20x->regmap, i2c->irq, IRQF_ONESHOT | IRQF_SHARED, -1, - &axp20x_regmap_irq_chip, + axp20x->regmap_irq_chip, &axp20x->regmap_irqc); if (ret) { dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret); return ret; } - ret = mfd_add_devices(axp20x->dev, -1, axp20x_cells, - ARRAY_SIZE(axp20x_cells), NULL, 0, NULL); + ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, + axp20x->nr_cells, NULL, 0, NULL); if (ret) { dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); @@ -245,6 +495,7 @@ static struct i2c_driver axp20x_i2c_driver = { .name = "axp20x", .owner = THIS_MODULE, .of_match_table = of_match_ptr(axp20x_of_match), + .acpi_match_table = ACPI_PTR(axp20x_acpi_match), }, .probe = axp20x_i2c_probe, .remove = axp20x_i2c_remove, -- cgit v1.2.3-55-g7522 From de89bd7f215b44ef18f56b0ddb579b44a1180958 Mon Sep 17 00:00:00 2001 From: Jacob Pan Date: Mon, 6 Oct 2014 21:17:15 -0700 Subject: iio: adc: Add support for axp288 adc Platform driver for X-Powers AXP288 ADC, which is a sub-device of the customized AXP288 PMIC for Intel Baytrail-CR platforms. GPADC device enumerates as one of the MFD cell devices. It uses IIO infrastructure to communicate with userspace and consumer drivers. Usages of ADC channels include battery charging and thermal sensors. Based on initial work by: Ramakrishna Pallala Acked-by: Jonathan Cameron Signed-off-by: Jacob Pan Signed-off-by: Lee Jones --- drivers/iio/adc/Kconfig | 8 ++ drivers/iio/adc/Makefile | 1 + drivers/iio/adc/axp288_adc.c | 254 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 263 insertions(+) create mode 100644 drivers/iio/adc/axp288_adc.c (limited to 'drivers') diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 11b048a59fde..db2681b4f24b 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -127,6 +127,14 @@ config AT91_ADC help Say yes here to build support for Atmel AT91 ADC. +config AXP288_ADC + tristate "X-Powers AXP288 ADC driver" + depends on MFD_AXP20X + help + Say yes here to have support for X-Powers power management IC (PMIC) ADC + device. Depending on platform configuration, this general purpose ADC can + be used for sampling sensors such as thermal resistors. + config EXYNOS_ADC tristate "Exynos ADC driver support" depends on ARCH_EXYNOS || (OF && COMPILE_TEST) diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index ad81b512aa3d..19640f9dc470 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_AD7793) += ad7793.o obj-$(CONFIG_AD7887) += ad7887.o obj-$(CONFIG_AD799X) += ad799x.o obj-$(CONFIG_AT91_ADC) += at91_adc.o +obj-$(CONFIG_AXP288_ADC) += axp288_adc.o obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o obj-$(CONFIG_MAX1027) += max1027.o diff --git a/drivers/iio/adc/axp288_adc.c b/drivers/iio/adc/axp288_adc.c new file mode 100644 index 000000000000..480028618a84 --- /dev/null +++ b/drivers/iio/adc/axp288_adc.c @@ -0,0 +1,254 @@ +/* + * axp288_adc.c - X-Powers AXP288 PMIC ADC Driver + * + * Copyright (C) 2014 Intel Corporation + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define AXP288_ADC_EN_MASK 0xF1 +#define AXP288_ADC_TS_PIN_GPADC 0xF2 +#define AXP288_ADC_TS_PIN_ON 0xF3 + +enum axp288_adc_id { + AXP288_ADC_TS, + AXP288_ADC_PMIC, + AXP288_ADC_GP, + AXP288_ADC_BATT_CHRG_I, + AXP288_ADC_BATT_DISCHRG_I, + AXP288_ADC_BATT_V, + AXP288_ADC_NR_CHAN, +}; + +struct axp288_adc_info { + int irq; + struct regmap *regmap; +}; + +static const struct iio_chan_spec const axp288_adc_channels[] = { + { + .indexed = 1, + .type = IIO_TEMP, + .channel = 0, + .address = AXP288_TS_ADC_H, + .datasheet_name = "TS_PIN", + }, { + .indexed = 1, + .type = IIO_TEMP, + .channel = 1, + .address = AXP288_PMIC_ADC_H, + .datasheet_name = "PMIC_TEMP", + }, { + .indexed = 1, + .type = IIO_TEMP, + .channel = 2, + .address = AXP288_GP_ADC_H, + .datasheet_name = "GPADC", + }, { + .indexed = 1, + .type = IIO_CURRENT, + .channel = 3, + .address = AXP20X_BATT_CHRG_I_H, + .datasheet_name = "BATT_CHG_I", + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), + }, { + .indexed = 1, + .type = IIO_CURRENT, + .channel = 4, + .address = AXP20X_BATT_DISCHRG_I_H, + .datasheet_name = "BATT_DISCHRG_I", + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), + }, { + .indexed = 1, + .type = IIO_VOLTAGE, + .channel = 5, + .address = AXP20X_BATT_V_H, + .datasheet_name = "BATT_V", + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), + }, +}; + +#define AXP288_ADC_MAP(_adc_channel_label, _consumer_dev_name, \ + _consumer_channel) \ + { \ + .adc_channel_label = _adc_channel_label, \ + .consumer_dev_name = _consumer_dev_name, \ + .consumer_channel = _consumer_channel, \ + } + +/* for consumer drivers */ +static struct iio_map axp288_adc_default_maps[] = { + AXP288_ADC_MAP("TS_PIN", "axp288-batt", "axp288-batt-temp"), + AXP288_ADC_MAP("PMIC_TEMP", "axp288-pmic", "axp288-pmic-temp"), + AXP288_ADC_MAP("GPADC", "axp288-gpadc", "axp288-system-temp"), + AXP288_ADC_MAP("BATT_CHG_I", "axp288-chrg", "axp288-chrg-curr"), + AXP288_ADC_MAP("BATT_DISCHRG_I", "axp288-chrg", "axp288-chrg-d-curr"), + AXP288_ADC_MAP("BATT_V", "axp288-batt", "axp288-batt-volt"), + {}, +}; + +static int axp288_adc_read_channel(int *val, unsigned long address, + struct regmap *regmap) +{ + u8 buf[2]; + + if (regmap_bulk_read(regmap, address, buf, 2)) + return -EIO; + *val = (buf[0] << 4) + ((buf[1] >> 4) & 0x0F); + + return IIO_VAL_INT; +} + +static int axp288_adc_set_ts(struct regmap *regmap, unsigned int mode, + unsigned long address) +{ + /* channels other than GPADC do not need to switch TS pin */ + if (address != AXP288_GP_ADC_H) + return 0; + + return regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, mode); +} + +static int axp288_adc_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + int ret; + struct axp288_adc_info *info = iio_priv(indio_dev); + + mutex_lock(&indio_dev->mlock); + switch (mask) { + case IIO_CHAN_INFO_RAW: + if (axp288_adc_set_ts(info->regmap, AXP288_ADC_TS_PIN_GPADC, + chan->address)) { + dev_err(&indio_dev->dev, "GPADC mode\n"); + ret = -EINVAL; + break; + } + ret = axp288_adc_read_channel(val, chan->address, info->regmap); + if (axp288_adc_set_ts(info->regmap, AXP288_ADC_TS_PIN_ON, + chan->address)) + dev_err(&indio_dev->dev, "TS pin restore\n"); + break; + case IIO_CHAN_INFO_PROCESSED: + ret = axp288_adc_read_channel(val, chan->address, info->regmap); + break; + default: + ret = -EINVAL; + } + mutex_unlock(&indio_dev->mlock); + + return ret; +} + +static int axp288_adc_set_state(struct regmap *regmap) +{ + /* ADC should be always enabled for internal FG to function */ + if (regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, AXP288_ADC_TS_PIN_ON)) + return -EIO; + + return regmap_write(regmap, AXP20X_ADC_EN1, AXP288_ADC_EN_MASK); +} + +static const struct iio_info axp288_adc_iio_info = { + .read_raw = &axp288_adc_read_raw, + .driver_module = THIS_MODULE, +}; + +static int axp288_adc_probe(struct platform_device *pdev) +{ + int ret; + struct axp288_adc_info *info; + struct iio_dev *indio_dev; + struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); + + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); + if (!indio_dev) + return -ENOMEM; + + info = iio_priv(indio_dev); + info->irq = platform_get_irq(pdev, 0); + if (info->irq < 0) { + dev_err(&pdev->dev, "no irq resource?\n"); + return info->irq; + } + platform_set_drvdata(pdev, indio_dev); + info->regmap = axp20x->regmap; + /* + * Set ADC to enabled state at all time, including system suspend. + * otherwise internal fuel gauge functionality may be affected. + */ + ret = axp288_adc_set_state(axp20x->regmap); + if (ret) { + dev_err(&pdev->dev, "unable to enable ADC device\n"); + return ret; + } + + indio_dev->dev.parent = &pdev->dev; + indio_dev->name = pdev->name; + indio_dev->channels = axp288_adc_channels; + indio_dev->num_channels = ARRAY_SIZE(axp288_adc_channels); + indio_dev->info = &axp288_adc_iio_info; + indio_dev->modes = INDIO_DIRECT_MODE; + ret = iio_map_array_register(indio_dev, axp288_adc_default_maps); + if (ret < 0) + return ret; + + ret = iio_device_register(indio_dev); + if (ret < 0) { + dev_err(&pdev->dev, "unable to register iio device\n"); + goto err_array_unregister; + } + return 0; + +err_array_unregister: + iio_map_array_unregister(indio_dev); + + return ret; +} + +static int axp288_adc_remove(struct platform_device *pdev) +{ + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + + iio_device_unregister(indio_dev); + iio_map_array_unregister(indio_dev); + + return 0; +} + +static struct platform_driver axp288_adc_driver = { + .probe = axp288_adc_probe, + .remove = axp288_adc_remove, + .driver = { + .name = "axp288_adc", + .owner = THIS_MODULE, + }, +}; + +module_platform_driver(axp288_adc_driver); + +MODULE_AUTHOR("Jacob Pan "); +MODULE_DESCRIPTION("X-Powers AXP288 ADC Driver"); +MODULE_LICENSE("GPL"); -- cgit v1.2.3-55-g7522 From dce4ec2e452fddb7542b5fc15d0e6b8531f6d5eb Mon Sep 17 00:00:00 2001 From: Aaron Lu Date: Tue, 28 Oct 2014 14:35:59 +0800 Subject: ACPI / video: Run _BCL before deciding registering backlight The ASUS K53SM's ACPI table queries _OSI("Windows 2012") in the video output device's _BCL and _BCM control method instead of the usual _INI functions of the _SB or PCI host bridge PCI0 devices. This made our video module thought this is a pre-Win8 system when deciding if we should register a backlight interface for it and the end result is that a non-working acpi_video interface is registered and user is unable to control backlight from GUI. Solve this problem by evaluating _BCL control method before doing the decision. Note that for some Thinkpad systems, the _BCL is also required to be evaluated for the hotkey event to be generated no matter if we will register an ACPI video backlight interface for it or not. Since the thinkpad_acpi module will do this anyway we didn't add such a thing in the video module previously. But now with this change here, the thinkpad_acpi module is no more necessary for those systems regarding backlight functionality. Link: https://bugzilla.kernel.org/show_bug.cgi?id=85051 Reported-and-tested-by: Ralf Jung Signed-off-by: Aaron Lu Signed-off-by: Rafael J. Wysocki --- drivers/acpi/video.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'drivers') diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c index 807a88a0f394..41e6b977ceb2 100644 --- a/drivers/acpi/video.c +++ b/drivers/acpi/video.c @@ -1680,6 +1680,19 @@ static void acpi_video_dev_register_backlight(struct acpi_video_device *device) printk(KERN_ERR PREFIX "Create sysfs link\n"); } +static void acpi_video_run_bcl_for_osi(struct acpi_video_bus *video) +{ + struct acpi_video_device *dev; + union acpi_object *levels; + + mutex_lock(&video->device_list_lock); + list_for_each_entry(dev, &video->video_device_list, entry) { + if (!acpi_video_device_lcd_query_levels(dev, &levels)) + kfree(levels); + } + mutex_unlock(&video->device_list_lock); +} + static int acpi_video_bus_register_backlight(struct acpi_video_bus *video) { struct acpi_video_device *dev; @@ -1687,6 +1700,8 @@ static int acpi_video_bus_register_backlight(struct acpi_video_bus *video) if (video->backlight_registered) return 0; + acpi_video_run_bcl_for_osi(video); + if (!acpi_video_verify_backlight_support()) return 0; -- cgit v1.2.3-55-g7522 From 29ec0a25c8d732d4f51689060ddabb0de3356cc8 Mon Sep 17 00:00:00 2001 From: Aaron Lu Date: Tue, 11 Nov 2014 11:30:08 -0800 Subject: iio: adc: Add module device table for autoloading Add the module device id table so that the driver can be automatically loaded once the platform device is created. Signed-off-by: Aaron Lu Signed-off-by: Jacob Pan Acked-by: Jonathan Cameron Signed-off-by: Lee Jones --- drivers/iio/adc/axp288_adc.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers') diff --git a/drivers/iio/adc/axp288_adc.c b/drivers/iio/adc/axp288_adc.c index 480028618a84..4a6cf43df46a 100644 --- a/drivers/iio/adc/axp288_adc.c +++ b/drivers/iio/adc/axp288_adc.c @@ -238,15 +238,23 @@ static int axp288_adc_remove(struct platform_device *pdev) return 0; } +static struct platform_device_id axp288_adc_id_table[] = { + { .name = "axp288_adc" }, + {}, +}; + static struct platform_driver axp288_adc_driver = { .probe = axp288_adc_probe, .remove = axp288_adc_remove, + .id_table = axp288_adc_id_table, .driver = { .name = "axp288_adc", .owner = THIS_MODULE, }, }; +MODULE_DEVICE_TABLE(platform, axp288_adc_id_table); + module_platform_driver(axp288_adc_driver); MODULE_AUTHOR("Jacob Pan "); -- cgit v1.2.3-55-g7522 From ff3bbc5c637ab0843b3a9df717b6cca4e8243f0c Mon Sep 17 00:00:00 2001 From: Jacob Pan Date: Tue, 11 Nov 2014 11:30:09 -0800 Subject: mfd/axp20x: avoid irq numbering collision IRQ numbers in axp20x devices are defined with high-order bit first in each IRQ enable/status registers. On Intel platforms it is more common to number IRQs with least significant bit first. Therefore, sharing IRQ# between the two is very difficult. Since AXP288 is a customized PMIC for Intel platform and the amount of shared IRQs are very small, we use separate IRQ numbering. This also fixes collision and a duplicate in WBTO interrupt. e.g. For the 16 interrupts controlled in IRQ enabled registers 1 & 2, on axp20x for ARM, the PMIC local IRQ numbers and register bits are mapped as: IRQ#: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 --------------------------------------------------------- ARM: 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Intel: 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Signed-off-by: Todd Brandt Signed-off-by: Jacob Pan Acked-by: Jonathan Cameron Signed-off-by: Lee Jones --- drivers/mfd/axp20x.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index b2fb7f492c86..9c4714e13c3c 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -183,21 +183,21 @@ static const struct regmap_irq axp20x_regmap_irqs[] = { /* some IRQs are compatible with axp20x models */ static const struct regmap_irq axp288_regmap_irqs[] = { - INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), - INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), - INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), + INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), + INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), + INIT_REGMAP_IRQ(AXP288, OV, 0, 4), - INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), - INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), + INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), + INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), - INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), - INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), + INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), + INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), - INIT_REGMAP_IRQ(AXP288, WBTU, 2, 3), + INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), @@ -215,7 +215,7 @@ static const struct regmap_irq axp288_regmap_irqs[] = { INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), - INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), + INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), -- cgit v1.2.3-55-g7522 From 8019f6962708985782b65bd97be88046a55e1e4d Mon Sep 17 00:00:00 2001 From: Jacob Pan Date: Tue, 11 Nov 2014 11:30:10 -0800 Subject: iio/axp288_adc: remove THIS_MODULE owner This is no longer needed in that platform driver_register will do it. Signed-off-by: Jacob Pan Acked-by: Jonathan Cameron Signed-off-by: Lee Jones --- drivers/iio/adc/axp288_adc.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/iio/adc/axp288_adc.c b/drivers/iio/adc/axp288_adc.c index 4a6cf43df46a..08bcfb061ca5 100644 --- a/drivers/iio/adc/axp288_adc.c +++ b/drivers/iio/adc/axp288_adc.c @@ -249,7 +249,6 @@ static struct platform_driver axp288_adc_driver = { .id_table = axp288_adc_id_table, .driver = { .name = "axp288_adc", - .owner = THIS_MODULE, }, }; -- cgit v1.2.3-55-g7522 From b1eea857d8c70dc3789cc2231e3c0a273a67ba06 Mon Sep 17 00:00:00 2001 From: Aaron Lu Date: Mon, 24 Nov 2014 17:21:54 +0800 Subject: ACPI / PMIC: support PMIC operation region for CrystalCove The Baytrail-T platform firmware has defined two customized operation regions for PMIC chip Crystal Cove - one is for power resource handling and one is for thermal: sensor temperature reporting, trip point setting, etc. This patch adds support for them on top of the existing Crystal Cove PMIC driver. The reason to split code into a separate file intel_pmic.c is that there are more PMIC drivers with ACPI operation region support coming and we can re-use those code. The intel_pmic_opregion_data structure is created also for this purpose: when we need to support a new PMIC's operation region, we just need to fill those callbacks and the two register mapping tables. Signed-off-by: Aaron Lu Acked-by: Lee Jones for the MFD part Signed-off-by: Rafael J. Wysocki --- drivers/acpi/Kconfig | 17 ++ drivers/acpi/Makefile | 3 + drivers/acpi/pmic/intel_pmic.c | 354 +++++++++++++++++++++++++++++++++++++ drivers/acpi/pmic/intel_pmic.h | 25 +++ drivers/acpi/pmic/intel_pmic_crc.c | 211 ++++++++++++++++++++++ drivers/mfd/intel_soc_pmic_crc.c | 3 + 6 files changed, 613 insertions(+) create mode 100644 drivers/acpi/pmic/intel_pmic.c create mode 100644 drivers/acpi/pmic/intel_pmic.h create mode 100644 drivers/acpi/pmic/intel_pmic_crc.c (limited to 'drivers') diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index b23fe37f67c0..df816456dc06 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -394,4 +394,21 @@ config ACPI_EXTLOG driver adds support for that functionality with corresponding tracepoint which carries that information to userspace. +menuconfig PMIC_OPREGION + bool "PMIC (Power Management Integrated Circuit) operation region support" + help + Select this option to enable support for ACPI operation + region of the PMIC chip. The operation region can be used + to control power rails and sensor reading/writing on the + PMIC chip. + +if PMIC_OPREGION +config CRC_PMIC_OPREGION + bool "ACPI operation region support for CrystalCove PMIC" + depends on INTEL_SOC_PMIC + help + This config adds ACPI operation region support for CrystalCove PMIC. + +endif + endif # ACPI diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index c3b2fcb729f3..38ea2a8245ed 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -87,3 +87,6 @@ obj-$(CONFIG_ACPI_PROCESSOR_AGGREGATOR) += acpi_pad.o obj-$(CONFIG_ACPI_APEI) += apei/ obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o + +obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o +obj-$(CONFIG_CRC_PMIC_OPREGION) += pmic/intel_pmic_crc.o diff --git a/drivers/acpi/pmic/intel_pmic.c b/drivers/acpi/pmic/intel_pmic.c new file mode 100644 index 000000000000..a732e5d7e322 --- /dev/null +++ b/drivers/acpi/pmic/intel_pmic.c @@ -0,0 +1,354 @@ +/* + * intel_pmic.c - Intel PMIC operation region driver + * + * Copyright (C) 2014 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include "intel_pmic.h" + +#define PMIC_POWER_OPREGION_ID 0x8d +#define PMIC_THERMAL_OPREGION_ID 0x8c + +struct acpi_lpat { + int temp; + int raw; +}; + +struct intel_pmic_opregion { + struct mutex lock; + struct acpi_lpat *lpat; + int lpat_count; + struct regmap *regmap; + struct intel_pmic_opregion_data *data; +}; + +static int pmic_get_reg_bit(int address, struct pmic_table *table, + int count, int *reg, int *bit) +{ + int i; + + for (i = 0; i < count; i++) { + if (table[i].address == address) { + *reg = table[i].reg; + if (bit) + *bit = table[i].bit; + return 0; + } + } + return -ENOENT; +} + +/** + * raw_to_temp(): Return temperature from raw value through LPAT table + * + * @lpat: the temperature_raw mapping table + * @count: the count of the above mapping table + * @raw: the raw value, used as a key to get the temerature from the + * above mapping table + * + * A positive value will be returned on success, a negative errno will + * be returned in error cases. + */ +static int raw_to_temp(struct acpi_lpat *lpat, int count, int raw) +{ + int i, delta_temp, delta_raw, temp; + + for (i = 0; i < count - 1; i++) { + if ((raw >= lpat[i].raw && raw <= lpat[i+1].raw) || + (raw <= lpat[i].raw && raw >= lpat[i+1].raw)) + break; + } + + if (i == count - 1) + return -ENOENT; + + delta_temp = lpat[i+1].temp - lpat[i].temp; + delta_raw = lpat[i+1].raw - lpat[i].raw; + temp = lpat[i].temp + (raw - lpat[i].raw) * delta_temp / delta_raw; + + return temp; +} + +/** + * temp_to_raw(): Return raw value from temperature through LPAT table + * + * @lpat: the temperature_raw mapping table + * @count: the count of the above mapping table + * @temp: the temperature, used as a key to get the raw value from the + * above mapping table + * + * A positive value will be returned on success, a negative errno will + * be returned in error cases. + */ +static int temp_to_raw(struct acpi_lpat *lpat, int count, int temp) +{ + int i, delta_temp, delta_raw, raw; + + for (i = 0; i < count - 1; i++) { + if (temp >= lpat[i].temp && temp <= lpat[i+1].temp) + break; + } + + if (i == count - 1) + return -ENOENT; + + delta_temp = lpat[i+1].temp - lpat[i].temp; + delta_raw = lpat[i+1].raw - lpat[i].raw; + raw = lpat[i].raw + (temp - lpat[i].temp) * delta_raw / delta_temp; + + return raw; +} + +static void pmic_thermal_lpat(struct intel_pmic_opregion *opregion, + acpi_handle handle, struct device *dev) +{ + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + union acpi_object *obj_p, *obj_e; + int *lpat, i; + acpi_status status; + + status = acpi_evaluate_object(handle, "LPAT", NULL, &buffer); + if (ACPI_FAILURE(status)) + return; + + obj_p = (union acpi_object *)buffer.pointer; + if (!obj_p || (obj_p->type != ACPI_TYPE_PACKAGE) || + (obj_p->package.count % 2) || (obj_p->package.count < 4)) + goto out; + + lpat = devm_kmalloc(dev, sizeof(int) * obj_p->package.count, + GFP_KERNEL); + if (!lpat) + goto out; + + for (i = 0; i < obj_p->package.count; i++) { + obj_e = &obj_p->package.elements[i]; + if (obj_e->type != ACPI_TYPE_INTEGER) { + devm_kfree(dev, lpat); + goto out; + } + lpat[i] = (s64)obj_e->integer.value; + } + + opregion->lpat = (struct acpi_lpat *)lpat; + opregion->lpat_count = obj_p->package.count / 2; + +out: + kfree(buffer.pointer); +} + +static acpi_status intel_pmic_power_handler(u32 function, + acpi_physical_address address, u32 bits, u64 *value64, + void *handler_context, void *region_context) +{ + struct intel_pmic_opregion *opregion = region_context; + struct regmap *regmap = opregion->regmap; + struct intel_pmic_opregion_data *d = opregion->data; + int reg, bit, result; + + if (bits != 32 || !value64) + return AE_BAD_PARAMETER; + + if (function == ACPI_WRITE && !(*value64 == 0 || *value64 == 1)) + return AE_BAD_PARAMETER; + + result = pmic_get_reg_bit(address, d->power_table, + d->power_table_count, ®, &bit); + if (result == -ENOENT) + return AE_BAD_PARAMETER; + + mutex_lock(&opregion->lock); + + result = function == ACPI_READ ? + d->get_power(regmap, reg, bit, value64) : + d->update_power(regmap, reg, bit, *value64 == 1); + + mutex_unlock(&opregion->lock); + + return result ? AE_ERROR : AE_OK; +} + +static int pmic_read_temp(struct intel_pmic_opregion *opregion, + int reg, u64 *value) +{ + int raw_temp, temp; + + if (!opregion->data->get_raw_temp) + return -ENXIO; + + raw_temp = opregion->data->get_raw_temp(opregion->regmap, reg); + if (raw_temp < 0) + return raw_temp; + + if (!opregion->lpat) { + *value = raw_temp; + return 0; + } + + temp = raw_to_temp(opregion->lpat, opregion->lpat_count, raw_temp); + if (temp < 0) + return temp; + + *value = temp; + return 0; +} + +static int pmic_thermal_temp(struct intel_pmic_opregion *opregion, int reg, + u32 function, u64 *value) +{ + return function == ACPI_READ ? + pmic_read_temp(opregion, reg, value) : -EINVAL; +} + +static int pmic_thermal_aux(struct intel_pmic_opregion *opregion, int reg, + u32 function, u64 *value) +{ + int raw_temp; + + if (function == ACPI_READ) + return pmic_read_temp(opregion, reg, value); + + if (!opregion->data->update_aux) + return -ENXIO; + + if (opregion->lpat) { + raw_temp = temp_to_raw(opregion->lpat, opregion->lpat_count, + *value); + if (raw_temp < 0) + return raw_temp; + } else { + raw_temp = *value; + } + + return opregion->data->update_aux(opregion->regmap, reg, raw_temp); +} + +static int pmic_thermal_pen(struct intel_pmic_opregion *opregion, int reg, + u32 function, u64 *value) +{ + struct intel_pmic_opregion_data *d = opregion->data; + struct regmap *regmap = opregion->regmap; + + if (!d->get_policy || !d->update_policy) + return -ENXIO; + + if (function == ACPI_READ) + return d->get_policy(regmap, reg, value); + + if (*value != 0 && *value != 1) + return -EINVAL; + + return d->update_policy(regmap, reg, *value); +} + +static bool pmic_thermal_is_temp(int address) +{ + return (address <= 0x3c) && !(address % 12); +} + +static bool pmic_thermal_is_aux(int address) +{ + return (address >= 4 && address <= 0x40 && !((address - 4) % 12)) || + (address >= 8 && address <= 0x44 && !((address - 8) % 12)); +} + +static bool pmic_thermal_is_pen(int address) +{ + return address >= 0x48 && address <= 0x5c; +} + +static acpi_status intel_pmic_thermal_handler(u32 function, + acpi_physical_address address, u32 bits, u64 *value64, + void *handler_context, void *region_context) +{ + struct intel_pmic_opregion *opregion = region_context; + struct intel_pmic_opregion_data *d = opregion->data; + int reg, result; + + if (bits != 32 || !value64) + return AE_BAD_PARAMETER; + + result = pmic_get_reg_bit(address, d->thermal_table, + d->thermal_table_count, ®, NULL); + if (result == -ENOENT) + return AE_BAD_PARAMETER; + + mutex_lock(&opregion->lock); + + if (pmic_thermal_is_temp(address)) + result = pmic_thermal_temp(opregion, reg, function, value64); + else if (pmic_thermal_is_aux(address)) + result = pmic_thermal_aux(opregion, reg, function, value64); + else if (pmic_thermal_is_pen(address)) + result = pmic_thermal_pen(opregion, reg, function, value64); + else + result = -EINVAL; + + mutex_unlock(&opregion->lock); + + if (result < 0) { + if (result == -EINVAL) + return AE_BAD_PARAMETER; + else + return AE_ERROR; + } + + return AE_OK; +} + +int intel_pmic_install_opregion_handler(struct device *dev, acpi_handle handle, + struct regmap *regmap, + struct intel_pmic_opregion_data *d) +{ + acpi_status status; + struct intel_pmic_opregion *opregion; + + if (!dev || !regmap || !d) + return -EINVAL; + + if (!handle) + return -ENODEV; + + opregion = devm_kzalloc(dev, sizeof(*opregion), GFP_KERNEL); + if (!opregion) + return -ENOMEM; + + mutex_init(&opregion->lock); + opregion->regmap = regmap; + pmic_thermal_lpat(opregion, handle, dev); + + status = acpi_install_address_space_handler(handle, + PMIC_POWER_OPREGION_ID, + intel_pmic_power_handler, + NULL, opregion); + if (ACPI_FAILURE(status)) + return -ENODEV; + + status = acpi_install_address_space_handler(handle, + PMIC_THERMAL_OPREGION_ID, + intel_pmic_thermal_handler, + NULL, opregion); + if (ACPI_FAILURE(status)) { + acpi_remove_address_space_handler(handle, PMIC_POWER_OPREGION_ID, + intel_pmic_power_handler); + return -ENODEV; + } + + opregion->data = d; + return 0; +} +EXPORT_SYMBOL_GPL(intel_pmic_install_opregion_handler); + +MODULE_LICENSE("GPL"); diff --git a/drivers/acpi/pmic/intel_pmic.h b/drivers/acpi/pmic/intel_pmic.h new file mode 100644 index 000000000000..d4e90af8f0dd --- /dev/null +++ b/drivers/acpi/pmic/intel_pmic.h @@ -0,0 +1,25 @@ +#ifndef __INTEL_PMIC_H +#define __INTEL_PMIC_H + +struct pmic_table { + int address; /* operation region address */ + int reg; /* corresponding thermal register */ + int bit; /* control bit for power */ +}; + +struct intel_pmic_opregion_data { + int (*get_power)(struct regmap *r, int reg, int bit, u64 *value); + int (*update_power)(struct regmap *r, int reg, int bit, bool on); + int (*get_raw_temp)(struct regmap *r, int reg); + int (*update_aux)(struct regmap *r, int reg, int raw_temp); + int (*get_policy)(struct regmap *r, int reg, u64 *value); + int (*update_policy)(struct regmap *r, int reg, int enable); + struct pmic_table *power_table; + int power_table_count; + struct pmic_table *thermal_table; + int thermal_table_count; +}; + +int intel_pmic_install_opregion_handler(struct device *dev, acpi_handle handle, struct regmap *regmap, struct intel_pmic_opregion_data *d); + +#endif diff --git a/drivers/acpi/pmic/intel_pmic_crc.c b/drivers/acpi/pmic/intel_pmic_crc.c new file mode 100644 index 000000000000..ef7d8ff95abe --- /dev/null +++ b/drivers/acpi/pmic/intel_pmic_crc.c @@ -0,0 +1,211 @@ +/* + * intel_pmic_crc.c - Intel CrystalCove PMIC operation region driver + * + * Copyright (C) 2014 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include "intel_pmic.h" + +#define PWR_SOURCE_SELECT BIT(1) + +#define PMIC_A0LOCK_REG 0xc5 + +static struct pmic_table power_table[] = { + { + .address = 0x24, + .reg = 0x66, + .bit = 0x00, + }, + { + .address = 0x48, + .reg = 0x5d, + .bit = 0x00, + }, +}; + +static struct pmic_table thermal_table[] = { + { + .address = 0x00, + .reg = 0x75 + }, + { + .address = 0x04, + .reg = 0x95 + }, + { + .address = 0x08, + .reg = 0x97 + }, + { + .address = 0x0c, + .reg = 0x77 + }, + { + .address = 0x10, + .reg = 0x9a + }, + { + .address = 0x14, + .reg = 0x9c + }, + { + .address = 0x18, + .reg = 0x79 + }, + { + .address = 0x1c, + .reg = 0x9f + }, + { + .address = 0x20, + .reg = 0xa1 + }, + { + .address = 0x48, + .reg = 0x94 + }, + { + .address = 0x4c, + .reg = 0x99 + }, + { + .address = 0x50, + .reg = 0x9e + }, +}; + +static int intel_crc_pmic_get_power(struct regmap *regmap, int reg, + int bit, u64 *value) +{ + int data; + + if (regmap_read(regmap, reg, &data)) + return -EIO; + + *value = (data & PWR_SOURCE_SELECT) && (data & BIT(bit)) ? 1 : 0; + return 0; +} + +static int intel_crc_pmic_update_power(struct regmap *regmap, int reg, + int bit, bool on) +{ + int data; + + if (regmap_read(regmap, reg, &data)) + return -EIO; + + if (on) { + data |= PWR_SOURCE_SELECT | BIT(bit); + } else { + data &= ~BIT(bit); + data |= PWR_SOURCE_SELECT; + } + + if (regmap_write(regmap, reg, data)) + return -EIO; + return 0; +} + +static int intel_crc_pmic_get_raw_temp(struct regmap *regmap, int reg) +{ + int temp_l, temp_h; + + /* + * Raw temperature value is 10bits: 8bits in reg + * and 2bits in reg-1: bit0,1 + */ + if (regmap_read(regmap, reg, &temp_l) || + regmap_read(regmap, reg - 1, &temp_h)) + return -EIO; + + return temp_l | (temp_h & 0x3) << 8; +} + +static int intel_crc_pmic_update_aux(struct regmap *regmap, int reg, int raw) +{ + return regmap_write(regmap, reg, raw) || + regmap_update_bits(regmap, reg - 1, 0x3, raw >> 8) ? -EIO : 0; +} + +static int intel_crc_pmic_get_policy(struct regmap *regmap, int reg, u64 *value) +{ + int pen; + + if (regmap_read(regmap, reg, &pen)) + return -EIO; + *value = pen >> 7; + return 0; +} + +static int intel_crc_pmic_update_policy(struct regmap *regmap, + int reg, int enable) +{ + int alert0; + + /* Update to policy enable bit requires unlocking a0lock */ + if (regmap_read(regmap, PMIC_A0LOCK_REG, &alert0)) + return -EIO; + + if (regmap_update_bits(regmap, PMIC_A0LOCK_REG, 0x01, 0)) + return -EIO; + + if (regmap_update_bits(regmap, reg, 0x80, enable << 7)) + return -EIO; + + /* restore alert0 */ + if (regmap_write(regmap, PMIC_A0LOCK_REG, alert0)) + return -EIO; + + return 0; +} + +static struct intel_pmic_opregion_data intel_crc_pmic_opregion_data = { + .get_power = intel_crc_pmic_get_power, + .update_power = intel_crc_pmic_update_power, + .get_raw_temp = intel_crc_pmic_get_raw_temp, + .update_aux = intel_crc_pmic_update_aux, + .get_policy = intel_crc_pmic_get_policy, + .update_policy = intel_crc_pmic_update_policy, + .power_table = power_table, + .power_table_count= ARRAY_SIZE(power_table), + .thermal_table = thermal_table, + .thermal_table_count = ARRAY_SIZE(thermal_table), +}; + +static int intel_crc_pmic_opregion_probe(struct platform_device *pdev) +{ + struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent); + return intel_pmic_install_opregion_handler(&pdev->dev, + ACPI_HANDLE(pdev->dev.parent), pmic->regmap, + &intel_crc_pmic_opregion_data); +} + +static struct platform_driver intel_crc_pmic_opregion_driver = { + .probe = intel_crc_pmic_opregion_probe, + .driver = { + .name = "crystal_cove_pmic", + }, +}; + +static int __init intel_crc_pmic_opregion_driver_init(void) +{ + return platform_driver_register(&intel_crc_pmic_opregion_driver); +} +module_init(intel_crc_pmic_opregion_driver_init); + +MODULE_DESCRIPTION("CrystalCove ACPI opration region driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c index 7107cab832e6..c85e2ecb868a 100644 --- a/drivers/mfd/intel_soc_pmic_crc.c +++ b/drivers/mfd/intel_soc_pmic_crc.c @@ -106,6 +106,9 @@ static struct mfd_cell crystal_cove_dev[] = { .num_resources = ARRAY_SIZE(gpio_resources), .resources = gpio_resources, }, + { + .name = "crystal_cove_pmic", + }, }; static struct regmap_config crystal_cove_regmap_config = { -- cgit v1.2.3-55-g7522 From d8139f6311129b4fdc370cbfc03424afea83693b Mon Sep 17 00:00:00 2001 From: Aaron Lu Date: Mon, 24 Nov 2014 17:24:47 +0800 Subject: ACPI / PMIC: support PMIC operation region for XPower AXP288 The Baytrail-T-CR platform firmware has defined two customized operation regions for PMIC chip Dollar Cove XPower - one is for power resource handling and one is for thermal just like the CrystalCove one. This patch adds support for them on top of the common PMIC opregion region code. Signed-off-by: Aaron Lu Acked-by: Lee Jones for the MFD part Signed-off-by: Rafael J. Wysocki --- drivers/acpi/Kconfig | 6 + drivers/acpi/Makefile | 1 + drivers/acpi/pmic/intel_pmic_xpower.c | 246 ++++++++++++++++++++++++++++++++++ drivers/mfd/axp20x.c | 3 + 4 files changed, 256 insertions(+) create mode 100644 drivers/acpi/pmic/intel_pmic_xpower.c (limited to 'drivers') diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index df816456dc06..bc682526e155 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -409,6 +409,12 @@ config CRC_PMIC_OPREGION help This config adds ACPI operation region support for CrystalCove PMIC. +config XPOWER_PMIC_OPREGION + bool "ACPI operation region support for XPower AXP288 PMIC" + depends on AXP288_ADC = y + help + This config adds ACPI operation region support for XPower AXP288 PMIC. + endif endif # ACPI diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 38ea2a8245ed..5053b0ce585f 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -90,3 +90,4 @@ obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o obj-$(CONFIG_CRC_PMIC_OPREGION) += pmic/intel_pmic_crc.o +obj-$(CONFIG_XPOWER_PMIC_OPREGION) += pmic/intel_pmic_xpower.o diff --git a/drivers/acpi/pmic/intel_pmic_xpower.c b/drivers/acpi/pmic/intel_pmic_xpower.c new file mode 100644 index 000000000000..f8853e5eb838 --- /dev/null +++ b/drivers/acpi/pmic/intel_pmic_xpower.c @@ -0,0 +1,246 @@ +/* + * intel_pmic_xpower.c - XPower AXP288 PMIC operation region driver + * + * Copyright (C) 2014 Intel Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include "intel_pmic.h" + +#define XPOWER_GPADC_LOW 0x5b + +static struct pmic_table power_table[] = { + { + .address = 0x00, + .reg = 0x13, + .bit = 0x05, + }, + { + .address = 0x04, + .reg = 0x13, + .bit = 0x06, + }, + { + .address = 0x08, + .reg = 0x13, + .bit = 0x07, + }, + { + .address = 0x0c, + .reg = 0x12, + .bit = 0x03, + }, + { + .address = 0x10, + .reg = 0x12, + .bit = 0x04, + }, + { + .address = 0x14, + .reg = 0x12, + .bit = 0x05, + }, + { + .address = 0x18, + .reg = 0x12, + .bit = 0x06, + }, + { + .address = 0x1c, + .reg = 0x12, + .bit = 0x00, + }, + { + .address = 0x20, + .reg = 0x12, + .bit = 0x01, + }, + { + .address = 0x24, + .reg = 0x12, + .bit = 0x02, + }, + { + .address = 0x28, + .reg = 0x13, + .bit = 0x02, + }, + { + .address = 0x2c, + .reg = 0x13, + .bit = 0x03, + }, + { + .address = 0x30, + .reg = 0x13, + .bit = 0x04, + }, + { + .address = 0x38, + .reg = 0x10, + .bit = 0x03, + }, + { + .address = 0x3c, + .reg = 0x10, + .bit = 0x06, + }, + { + .address = 0x40, + .reg = 0x10, + .bit = 0x05, + }, + { + .address = 0x44, + .reg = 0x10, + .bit = 0x04, + }, + { + .address = 0x48, + .reg = 0x10, + .bit = 0x01, + }, + { + .address = 0x4c, + .reg = 0x10, + .bit = 0x00 + }, +}; + +/* TMP0 - TMP5 are the same, all from GPADC */ +static struct pmic_table thermal_table[] = { + { + .address = 0x00, + .reg = XPOWER_GPADC_LOW + }, + { + .address = 0x0c, + .reg = XPOWER_GPADC_LOW + }, + { + .address = 0x18, + .reg = XPOWER_GPADC_LOW + }, + { + .address = 0x24, + .reg = XPOWER_GPADC_LOW + }, + { + .address = 0x30, + .reg = XPOWER_GPADC_LOW + }, + { + .address = 0x3c, + .reg = XPOWER_GPADC_LOW + }, +}; + +static int intel_xpower_pmic_get_power(struct regmap *regmap, int reg, + int bit, u64 *value) +{ + int data; + + if (regmap_read(regmap, reg, &data)) + return -EIO; + + *value = (data & BIT(bit)) ? 1 : 0; + return 0; +} + +static int intel_xpower_pmic_update_power(struct regmap *regmap, int reg, + int bit, bool on) +{ + int data; + + if (regmap_read(regmap, reg, &data)) + return -EIO; + + if (on) + data |= BIT(bit); + else + data &= ~BIT(bit); + + if (regmap_write(regmap, reg, data)) + return -EIO; + + return 0; +} + +/** + * intel_xpower_pmic_get_raw_temp(): Get raw temperature reading from the PMIC + * + * @regmap: regmap of the PMIC device + * @reg: register to get the reading + * + * We could get the sensor value by manipulating the HW regs here, but since + * the axp288 IIO driver may also access the same regs at the same time, the + * APIs provided by IIO subsystem are used here instead to avoid problems. As + * a result, the two passed in params are of no actual use. + * + * Return a positive value on success, errno on failure. + */ +static int intel_xpower_pmic_get_raw_temp(struct regmap *regmap, int reg) +{ + struct iio_channel *gpadc_chan; + int ret, val; + + gpadc_chan = iio_channel_get(NULL, "axp288-system-temp"); + if (IS_ERR_OR_NULL(gpadc_chan)) + return -EACCES; + + ret = iio_read_channel_raw(gpadc_chan, &val); + if (ret < 0) + val = ret; + + iio_channel_release(gpadc_chan); + return val; +} + +static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = { + .get_power = intel_xpower_pmic_get_power, + .update_power = intel_xpower_pmic_update_power, + .get_raw_temp = intel_xpower_pmic_get_raw_temp, + .power_table = power_table, + .power_table_count = ARRAY_SIZE(power_table), + .thermal_table = thermal_table, + .thermal_table_count = ARRAY_SIZE(thermal_table), +}; + + +static int intel_xpower_pmic_opregion_probe(struct platform_device *pdev) +{ + struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); + return intel_pmic_install_opregion_handler(&pdev->dev, + ACPI_HANDLE(pdev->dev.parent), axp20x->regmap, + &intel_xpower_pmic_opregion_data); +} + +static struct platform_driver intel_xpower_pmic_opregion_driver = { + .probe = intel_xpower_pmic_opregion_probe, + .driver = { + .name = "axp288_pmic_acpi", + }, +}; + +static int __init intel_xpower_pmic_opregion_driver_init(void) +{ + return platform_driver_register(&intel_xpower_pmic_opregion_driver); +} +module_init(intel_xpower_pmic_opregion_driver_init); + +MODULE_DESCRIPTION("XPower AXP288 ACPI operation region driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 971b0eb8d821..1df18d188342 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -354,6 +354,9 @@ static struct mfd_cell axp288_cells[] = { .num_resources = ARRAY_SIZE(axp288_battery_resources), .resources = axp288_battery_resources, }, + { + .name = "axp288_pmic_acpi", + }, }; static struct axp20x_dev *axp20x_pm_power_off; -- cgit v1.2.3-55-g7522 From 491cb357decca2b3eeaac5a8498ad23e7dd073b7 Mon Sep 17 00:00:00 2001 From: Aaron Lu Date: Mon, 24 Nov 2014 17:32:33 +0800 Subject: ACPI / PMIC: AXP288: support virtual GPIO in ACPI table The same virtual GPIO strategy is also used for the AXP288 PMIC in that various control methods that are used to do power rail handling and sensor reading/setting will touch GPIO fields defined under the PMIC device. The GPIO fileds are only defined by the ACPI code while the actual hardware doesn't really have a GPIO controller, but to make those control method execution succeed, we have to install a GPIO handler for the PMIC device handle. Since we do not need the virtual GPIO strategy, we can simply do nothing in that handler. Signed-off-by: Aaron Lu Signed-off-by: Rafael J. Wysocki --- drivers/acpi/pmic/intel_pmic_xpower.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/acpi/pmic/intel_pmic_xpower.c b/drivers/acpi/pmic/intel_pmic_xpower.c index f8853e5eb838..6a082d4de12c 100644 --- a/drivers/acpi/pmic/intel_pmic_xpower.c +++ b/drivers/acpi/pmic/intel_pmic_xpower.c @@ -220,13 +220,35 @@ static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = { .thermal_table_count = ARRAY_SIZE(thermal_table), }; +static acpi_status intel_xpower_pmic_gpio_handler(u32 function, + acpi_physical_address address, u32 bit_width, u64 *value, + void *handler_context, void *region_context) +{ + return AE_OK; +} static int intel_xpower_pmic_opregion_probe(struct platform_device *pdev) { - struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); - return intel_pmic_install_opregion_handler(&pdev->dev, - ACPI_HANDLE(pdev->dev.parent), axp20x->regmap, - &intel_xpower_pmic_opregion_data); + struct device *parent = pdev->dev.parent; + struct axp20x_dev *axp20x = dev_get_drvdata(parent); + acpi_status status; + int result; + + status = acpi_install_address_space_handler(ACPI_HANDLE(parent), + ACPI_ADR_SPACE_GPIO, intel_xpower_pmic_gpio_handler, + NULL, NULL); + if (ACPI_FAILURE(status)) + return -ENODEV; + + result = intel_pmic_install_opregion_handler(&pdev->dev, + ACPI_HANDLE(parent), axp20x->regmap, + &intel_xpower_pmic_opregion_data); + if (result) + acpi_remove_address_space_handler(ACPI_HANDLE(parent), + ACPI_ADR_SPACE_GPIO, + intel_xpower_pmic_gpio_handler); + + return result; } static struct platform_driver intel_xpower_pmic_opregion_driver = { -- cgit v1.2.3-55-g7522