From 6d2c2b9f806a4ec81833af533d57395db856d5a3 Mon Sep 17 00:00:00 2001 From: Milo Kim Date: Tue, 15 Nov 2016 22:02:13 +0900 Subject: mfd: tps65217: Update register interrupt mask bits instead of writing operation TPS65217 interrupt register includes read/writeable mask bits with read-only status bits. (bit 4, 5, 6 are R/W, bit 0, 1, 2 are RO) And reserved bit is not required. Register update operation is preferred for disabling all interrupts during the device initialisation. Signed-off-by: Milo Kim Signed-off-by: Lee Jones --- include/linux/mfd/tps65217.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h index 4ccda8969639..dfa9f0d0ae2b 100644 --- a/include/linux/mfd/tps65217.h +++ b/include/linux/mfd/tps65217.h @@ -73,13 +73,14 @@ #define TPS65217_PPATH_AC_CURRENT_MASK 0x0C #define TPS65217_PPATH_USB_CURRENT_MASK 0x03 -#define TPS65217_INT_RESERVEDM BIT(7) #define TPS65217_INT_PBM BIT(6) #define TPS65217_INT_ACM BIT(5) #define TPS65217_INT_USBM BIT(4) #define TPS65217_INT_PBI BIT(2) #define TPS65217_INT_ACI BIT(1) #define TPS65217_INT_USBI BIT(0) +#define TPS65217_INT_MASK (TPS65217_INT_PBM | TPS65217_INT_ACM | \ + TPS65217_INT_USBM) #define TPS65217_CHGCONFIG0_TREG BIT(7) #define TPS65217_CHGCONFIG0_DPPM BIT(6) -- cgit v1.2.3-55-g7522